Navi21 support

Change-Id: I7263556fdb85dc0152a2a72cc0ec4d7cd5e978a6

rocclr/device/pal/palcounters.cpp

@@ -154,7 +154,7 @@ bool PalCounterReference::finalize() {
   }
 }
 
-static constexpr std::array<PCIndexSelect, 46> blockIdToIndexSelect = {{
+static constexpr std::array<PCIndexSelect, 49> blockIdToIndexSelect = {{
     PCIndexSelect::None,                     // CPF
     PCIndexSelect::ShaderEngine,             // IA
     PCIndexSelect::ShaderEngine,             // VGT
@@ -201,11 +201,9 @@ static constexpr std::array<PCIndexSelect, 46> blockIdToIndexSelect = {{
     PCIndexSelect::None,                     // GCR
     PCIndexSelect::None,                     // PH
     PCIndexSelect::ShaderArray,              // UTCL1
-#if 0
     PCIndexSelect::None,                     // GeDist
     PCIndexSelect::ShaderEngine,             // GeSe
     PCIndexSelect::None,                     // Df
-#endif
 }};
 
 static_assert(blockIdToIndexSelect.size() ==  static_cast<size_t>(Pal::GpuBlock::Count), "size of blockIdToIndexSelect does not match GpuBlock::Count");
@@ -692,6 +690,7 @@ void PerfCounter::convertInfo() {
       }
       break;
     case Pal::GfxIpLevel::GfxIp10_1:
+    case Pal::GfxIpLevel::GfxIp10_3:
       if (info_.blockIndex_ < gfx10BlockIdPal.size()) {
         auto p = gfx10BlockIdPal[info_.blockIndex_];
         info_.blockIndex_ = std::get<0>(p);

rocclr/device/pal/paldefs.hpp

@@ -202,8 +202,8 @@ static constexpr AMDDeviceInfo Gfx9PlusSubDeviceInfo[] = {
     /*      Navi12LiteXNACK     */ UnknownDevice,
     /* 0x23 Navi14              */ {"gfx1012", "gfx1012", 32, 256, 32, 1012, 1012, false},
     /*      Navi14 XNACK        */ {"gfx1012", "gfx1012", 32, 256, 32, 1012, 1012, true},
-    /* 0x24 UnknownDevice       */ UnknownDevice,
-    /*      UnknownDevice XNACK */ UnknownDevice,
+    /* 0x24 Navi21              */ {"gfx1030", "gfx1030", 32, 256, 32, 1030, 1030, false},
+    /*      Navi21 XNACK        */ UnknownDevice,
     /* 0x25 UnknownDevice       */ UnknownDevice,
     /*      UnknownDevice XNACK */ UnknownDevice,
     /* 0x26 UnknownDevice       */ UnknownDevice,

rocclr/device/pal/paldevice.cpp

@@ -197,7 +197,7 @@ bool NullDevice::init() {
             ShouldNotReachHere();
             break;
           case 3:
-            ShouldNotReachHere();
+            ipLevel = Pal::GfxIpLevel::GfxIp10_3;
             break;
           case 4:
             ShouldNotReachHere();
@@ -258,7 +258,7 @@ bool NullDevice::init() {
         ShouldNotReachHere();
         break;
       case 1030:
-        ShouldNotReachHere();
+        revision = Pal::AsicRevision::Navi21;
         break;
       case 1031:
         ShouldNotReachHere();

rocclr/device/pal/palresource.cpp

@@ -468,6 +468,16 @@ void Resource::memTypeToHeap(Pal::GpuMemoryCreateInfo* createInfo) {
       break;
   }
 
+  // Pick the appropriate mall policy based on the mem type
+  switch (memoryType()) {
+    case Local:
+    case Scratch:
+      createInfo->mallPolicy = static_cast<Pal::GpuMemMallPolicy>(dev().settings().mallPolicy_);
+      break;
+    default:
+      createInfo->mallPolicy = Pal::GpuMemMallPolicy::Never;
+      break;
+  }
 }
 
 // ================================================================================================
@@ -1919,6 +1929,7 @@ bool MemorySubAllocator::CreateChunk(const Pal::IGpuMemory* reserved_va) {
   createInfo.heapCount = 1;
   createInfo.heaps[0] = Pal::GpuHeapInvisible;
   createInfo.flags.peerWritable = device_->P2PAccessAllowed();
+  createInfo.mallPolicy = static_cast<Pal::GpuMemMallPolicy>(device_->settings().mallPolicy_);
   GpuMemoryReference* mem_ref = GpuMemoryReference::Create(*device_, createInfo);
   if (mem_ref != nullptr) {
     return InitAllocator(mem_ref);
@@ -1938,6 +1949,7 @@ bool CoarseMemorySubAllocator::CreateChunk(const Pal::IGpuMemory* reserved_va) {
   createInfo.heapCount = 2;
   createInfo.heaps[0] = Pal::GpuHeapInvisible;
   createInfo.heaps[1] = Pal::GpuHeapLocal;
+  createInfo.mallPolicy = static_cast<Pal::GpuMemMallPolicy>(device_->settings().mallPolicy_);
   GpuMemoryReference* mem_ref = GpuMemoryReference::Create(*device_, createInfo);
   if (mem_ref != nullptr) {
     return InitAllocator(mem_ref);
@@ -1953,6 +1965,7 @@ bool FineMemorySubAllocator::CreateChunk(const Pal::IGpuMemory* reserved_va) {
   createInfo.alignment = MaxGpuAlignment;
   createInfo.flags.useReservedGpuVa = (reserved_va != nullptr);
   createInfo.pReservedGpuVaOwner = reserved_va;
+  createInfo.mallPolicy = Pal::GpuMemMallPolicy::Never;
   GpuMemoryReference* mem_ref = GpuMemoryReference::Create(*device_, createInfo);
   if ((mem_ref != nullptr) && InitAllocator(mem_ref)) {
     mem_ref->iMem()->Map(&mem_ref->cpuAddress_);
@@ -1970,6 +1983,7 @@ bool FineUncachedMemorySubAllocator::CreateChunk(const Pal::IGpuMemory* reserved
   createInfo.flags.useReservedGpuVa = (reserved_va != nullptr);
   createInfo.pReservedGpuVaOwner = reserved_va;
   createInfo.flags.gl2Uncached = true;
+  createInfo.mallPolicy = Pal::GpuMemMallPolicy::Never;
   GpuMemoryReference* mem_ref = GpuMemoryReference::Create(*device_, createInfo);
   if ((mem_ref != nullptr) && InitAllocator(mem_ref)) {
     mem_ref->iMem()->Map(&mem_ref->cpuAddress_);

rocclr/device/pal/palsettings.cpp

@@ -203,6 +203,7 @@ bool Settings::create(const Pal::DeviceProperties& palProp,
   }
 
   switch (palProp.revision) {
+    case Pal::AsicRevision::Navi21:
     case Pal::AsicRevision::Navi14:
     case Pal::AsicRevision::Navi12:
     case Pal::AsicRevision::Navi10:
@@ -493,6 +494,7 @@ bool Settings::create(const Pal::DeviceProperties& palProp,
 
   if (useLightning_) {
     switch (palProp.gfxLevel) {
+      case Pal::GfxIpLevel::GfxIp10_3:
       case Pal::GfxIpLevel::GfxIp10_1:
       case Pal::GfxIpLevel::GfxIp9:
         singleFpDenorm_ = true;