rocr: Quiet some ROCr compile warnings

These are mostly AIE related, but there are a couple of others.

Change-Id: I549e004772160ca282d4c94dc9d94dd2ccae8b1c


[ROCm/ROCR-Runtime commit: 08699069d6]
Этот коммит содержится в:
Chris Freehill
2024-10-23 14:07:00 -05:00
коммит произвёл Chris Freehill
родитель 6617af10e6
Коммит dd037425ed
13 изменённых файлов: 50 добавлений и 25 удалений
+3
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@@ -144,6 +144,9 @@ void AgentPropTest::QueryAgentProp(hsa_agent_t agent,
case HSA_DEVICE_TYPE_DSP:
ss << "DSP) : ";
break;
case HSA_DEVICE_TYPE_AIE:
ss << "AIE) : ";
break;
}
// Print the agent property
+3
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@@ -183,6 +183,9 @@ static void PrintAgentNameAndType(hsa_agent_t agent) {
case HSA_DEVICE_TYPE_DSP:
std::cout << "DSP)";
break;
case HSA_DEVICE_TYPE_AIE:
std::cout << "AIE)";
break;
}
std::cout << std::endl;
return;
+5 -2
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@@ -397,6 +397,9 @@ static void PrintAgentNameAndType(hsa_agent_t agent) {
case HSA_DEVICE_TYPE_DSP:
std::cout << "DSP)";
break;
case HSA_DEVICE_TYPE_AIE:
std::cout << "AIE)";
break;
}
std::cout << std::endl;
return;
@@ -530,13 +533,13 @@ void MemoryAllocationTest::MemoryAllocateContiguousTest(hsa_agent_t agent,
accessible_gpus.push_back(gpuIter);
}
void* importedPtr;
void* importedPtr = nullptr;
size_t importedSz;
ASSERT_SUCCESS(hsa_amd_interop_map_buffer(accessible_gpus.size(), accessible_gpus.data(), dmabuf, 0, &importedSz,
&importedPtr, 0, NULL));
ASSERT_NE((uint64_t)importedPtr, 0);
ASSERT_NE(importedPtr, nullptr);
ASSERT_EQ(importedSz, alloc_size);
close(dmabuf);
+7
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@@ -189,6 +189,10 @@ void MemoryTest::MaxSingleAllocationTest(hsa_agent_t ag,
case HSA_DEVICE_TYPE_DSP:
std::cout << "DSP)";
break;
case HSA_DEVICE_TYPE_AIE:
std::cout << "AIE)";
break;
}
std::cout << std::endl;
}
@@ -321,6 +325,9 @@ void MemoryTest::MemAvailableTest(hsa_agent_t ag, hsa_amd_memory_pool_t pool) {
case HSA_DEVICE_TYPE_DSP:
std::cout << "DSP)";
break;
case HSA_DEVICE_TYPE_AIE:
std::cout << "AIE)";
break;
}
std::cout << std::endl;
}
+4 -2
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@@ -736,7 +736,9 @@ void VirtMemoryTestBasic::GPUAccessToCPUMemoryTest(hsa_agent_t cpuAgent, hsa_age
ASSERT_SUCCESS(hsa_amd_vmem_unmap(dev_data, sizeof(*dev_data)));
ASSERT_SUCCESS(hsa_amd_vmem_handle_release(mem_handle));
if (dev_data) ASSERT_SUCCESS(hsa_amd_vmem_address_free(dev_data, sizeof(*dev_data)));
if (dev_data) {
ASSERT_SUCCESS(hsa_amd_vmem_address_free(dev_data, sizeof(*dev_data)));
}
if (host_data) hsa_memory_free(host_data);
if (kernArgsVirt) {
@@ -1070,7 +1072,7 @@ void VirtMemoryTestBasic::NonContiguousChunks(hsa_agent_t cpuAgent, hsa_agent_t
size_t& granule_size = pool_i.alloc_granule;
size_t alloc_size = granule_size * 512;
const uint64_t NUM_BUFFERS = 6;
const unsigned NUM_BUFFERS = 6;
void* addr;
void* addr_chunks[NUM_BUFFERS];
+3
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@@ -170,6 +170,9 @@ static void PrintAgentNameAndType(hsa_agent_t agent) {
case HSA_DEVICE_TYPE_DSP:
std::cout << "DSP)";
break;
case HSA_DEVICE_TYPE_AIE:
std::cout << "AIE)";
break;
}
std::cout << std::endl;
return;
+3
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@@ -242,6 +242,9 @@ static void PrintAgentNameAndType(hsa_agent_t agent) {
case HSA_DEVICE_TYPE_DSP:
std::cout << "DSP)";
break;
case HSA_DEVICE_TYPE_AIE:
std::cout << "AIE)";
break;
}
std::cout << std::endl;
return;
+7 -7
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@@ -95,13 +95,13 @@ public:
// AIE agent methods.
/// @brief Get the number of columns on this AIE agent.
int GetNumCols() const { return num_cols_; }
void SetNumCols(int num_cols) { num_cols_ = num_cols; }
uint32_t GetNumCols() const { return num_cols_; }
void SetNumCols(uint32_t num_cols) { num_cols_ = num_cols; }
/// @brief Get the number of core tile rows on this AIE agent.
int GetNumCoreRows() const { return num_core_rows_; }
void SetNumCoreRows(int num_core_rows) { num_core_rows_ = num_core_rows; }
uint32_t GetNumCoreRows() const { return num_core_rows_; }
void SetNumCoreRows(uint32_t num_core_rows) { num_core_rows_ = num_core_rows; }
/// @brief Get the number of core tiles on this AIE agent.
int GetNumCores() const { return num_cols_ * num_core_rows_; }
uint32_t GetNumCores() const { return num_cols_ * num_core_rows_; }
private:
/// @brief Query the driver to get the region list owned by this agent.
@@ -123,10 +123,10 @@ private:
const uint32_t max_queues_ = 1;
/// @brief Number of columns in the AIE array.
int num_cols_ = 0;
uint32_t num_cols_ = 0;
/// @brief Number of rows of core tiles in the AIE array. Not all rows in a
/// column are cores. Some can be memory or shim tiles.
int num_core_rows_ = 0;
uint32_t num_core_rows_ = 0;
};
} // namespace AMD
+1 -1
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@@ -116,7 +116,7 @@ public:
hsa_fence_scope_t releaseFence = HSA_FENCE_SCOPE_NONE,
hsa_signal_t *signal = NULL) override;
uint32_t queue_id_ = INVALID_QUEUEID;
HSA_QUEUEID queue_id_ = INVALID_QUEUEID;
/// @brief ID of AIE device on which this queue has been mapped.
uint32_t node_id_ = std::numeric_limits<uint32_t>::max();
/// @brief Queue size in bytes.
-2
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@@ -346,8 +346,6 @@ class AqlQueue : public core::Queue, private core::LocalSignal, public core::Doo
static KernelMutex queue_lock_;
return queue_lock_;
}
// Async scratch single limit - may be modified after init
size_t async_scratch_single_limit_;
static __forceinline int& rtti_id() {
static int rtti_id_ = 0;
+7 -7
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@@ -507,14 +507,14 @@ class GpuAgent : public GpuAgentInt {
hsa_status_t EnableDmaProfiling(bool enable) override;
hsa_status_t PcSamplingIterateConfig(hsa_ven_amd_pcs_iterate_configuration_callback_t cb,
void* cb_data);
hsa_status_t PcSamplingCreate(pcs::PcsRuntime::PcSamplingSession& session);
void* cb_data) override;
hsa_status_t PcSamplingCreate(pcs::PcsRuntime::PcSamplingSession& session) override;
hsa_status_t PcSamplingCreateFromId(HsaPcSamplingTraceId pcsId,
pcs::PcsRuntime::PcSamplingSession& session);
hsa_status_t PcSamplingDestroy(pcs::PcsRuntime::PcSamplingSession& session);
hsa_status_t PcSamplingStart(pcs::PcsRuntime::PcSamplingSession& session);
hsa_status_t PcSamplingStop(pcs::PcsRuntime::PcSamplingSession& session);
hsa_status_t PcSamplingFlush(pcs::PcsRuntime::PcSamplingSession& session);
pcs::PcsRuntime::PcSamplingSession& session) override;
hsa_status_t PcSamplingDestroy(pcs::PcsRuntime::PcSamplingSession& session) override;
hsa_status_t PcSamplingStart(pcs::PcsRuntime::PcSamplingSession& session) override;
hsa_status_t PcSamplingStop(pcs::PcsRuntime::PcSamplingSession& session) override;
hsa_status_t PcSamplingFlush(pcs::PcsRuntime::PcSamplingSession& session) override;
hsa_status_t PcSamplingFlushHostTrapDeviceBuffers(pcs::PcsRuntime::PcSamplingSession& session);
static void PcSamplingThreadRun(void* agent);
+6 -3
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@@ -4,7 +4,8 @@
#include "inc/hsa_amd_tool.h"
#include "runtime.h"
namespace rocr::AMD::tool {
// namespace rocr::AMD::tool { // C++17
namespace rocr { namespace AMD { namespace tool {
using scratch_alloc_flag = hsa_amd_event_scratch_alloc_flag_t;
@@ -135,7 +136,9 @@ __forceinline void notify_event_scratch_async_reclaim_end(const hsa_queue_t* que
hsa_amd_tool_event_t{.scratch_async_reclaim_end = &event});
}
} // namespace rocr::AMD::tool
// } // namespace rocr::AMD::tool
} // namespace rocr
} // namespace AMD
} // namespace tool
#endif
+1 -1
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@@ -559,7 +559,7 @@ BlitSdma<RingIndexTy, HwIndexMonotonic, SizeToCountOffset, useGCR>::SubmitCopyRe
const bool isGFX12Plus = (agent_->isa()->GetMajorVersion() >= 12);
// Common and GFX12 packet must match in size to use same code for vector/append.
static_assert(sizeof(SDMA_PKT_COPY_LINEAR_RECT) == sizeof(SDMA_PKT_COPY_LINEAR_RECT_GFX12));
static_assert(sizeof(SDMA_PKT_COPY_LINEAR_RECT) == sizeof(SDMA_PKT_COPY_LINEAR_RECT_GFX12), "");
const uint max_pitch = 1 << (isGFX12Plus ? SDMA_PKT_COPY_LINEAR_RECT_GFX12::pitch_bits : SDMA_PKT_COPY_LINEAR_RECT::pitch_bits);