rocr: Quiet some ROCr compile warnings
These are mostly AIE related, but there are a couple of others.
Change-Id: I549e004772160ca282d4c94dc9d94dd2ccae8b1c
[ROCm/ROCR-Runtime commit: 08699069d6]
Этот коммит содержится в:
коммит произвёл
Chris Freehill
родитель
6617af10e6
Коммит
dd037425ed
@@ -144,6 +144,9 @@ void AgentPropTest::QueryAgentProp(hsa_agent_t agent,
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case HSA_DEVICE_TYPE_DSP:
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ss << "DSP) : ";
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break;
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case HSA_DEVICE_TYPE_AIE:
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ss << "AIE) : ";
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break;
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}
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// Print the agent property
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@@ -183,6 +183,9 @@ static void PrintAgentNameAndType(hsa_agent_t agent) {
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case HSA_DEVICE_TYPE_DSP:
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std::cout << "DSP)";
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break;
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case HSA_DEVICE_TYPE_AIE:
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std::cout << "AIE)";
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break;
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}
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std::cout << std::endl;
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return;
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@@ -397,6 +397,9 @@ static void PrintAgentNameAndType(hsa_agent_t agent) {
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case HSA_DEVICE_TYPE_DSP:
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std::cout << "DSP)";
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break;
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case HSA_DEVICE_TYPE_AIE:
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std::cout << "AIE)";
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break;
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}
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std::cout << std::endl;
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return;
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@@ -530,13 +533,13 @@ void MemoryAllocationTest::MemoryAllocateContiguousTest(hsa_agent_t agent,
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accessible_gpus.push_back(gpuIter);
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}
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void* importedPtr;
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void* importedPtr = nullptr;
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size_t importedSz;
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ASSERT_SUCCESS(hsa_amd_interop_map_buffer(accessible_gpus.size(), accessible_gpus.data(), dmabuf, 0, &importedSz,
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&importedPtr, 0, NULL));
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ASSERT_NE((uint64_t)importedPtr, 0);
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ASSERT_NE(importedPtr, nullptr);
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ASSERT_EQ(importedSz, alloc_size);
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close(dmabuf);
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@@ -189,6 +189,10 @@ void MemoryTest::MaxSingleAllocationTest(hsa_agent_t ag,
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case HSA_DEVICE_TYPE_DSP:
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std::cout << "DSP)";
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break;
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case HSA_DEVICE_TYPE_AIE:
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std::cout << "AIE)";
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break;
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}
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std::cout << std::endl;
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}
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@@ -321,6 +325,9 @@ void MemoryTest::MemAvailableTest(hsa_agent_t ag, hsa_amd_memory_pool_t pool) {
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case HSA_DEVICE_TYPE_DSP:
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std::cout << "DSP)";
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break;
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case HSA_DEVICE_TYPE_AIE:
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std::cout << "AIE)";
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break;
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}
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std::cout << std::endl;
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}
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@@ -736,7 +736,9 @@ void VirtMemoryTestBasic::GPUAccessToCPUMemoryTest(hsa_agent_t cpuAgent, hsa_age
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ASSERT_SUCCESS(hsa_amd_vmem_unmap(dev_data, sizeof(*dev_data)));
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ASSERT_SUCCESS(hsa_amd_vmem_handle_release(mem_handle));
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if (dev_data) ASSERT_SUCCESS(hsa_amd_vmem_address_free(dev_data, sizeof(*dev_data)));
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if (dev_data) {
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ASSERT_SUCCESS(hsa_amd_vmem_address_free(dev_data, sizeof(*dev_data)));
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}
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if (host_data) hsa_memory_free(host_data);
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if (kernArgsVirt) {
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@@ -1070,7 +1072,7 @@ void VirtMemoryTestBasic::NonContiguousChunks(hsa_agent_t cpuAgent, hsa_agent_t
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size_t& granule_size = pool_i.alloc_granule;
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size_t alloc_size = granule_size * 512;
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const uint64_t NUM_BUFFERS = 6;
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const unsigned NUM_BUFFERS = 6;
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void* addr;
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void* addr_chunks[NUM_BUFFERS];
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@@ -170,6 +170,9 @@ static void PrintAgentNameAndType(hsa_agent_t agent) {
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case HSA_DEVICE_TYPE_DSP:
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std::cout << "DSP)";
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break;
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case HSA_DEVICE_TYPE_AIE:
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std::cout << "AIE)";
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break;
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}
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std::cout << std::endl;
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return;
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@@ -242,6 +242,9 @@ static void PrintAgentNameAndType(hsa_agent_t agent) {
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case HSA_DEVICE_TYPE_DSP:
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std::cout << "DSP)";
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break;
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case HSA_DEVICE_TYPE_AIE:
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std::cout << "AIE)";
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break;
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}
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std::cout << std::endl;
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return;
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@@ -95,13 +95,13 @@ public:
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// AIE agent methods.
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/// @brief Get the number of columns on this AIE agent.
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int GetNumCols() const { return num_cols_; }
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void SetNumCols(int num_cols) { num_cols_ = num_cols; }
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uint32_t GetNumCols() const { return num_cols_; }
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void SetNumCols(uint32_t num_cols) { num_cols_ = num_cols; }
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/// @brief Get the number of core tile rows on this AIE agent.
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int GetNumCoreRows() const { return num_core_rows_; }
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void SetNumCoreRows(int num_core_rows) { num_core_rows_ = num_core_rows; }
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uint32_t GetNumCoreRows() const { return num_core_rows_; }
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void SetNumCoreRows(uint32_t num_core_rows) { num_core_rows_ = num_core_rows; }
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/// @brief Get the number of core tiles on this AIE agent.
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int GetNumCores() const { return num_cols_ * num_core_rows_; }
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uint32_t GetNumCores() const { return num_cols_ * num_core_rows_; }
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private:
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/// @brief Query the driver to get the region list owned by this agent.
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@@ -123,10 +123,10 @@ private:
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const uint32_t max_queues_ = 1;
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/// @brief Number of columns in the AIE array.
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int num_cols_ = 0;
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uint32_t num_cols_ = 0;
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/// @brief Number of rows of core tiles in the AIE array. Not all rows in a
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/// column are cores. Some can be memory or shim tiles.
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int num_core_rows_ = 0;
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uint32_t num_core_rows_ = 0;
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};
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} // namespace AMD
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@@ -116,7 +116,7 @@ public:
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hsa_fence_scope_t releaseFence = HSA_FENCE_SCOPE_NONE,
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hsa_signal_t *signal = NULL) override;
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uint32_t queue_id_ = INVALID_QUEUEID;
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HSA_QUEUEID queue_id_ = INVALID_QUEUEID;
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/// @brief ID of AIE device on which this queue has been mapped.
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uint32_t node_id_ = std::numeric_limits<uint32_t>::max();
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/// @brief Queue size in bytes.
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@@ -346,8 +346,6 @@ class AqlQueue : public core::Queue, private core::LocalSignal, public core::Doo
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static KernelMutex queue_lock_;
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return queue_lock_;
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}
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// Async scratch single limit - may be modified after init
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size_t async_scratch_single_limit_;
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static __forceinline int& rtti_id() {
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static int rtti_id_ = 0;
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@@ -507,14 +507,14 @@ class GpuAgent : public GpuAgentInt {
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hsa_status_t EnableDmaProfiling(bool enable) override;
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hsa_status_t PcSamplingIterateConfig(hsa_ven_amd_pcs_iterate_configuration_callback_t cb,
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void* cb_data);
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hsa_status_t PcSamplingCreate(pcs::PcsRuntime::PcSamplingSession& session);
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void* cb_data) override;
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hsa_status_t PcSamplingCreate(pcs::PcsRuntime::PcSamplingSession& session) override;
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hsa_status_t PcSamplingCreateFromId(HsaPcSamplingTraceId pcsId,
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pcs::PcsRuntime::PcSamplingSession& session);
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hsa_status_t PcSamplingDestroy(pcs::PcsRuntime::PcSamplingSession& session);
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hsa_status_t PcSamplingStart(pcs::PcsRuntime::PcSamplingSession& session);
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hsa_status_t PcSamplingStop(pcs::PcsRuntime::PcSamplingSession& session);
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hsa_status_t PcSamplingFlush(pcs::PcsRuntime::PcSamplingSession& session);
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pcs::PcsRuntime::PcSamplingSession& session) override;
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hsa_status_t PcSamplingDestroy(pcs::PcsRuntime::PcSamplingSession& session) override;
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hsa_status_t PcSamplingStart(pcs::PcsRuntime::PcSamplingSession& session) override;
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hsa_status_t PcSamplingStop(pcs::PcsRuntime::PcSamplingSession& session) override;
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hsa_status_t PcSamplingFlush(pcs::PcsRuntime::PcSamplingSession& session) override;
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hsa_status_t PcSamplingFlushHostTrapDeviceBuffers(pcs::PcsRuntime::PcSamplingSession& session);
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static void PcSamplingThreadRun(void* agent);
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@@ -4,7 +4,8 @@
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#include "inc/hsa_amd_tool.h"
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#include "runtime.h"
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namespace rocr::AMD::tool {
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// namespace rocr::AMD::tool { // C++17
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namespace rocr { namespace AMD { namespace tool {
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using scratch_alloc_flag = hsa_amd_event_scratch_alloc_flag_t;
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@@ -135,7 +136,9 @@ __forceinline void notify_event_scratch_async_reclaim_end(const hsa_queue_t* que
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hsa_amd_tool_event_t{.scratch_async_reclaim_end = &event});
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}
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} // namespace rocr::AMD::tool
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// } // namespace rocr::AMD::tool
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} // namespace rocr
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} // namespace AMD
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} // namespace tool
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#endif
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@@ -559,7 +559,7 @@ BlitSdma<RingIndexTy, HwIndexMonotonic, SizeToCountOffset, useGCR>::SubmitCopyRe
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const bool isGFX12Plus = (agent_->isa()->GetMajorVersion() >= 12);
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// Common and GFX12 packet must match in size to use same code for vector/append.
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static_assert(sizeof(SDMA_PKT_COPY_LINEAR_RECT) == sizeof(SDMA_PKT_COPY_LINEAR_RECT_GFX12));
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static_assert(sizeof(SDMA_PKT_COPY_LINEAR_RECT) == sizeof(SDMA_PKT_COPY_LINEAR_RECT_GFX12), "");
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const uint max_pitch = 1 << (isGFX12Plus ? SDMA_PKT_COPY_LINEAR_RECT_GFX12::pitch_bits : SDMA_PKT_COPY_LINEAR_RECT::pitch_bits);
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