P4 to Git Change 2034784 by gandryey@gera-hip-lnx on 2019/11/21 16:31:24

SWDEV-79445 - OCL generic changes and code clean-up
	- Enable WGP mode in ROCr GFX10 by default
	- Read GPU_ENABLE_WAVE32_MODE environment variable to control wave32/64 on ROCr

Affected files ...

... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocdevice.cpp#142 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocsettings.cpp#46 edit


[ROCm/clr commit: d033b0eee9]
这个提交包含在:
foreman
2019-11-21 16:33:51 -05:00
父节点 1d5271c93d
当前提交 de2deaa6ce
修改 2 个文件,包含 13 行新增5 行删除
@@ -1024,6 +1024,10 @@ bool Device::populateOCLDeviceConstants() {
}
assert(info_.maxComputeUnits_ > 0);
info_.maxComputeUnits_ = settings().enableWgpMode_
? info_.maxComputeUnits_ / 2
: info_.maxComputeUnits_;
if (HSA_STATUS_SUCCESS != hsa_agent_get_info(_bkendDevice,
(hsa_agent_info_t)HSA_AMD_AGENT_INFO_CACHELINE_SIZE,
&info_.globalMemCacheLineSize_)) {
@@ -1406,10 +1410,8 @@ bool Device::populateOCLDeviceConstants() {
info_.gfxipVersion_ = deviceInfo_.gfxipVersion_;
info_.numAsyncQueues_ = kMaxAsyncQueues;
info_.numRTQueues_ = info_.numAsyncQueues_;
if (HSA_STATUS_SUCCESS !=
hsa_agent_get_info(_bkendDevice, (hsa_agent_info_t)HSA_AMD_AGENT_INFO_COMPUTE_UNIT_COUNT, &info_.numRTCUs_)) {
return false;
}
info_.numRTCUs_ = info_.maxComputeUnits_;
//TODO: set to true once thread trace support is available
info_.threadTraceEnable_ = false;
info_.pcieDeviceId_ = deviceInfo_.pciDeviceId_;
@@ -126,8 +126,14 @@ bool Settings::create(bool fullProfile, int gfxipVersion) {
}
if (gfxipVersion >= 1000) {
lcWavefrontSize64_ = false;
enableWave32Mode_ = true;
enableWgpMode_ = GPU_ENABLE_WGP_MODE;
}
if (!flagIsDefault(GPU_ENABLE_WAVE32_MODE)) {
enableWave32Mode_ = GPU_ENABLE_WAVE32_MODE;
}
lcWavefrontSize64_ = !enableWave32Mode_;
// Override current device settings
override();