P4 to Git Change 1178388 by asalmanp@asalmanp-opencl-stg on 2015/08/07 19:02:14

ECR #417452 - [OpenCL][HWS/CWSR] Adding support for Hardware Scheduler and Compute Wave Save Restore (CWSR) feature on ORCA. runtime changes
	ReviewBoardURL = http://ocltc.amd.com/reviews/r/8159/

Affected files ...

... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpuvirtual.cpp#371 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gslbe/src/rt/GSLDevice.cpp#132 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gslbe/src/rt/GSLDevice.h#53 edit
This commit is contained in:
foreman
2015-08-07 19:13:26 -04:00
parent f204610517
commit e09e1601dd
3 changed files with 11 additions and 5 deletions
+2 -1
View File
@@ -444,7 +444,8 @@ VirtualGPU::create(
hwRing_ = (dev().settings().useSingleScratch_) ? 0 : idx;
engineMask = dev().engines().getMask((gslEngineID)(dev().isComputeRingIDForced() ?
dev().getforcedComputeEngineID() : (GSL_ENGINEID_COMPUTE0 + idx)));
dev().getforcedComputeEngineID() :
(dev().getFirstAvailableComputeEngineID() + idx)));
if (dev().canDMA()) {
// If only 1 DMA engine is available then use that one
if (dev().engines().numDMAEngines() < 2) {
@@ -398,8 +398,9 @@ CALGSLDevice::SetupAdapter(int32 &asic_id)
bool
CALGSLDevice::SetupContext(int32 &asic_id)
{
gsl::gsCtx* temp_cs = m_adp->createComputeContext(m_computeRing ? (m_isComputeRingIDForced ? m_forcedComputeEngineID : GSL_ENGINEID_COMPUTE0)
: GSL_ENGINEID_3DCOMPUTE0, m_canDMA ? GSL_ENGINEID_DRMDMA0 : GSL_ENGINEID_INVALID, true);
gsl::gsCtx* temp_cs = m_adp->createComputeContext(m_computeRing ? (m_isComputeRingIDForced ? m_forcedComputeEngineID :
getFirstAvailableComputeEngineID()) : GSL_ENGINEID_3DCOMPUTE0,
m_canDMA ? GSL_ENGINEID_DRMDMA0 : GSL_ENGINEID_INVALID, true);
temp_cs->getMainSubCtx()->setVPUMask(m_vpuMask);
m_revision = temp_cs->getChipRev();
@@ -580,8 +581,9 @@ CALGSLDevice::PerformFullInitialization_int()
if (m_cs == 0)
{
m_cs = m_adp->createComputeContext(m_computeRing ? (m_isComputeRingIDForced ? m_forcedComputeEngineID : GSL_ENGINEID_COMPUTE0)
: GSL_ENGINEID_3DCOMPUTE0, m_canDMA ? GSL_ENGINEID_DRMDMA0 : GSL_ENGINEID_INVALID, false);
m_cs = m_adp->createComputeContext(m_computeRing ? (m_isComputeRingIDForced ? m_forcedComputeEngineID :
getFirstAvailableComputeEngineID()) : GSL_ENGINEID_3DCOMPUTE0,
m_canDMA ? GSL_ENGINEID_DRMDMA0 : GSL_ENGINEID_INVALID, false);
m_cs->getMainSubCtx()->setVPUMask(m_vpuMask);
//
@@ -134,6 +134,9 @@ public:
bool isComputeRingIDForced() const { return m_isComputeRingIDForced; }
gslEngineID getforcedComputeEngineID() const { return m_forcedComputeEngineID; }
gslEngineID getFirstAvailableComputeEngineID() const { return static_cast<gslEngineID>(
m_adp->findFirstAvailableComputeEngineID()); }
protected:
//
/// channel order enumerants