Add SVM aperture on gfx902

Because of HW design change, GPUVM aperture is no longer needed on GFX9
APUs. However, on APUs some functionalities still depend on GPUVM
aperture, so we choose to use SVM aperture instead to assume
the functionality of previous GPUVM aperture.

Change-Id: Ife7f0d598dd7989f2bcf7cdf3466d5a68703ca60
Signed-off-by: Yong Zhao <yong.zhao@amd.com>


[ROCm/ROCR-Runtime commit: 3b852b4437]

projects/rocr-runtime/src/fmm.c

@@ -703,12 +703,18 @@ static manageable_aperture_t *fmm_find_aperture(const void *address,
 			_info.type = HSA_APERTURE_DGPU;
 		}
 	} else { /* APU */
-		for (i = 0; i < gpu_mem_count; i++) {
-			if ((address >= gpu_mem[i].gpuvm_aperture.base) &&
-				(address <= gpu_mem[i].gpuvm_aperture.limit)) {
-				aperture = &gpu_mem[i].gpuvm_aperture;
-				_info.type = HSA_APERTURE_GPUVM;
-				_info.idx = i;
+		if (address >= svm.dgpu_aperture.base && address <= svm.dgpu_aperture.limit) {
+			aperture = &svm.dgpu_aperture;
+			_info.type = HSA_APERTURE_DGPU;
+		} else {
+			/* gpuvm_aperture */
+			for (i = 0; i < gpu_mem_count; i++) {
+				if ((address >= gpu_mem[i].gpuvm_aperture.base) &&
+					(address <= gpu_mem[i].gpuvm_aperture.limit)) {
+					aperture = &gpu_mem[i].gpuvm_aperture;
+					_info.type = HSA_APERTURE_GPUVM;
+					_info.idx = i;
+				}
 			}
 		}
 		if (!aperture) {
@@ -1577,7 +1583,7 @@ HSAKMT_STATUS fmm_init_process_apertures(unsigned int NumNodes)
 		gpu_mem[gpu_mem_id].scratch_aperture.limit =
 			PORT_UINT64_TO_VPTR(process_apertures[i].scratch_limit);
 
-		if (topology_is_dgpu(gpu_mem[gpu_mem_id].device_id)) {
+		if (topology_is_svm_needed(gpu_mem[gpu_mem_id].device_id)) {
 			uintptr_t alt_base;
 			uint64_t alt_size;
 			int err;
@@ -2582,7 +2588,7 @@ HSAKMT_STATUS fmm_register_graphics_handle(HSAuint64 GraphicsResourceHandle,
 	gpu_mem_id = gpu_mem_find_by_gpu_id(infoArgs.gpu_id);
 	if (gpu_mem_id < 0)
 		goto error_free_metadata;
-	if (topology_is_dgpu(gpu_mem[gpu_mem_id].device_id)) {
+	if (topology_is_svm_needed(gpu_mem[gpu_mem_id].device_id)) {
 		aperture = &svm.dgpu_aperture;
 		aperture_base = NULL;
 		offset = 0;

projects/rocr-runtime/src/libhsakmt.h

@@ -115,6 +115,7 @@ HSAKMT_STATUS topology_sysfs_get_node_props(uint32_t node_id, HsaNodeProperties
 		uint32_t *gpu_id, struct pci_access* pacc);
 HSAKMT_STATUS topology_sysfs_get_system_props(HsaSystemProperties *props);
 bool topology_is_dgpu(uint16_t device_id);
+bool topology_is_svm_needed(uint16_t device_id);
 HSAKMT_STATUS topology_get_asic_family(uint16_t device_id,
 					enum asic_family_type *asic);
 

projects/rocr-runtime/src/topology.c

@@ -590,6 +590,21 @@ bool topology_is_dgpu(uint16_t device_id)
 	return false;
 }
 
+bool topology_is_svm_needed(uint16_t device_id)
+{
+	const struct hsa_gfxip_table *hsa_gfxip;
+
+	if (topology_is_dgpu(device_id))
+		return true;
+
+	hsa_gfxip = find_hsa_gfxip_device(device_id);
+
+	if (hsa_gfxip && hsa_gfxip->asic_family >= CHIP_VEGA10)
+		return true;
+
+	return false;
+}
+
 static HSAKMT_STATUS topology_get_cpu_model_name(HsaNodeProperties *props,
 						 bool is_apu)
 {