P4 to Git Change 1332913 by gandryey@gera-w8 on 2016/10/27 16:30:43

SWDEV-95912 - OpenCL on PAL - RT Compute
	- Check for the queue properties before requesting the exclusive queues.

Affected files ...

... //depot/stg/opencl/drivers/opencl/runtime/device/pal/paldevice.cpp#29 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/paldevice.hpp#12 edit
This commit is contained in:
foreman
2016-10-27 16:44:33 -04:00
والد 54858df82b
کامیت e59cdca320
2فایلهای تغییر یافته به همراه29 افزوده شده و 7 حذف شده
@@ -183,7 +183,7 @@ NullDevice::create(Pal::AsicRevision asicRevision, Pal::GfxIpLevel ipLevel)
} }
// Fill the device info structure // Fill the device info structure
fillDeviceInfo(properties, heaps, 4096, 1); fillDeviceInfo(properties, heaps, 4096, 1, 0);
// Runtime doesn't know what local size could be on the real board // Runtime doesn't know what local size could be on the real board
info_.maxGlobalVariableSize_ = static_cast<size_t>(512 * Mi); info_.maxGlobalVariableSize_ = static_cast<size_t>(512 * Mi);
@@ -212,7 +212,8 @@ void NullDevice::fillDeviceInfo(
const Pal::DeviceProperties& palProp, const Pal::DeviceProperties& palProp,
const Pal::GpuMemoryHeapProperties heaps[Pal::GpuHeapCount], const Pal::GpuMemoryHeapProperties heaps[Pal::GpuHeapCount],
size_t maxTextureSize, size_t maxTextureSize,
uint numComputeRings) uint numComputeRings,
uint numExclusiveComputeRings)
{ {
info_.type_ = CL_DEVICE_TYPE_GPU; info_.type_ = CL_DEVICE_TYPE_GPU;
info_.vendorId_ = palProp.vendorId; info_.vendorId_ = palProp.vendorId;
@@ -476,8 +477,7 @@ void NullDevice::fillDeviceInfo(
info_.localMemBanks_ = hwInfo()->localMemBanks_; info_.localMemBanks_ = hwInfo()->localMemBanks_;
info_.gfxipVersion_ = hwInfo()->gfxipVersion_; info_.gfxipVersion_ = hwInfo()->gfxipVersion_;
info_.numAsyncQueues_ = numComputeRings; info_.numAsyncQueues_ = numComputeRings;
info_.numRTQueues_ = info_.numRTQueues_ = numExclusiveComputeRings;
palProp.engineProperties[Pal::EngineTypeExclusiveCompute].engineCount - 1;
info_.numRTCUs_ = info_.numRTCUs_ =
palProp.engineProperties[Pal::EngineTypeExclusiveCompute].maxNumDedicatedCu; palProp.engineProperties[Pal::EngineTypeExclusiveCompute].maxNumDedicatedCu;
info_.threadTraceEnable_ = settings().threadTraceEnable_; info_.threadTraceEnable_ = settings().threadTraceEnable_;
@@ -615,6 +615,7 @@ Device::Device()
, mapCache_(nullptr) , mapCache_(nullptr)
, resourceCache_(nullptr) , resourceCache_(nullptr)
, numComputeEngines_(0) , numComputeEngines_(0)
, numExclusiveComputeEngines_(0)
, numDmaEngines_(0) , numDmaEngines_(0)
, heapInitComplete_(false) , heapInitComplete_(false)
, xferQueue_(nullptr) , xferQueue_(nullptr)
@@ -708,6 +709,18 @@ Device::create(Pal::IDevice* device)
// Find the number of available engines // Find the number of available engines
numComputeEngines_ = numComputeEngines_ =
properties().engineProperties[Pal::EngineTypeCompute].engineCount; properties().engineProperties[Pal::EngineTypeCompute].engineCount;
if (properties().engineProperties[Pal::EngineTypeExclusiveCompute].
maxNumDedicatedCu > 0) {
for (uint i = 0; i < properties().engineProperties[
Pal::EngineTypeExclusiveCompute].engineCount; ++i) {
if (properties().engineProperties[
Pal::EngineTypeExclusiveCompute].capabilities[i].rtCuHighCompute ||
properties().engineProperties[
Pal::EngineTypeExclusiveCompute].capabilities[i].rtCuMedCompute) {
numExclusiveComputeEngines_++;
}
}
}
numDmaEngines_ = numDmaEngines_ =
properties().engineProperties[Pal::EngineTypeDma].engineCount; properties().engineProperties[Pal::EngineTypeDma].engineCount;
@@ -730,12 +743,16 @@ Device::create(Pal::IDevice* device)
finalizeInfo.requestedEngineCounts[Pal::EngineTypeCompute].engines = finalizeInfo.requestedEngineCounts[Pal::EngineTypeCompute].engines =
((1 << numComputeEngines_) - 1); ((1 << numComputeEngines_) - 1);
// Request real time compute engines // Request real time compute engines
finalizeInfo.requestedEngineCounts[Pal::EngineTypeExclusiveCompute].engines = 3; finalizeInfo.requestedEngineCounts[Pal::EngineTypeExclusiveCompute].engines =
((1 << numExclusiveComputeEngines_) - 1);
// Request all SDMA engines // Request all SDMA engines
finalizeInfo.requestedEngineCounts[Pal::EngineTypeDma].engines = finalizeInfo.requestedEngineCounts[Pal::EngineTypeDma].engines =
(1 << numDmaEngines_) - 1; (1 << numDmaEngines_) - 1;
result = iDev()->Finalize(finalizeInfo); result = iDev()->Finalize(finalizeInfo);
if (result != Pal::Result::Success) {
return false;
}
} }
Pal::GpuMemoryHeapProperties heaps[Pal::GpuHeapCount]; Pal::GpuMemoryHeapProperties heaps[Pal::GpuHeapCount];
@@ -806,7 +823,7 @@ Device::create(Pal::IDevice* device)
} }
// Fill the device info structure // Fill the device info structure
fillDeviceInfo(properties(), heaps, 16*Ki, numComputeEngines()); fillDeviceInfo(properties(), heaps, 16*Ki, numComputeEngines(), numExclusiveComputeEngines());
#ifdef DEBUG #ifdef DEBUG
std::stringstream message; std::stringstream message;
@@ -122,7 +122,8 @@ protected:
const Pal::DeviceProperties& palProp,//!< PAL device properties const Pal::DeviceProperties& palProp,//!< PAL device properties
const Pal::GpuMemoryHeapProperties heaps[Pal::GpuHeapCount], const Pal::GpuMemoryHeapProperties heaps[Pal::GpuHeapCount],
size_t maxTextureSize, //!< Maximum texture size supported in HW size_t maxTextureSize, //!< Maximum texture size supported in HW
uint numComputeRings //!< Number of compute rings uint numComputeRings, //!< Number of compute rings
uint numExclusiveComputeRings //!< Number of exclusive compute rings
); );
}; };
@@ -412,6 +413,9 @@ public:
//! Returns the number of available compute rings //! Returns the number of available compute rings
uint numComputeEngines() const { return numComputeEngines_; } uint numComputeEngines() const { return numComputeEngines_; }
//! Returns the number of available compute rings
uint numExclusiveComputeEngines() const { return numExclusiveComputeEngines_; }
//! Returns the number of available DMA engines //! Returns the number of available DMA engines
uint numDMAEngines() const { return numDmaEngines_; } uint numDMAEngines() const { return numDmaEngines_; }
@@ -548,6 +552,7 @@ private:
std::vector<amd::Memory*>* mapCache_; //!< Map cache info structure std::vector<amd::Memory*>* mapCache_; //!< Map cache info structure
ResourceCache* resourceCache_; //!< Resource cache ResourceCache* resourceCache_; //!< Resource cache
uint numComputeEngines_; //!< The number of available compute engines uint numComputeEngines_; //!< The number of available compute engines
uint numExclusiveComputeEngines_; //!< The number of available compute engines
uint numDmaEngines_; //!< The number of available compute engines uint numDmaEngines_; //!< The number of available compute engines
bool heapInitComplete_; //!< Keep track of initialization status of heap resources bool heapInitComplete_; //!< Keep track of initialization status of heap resources
VirtualGPU* xferQueue_; //!< Transfer queue VirtualGPU* xferQueue_; //!< Transfer queue