Integrated support for using rocscope with omniperf for top10 (--i-feel-lucky)

Signed-off-by: coleramos425 <colramos@amd.com>

src/common.py

@@ -29,7 +29,7 @@ OMNIPERF_HOME = Path(__file__).resolve().parent
 
 # OMNIPERF INFO
 PROG = "omniperf"
-SOC_LIST = ["mi50", "mi100", "mi200"]
+SOC_LIST = ["mi50", "mi100", "mi200", "vega10"]
 DISTRO_MAP = {"platform:el8": "rhel8", "15.3": "sle15sp3", "20.04": "ubuntu20_04"}
 version = os.path.join(OMNIPERF_HOME.parent, "VERSION")
 try:

src/omniperf

@@ -80,6 +80,8 @@ def get_soc():
         target = "mi100"
     elif mspec.GPU == "gfx90a":
         target = "mi200"
+    elif mspec.GPU == "gfx900":
+        target = "vega10"
     else:
         print("\nInvalid SoC")
         sys.exit(0)
@@ -328,6 +330,9 @@ def omniperf_profile(args):
     workload_dir = args.path + "/" + args.name + "/" + args.target
     perfmon_dir = str(OMNIPERF_HOME) + "/perfmon_pub"
     
+    # Perfmon filtering
+    perfmon_filter(workload_dir, perfmon_dir, args)
+
     if not args.lucky == None and args.lucky == True:
         print("You're feeling lucky - only profiling top N kernels")
         #look for whether workload_dir exists  - create if not
@@ -337,6 +342,51 @@ def omniperf_profile(args):
             print("Unable to create workload directory: ", workload_dir)
             print(e)
             sys.exit(1)
+
+        result = subprocess.run(["which", "rocscope"], stdout=subprocess.PIPE, stderr=subprocess.DEVNULL)
+        if result.returncode == 0:
+            rs_cmd = [result.stdout.decode('ascii').strip(), 
+                      "top10",
+                      "-p", args.path,
+                      "-n", args.name,
+                      "--", args.remaining]
+            print(rs_cmd)
+            result = subprocess.run(rs_cmd) #, stdout=subprocess.PIPE, stderr=subprocess.PIPE)
+            if result.returncode != 0:
+                print(result.stderr.decode('ascii'))
+        else:
+            print("rocscope must be in the PATH")
+            sys.exit(1)
+    else:
+        for fname in glob.glob(workload_dir + "/perfmon/*.txt"):
+            # Kernel filtering (in-place replacement)
+            if not args.kernel == None:
+                subprocess.run(
+                    [
+                        "sed",
+                        "-i",
+                        "-r",
+                        "s%^(kernel:).*%" + "kernel: " + ",".join(args.kernel) + "%g",
+                        fname,
+                    ]
+                )
+
+            # Dispatch filtering (inplace replacement)
+            if not args.dispatch == None:
+                subprocess.run(
+                    [
+                        "sed",
+                        "-i",
+                        "-r",
+                        "s%^(range:).*%" + "range: " + " ".join(args.dispatch) + "%g",
+                        fname,
+                    ]
+                )
+            run_prof(fname, workload_dir, perfmon_dir, args.remaining, args.verbose)
+        
+
+
+        # run again with timestamps
         subprocess.run(
             [
                 rocprof_cmd,
@@ -349,69 +399,9 @@ def omniperf_profile(args):
                 '"' + args.remaining + '"',
             ]
         )
-        df_stamps = pd.read_csv(workload_dir + "/timestamps.csv")
-        df_elapsed = df_stamps['EndNs'] - df_stamps['BeginNs']
-        df_stamps['Duration'] = df_elapsed
-        if args.dispatch == None:
-            args.dispatch = list(map(lambda x: str(x) + ':' + str(x), df_stamps.sort_values(by=['Duration'], ascending=False)['Index'].iloc[0:5].tolist()))
-        else:
-            ids = df_stamps.sort_values(by=['Duration'], ascending=False)['Index'].iloc[0:5].tolist()
-            dispatch = {}
-            for d in ids:
-                dispatch[d] = d
-            for d in args.dispatch:
-                dispatch[d] = d
-            args.dispatch = list(map(lambda x: str(x) + ':' + str(x),dispatch.values()))
 
-
-
-    # Perfmon filtering
-    perfmon_filter(workload_dir, perfmon_dir, args)
-
-
-    # Workload profiling
-    for fname in glob.glob(workload_dir + "/perfmon/*.txt"):
-        # Kernel filtering (in-place replacement)
-        if not args.kernel == None:
-            subprocess.run(
-                [
-                    "sed",
-                    "-i",
-                    "-r",
-                    "s%^(kernel:).*%" + "kernel: " + ",".join(args.kernel) + "%g",
-                    fname,
-                ]
-            )
-
-        # Dispatch filtering (inplace replacement)
-        if not args.dispatch == None:
-            subprocess.run(
-                [
-                    "sed",
-                    "-i",
-                    "-r",
-                    "s%^(range:).*%" + "range: " + " ".join(args.dispatch) + "%g",
-                    fname,
-                ]
-            )
-        run_prof(fname, workload_dir, perfmon_dir, args.remaining, args.verbose)
-
-    # run again with timestamps
-    subprocess.run(
-        [
-            rocprof_cmd,
-            # "-i", fname,
-            # "-m", perfmon_dir + "/" + "metrics.xml",
-            "--timestamp",
-            "on",
-            "-o",
-            workload_dir + "/" + "timestamps.csv",
-            '"' + args.remaining + '"',
-        ]
-    )
-
-    # Update pmc_perf.csv timestamps
-    replace_timestamps(workload_dir)
+        # Update pmc_perf.csv timestamps
+        replace_timestamps(workload_dir)
 
     # Generate sysinfo
     gen_sysinfo(args.name, workload_dir, args.ipblocks, args.no_roof)
@@ -466,6 +456,7 @@ def main():
     # PROFILE MODE
     ##############
     if args.mode == "profile":
+        print("Resolving rocprof")
         resolve_rocprof()
         if ".." in str(args.path):
             throw_parse_error(

src/perfmon_pub/metrics.xml

@@ -1,6 +1,7 @@
 #include "gfx906_metrics.xml"
 #include "gfx908_metrics.xml"
 #include "gfx90a_metrics.xml"
+#include "gfx900_metrics.xml"
 
 <gfx8_expr>
   <metric name="TA_BUSY_avr" expr=avr(TA_TA_BUSY,16) descr="TA block is busy. Average over TA instances."></metric>
@@ -22,7 +23,7 @@
   <metric name="WRITE_REQ_32B" expr=TCC_MC_WRREQ_sum descr="The total number of 32-byte effective memory writes."></metric>
 </gfx8_expr>
 
-<gfx9_expr>
+<gfx900_expr>
   <metric name="TA_BUSY_avr" expr=avr(TA_TA_BUSY,16) descr="TA block is busy. Average over TA instances."></metric>
   <metric name="TA_BUSY_max" expr=max(TA_TA_BUSY,16) descr="TA block is busy. Max over TA instances."></metric>
   <metric name="TA_BUSY_min" expr=min(TA_TA_BUSY,16) descr="TA block is busy. Min over TA instances."></metric>
@@ -197,7 +198,7 @@
   #<metric name="TCP_TCC_RW_WRITE_REQ_sum"                               expr=sum(TCP_TCC_RW_WRITE_REQ,16) descr="."></metric>
   #<metric name="TCP_TCC_RW_ATOMIC_REQ_sum"                              expr=sum(TCP_TCC_RW_ATOMIC_REQ,16) descr="."></metric>
 
-</gfx9_expr>
+</gfx900_expr>
 
 <gfx906_expr base="gfx9_expr">
   # EA1

src/perfmon_pub/vega10/pmc_cpc_perf.txt

@@ -0,0 +1,15 @@
+pmc: GRBM_COUNT  GRBM_GUI_ACTIVE        SQ_CYCLES       SQ_BUSY_CYCLES      SQ_WAVES     
+
+pmc: CPC_CPC_STAT_BUSY      CPC_CPC_STAT_IDLE
+pmc: CPC_CPC_TCIU_BUSY      CPC_CPC_TCIU_IDLE
+pmc: CPC_CPC_STAT_STALL     CPC_UTCL1_STALL_ON_TRANSLATION                   
+pmc: CPC_CPC_UTCL2IU_BUSY    CPC_CPC_UTCL2IU_IDLE    
+pmc: CPC_CPC_UTCL2IU_STALL   CPC_ME1_BUSY_FOR_PACKET_DECODE  
+pmc: CPC_ME1_DC0_SPI_BUSY
+
+range:
+gpu: 
+
+kernel: 
+
+

src/perfmon_pub/vega10/pmc_cpf_perf.txt

@@ -0,0 +1,13 @@
+pmc: GRBM_COUNT                 GRBM_GUI_ACTIVE                 SQ_CYCLES                       SQ_BUSY_CYCLES                  SQ_WAVES         
+
+pmc: CPF_CPF_STAT_BUSY                          CPF_CPF_STAT_STALL
+pmc: CPF_CPF_TCIU_BUSY                          CPF_CPF_TCIU_STALL
+pmc: CPF_CPF_STAT_IDLE                          CPF_CPF_TCIU_IDLE
+pmc: CPF_CMP_UTCL1_STALL_ON_TRANSLATION          
+
+range: 
+gpu: 
+
+kernel: 
+
+

src/perfmon_pub/vega10/pmc_spi_perf.txt

@@ -0,0 +1,12 @@
+pmc: GRBM_COUNT             GRBM_GUI_ACTIVE            SQ_CYCLES                   SQ_BUSY_CYCLES            SQ_WAVES                   GRBM_SPI_BUSY
+
+pmc: SPI_CSN_WINDOW_VALID   SPI_CSN_BUSY               SPI_CSN_NUM_THREADGROUPS    SPI_CSN_WAVE              SPI_RA_REQ_NO_ALLOC        SPI_RA_REQ_NO_ALLOC_CSN     
+pmc: SPI_RA_RES_STALL_CSN   SPI_RA_TMP_STALL_CSN       SPI_RA_WAVE_SIMD_FULL_CSN   SPI_RA_VGPR_SIMD_FULL_CSN SPI_RA_SGPR_SIMD_FULL_CSN  SPI_RA_LDS_CU_FULL_CSN 
+pmc: SPI_RA_BAR_CU_FULL_CSN SPI_RA_TGLIM_CU_FULL_CSN   SPI_RA_WVLIM_STALL_CSN      SPI_SWC_CSC_WR            SPI_VWC_CSC_WR             SPI_RA_BULKY_CU_FULL_CSN
+
+range: 
+gpu: 
+
+kernel: 
+
+

src/perfmon_pub/vega10/pmc_sq_perf1.txt

@@ -0,0 +1,31 @@
+#SQ
+pmc: GRBM_COUNT                    GRBM_GUI_ACTIVE                                     SQ_INSTS_VMEM_WR        SQ_INSTS_VMEM_RD       SQ_INSTS_VMEM            SQ_INSTS_SALU              SQ_INSTS_VSKIPPED         
+pmc: SQ_INSTS_SMEM                 SQ_INSTS_FLAT               SQ_INSTS_LDS            SQ_INSTS_GDS            SQ_INSTS_EXP_GDS       SQ_INSTS_BRANCH          SQ_INSTS_SENDMSG           SQ_INSTS    
+pmc: SQ_WAVE_CYCLES                SQ_WAIT_ANY                 SQ_WAIT_INST_ANY        SQ_ACTIVE_INST_ANY      SQ_CYCLES              SQ_BUSY_CYCLES           SQ_BUSY_CU_CYCLES          SQ_INSTS_VALU
+pmc: SQ_ACTIVE_INST_VMEM           SQ_ACTIVE_INST_LDS          SQ_ACTIVE_INST_VALU     SQ_ACTIVE_INST_SCA      SQ_ACTIVE_INST_EXP_GDS SQ_ACTIVE_INST_MISC      SQ_ACTIVE_INST_FLAT        SQ_INST_CYCLES_VMEM_WR
+pmc: SQ_INST_CYCLES_VMEM_RD        SQ_INST_CYCLES_SMEM         SQ_INST_CYCLES_SALU     SQ_THREAD_CYCLES_VALU   SQ_IFETCH              SQ_LDS_BANK_CONFLICT     SQ_LDS_ADDR_CONFLICT       SQ_LDS_UNALIGNED_STALL
+pmc: SQ_WAVES                      SQ_WAVES_EQ_64              SQ_WAVES_LT_64          SQ_WAVES_LT_48          SQ_WAVES_LT_32         SQ_WAVES_LT_16           SQ_ITEMS                   SQ_INSTS_VSKIPPED      
+pmc: SQ_LDS_MEM_VIOLATIONS         SQ_LDS_ATOMIC_RETURN        SQ_LDS_IDX_ACTIVE       SQ_WAVES_RESTORED       SQ_WAVES_SAVED         SQ_INSTS_SMEM_NORM                           
+
+
+#SQ:MI200
+#pmc: SQ_INSTS_MFMA              SQ_INSTS_VALU_MFMA_I8         SQ_INSTS_VALU_MFMA_F16      SQ_INSTS_VALU_MFMA_BF16       SQ_INSTS_VALU_MFMA_F32        SQ_INSTS_VALU_MFMA_F64        SQ_VALU_MFMA_BUSY_CYCLES    
+#pmc: SQ_INSTS_FLAT_LDS_ONLY     SQ_INSTS_VALU_MFMA_MOPS_I8    SQ_INSTS_VALU_MFMA_MOPS_F16 SQ_INSTS_VALU_MFMA_MOPS_BF16  SQ_INSTS_VALU_MFMA_MOPS_F32   SQ_INSTS_VALU_MFMA_MOPS_F64  
+
+#SQC
+pmc: SQC_TC_INST_REQ               SQC_TC_DATA_READ_REQ        SQC_TC_DATA_WRITE_REQ    SQC_TC_DATA_ATOMIC_REQ       SQC_TC_STALL                    SQC_TC_REQ               SQC_DCACHE_REQ_READ_16 
+pmc: SQC_ICACHE_REQ                SQC_ICACHE_HITS             SQC_ICACHE_MISSES        SQC_ICACHE_MISSES_DUPLICATE  SQC_DCACHE_INPUT_VALID_READYB   SQC_DCACHE_ATOMIC        SQC_DCACHE_REQ_READ_8  
+pmc: SQC_DCACHE_REQ                SQC_DCACHE_HITS             SQC_DCACHE_MISSES        SQC_DCACHE_MISSES_DUPLICATE  SQC_DCACHE_REQ_READ_1           SQC_DCACHE_REQ_READ_2    SQC_DCACHE_REQ_READ_4 
+
+
+
+########################################
+# Filtering
+########################################
+range: 
+gpu: 
+kernel: 
+
+
+
+

src/perfmon_pub/vega10/pmc_sq_perf2.txt

@@ -0,0 +1,12 @@
+#################################################
+# VMEM latency
+#################################################
+pmc: SQ_INSTS_VMEM  SQ_INST_LEVEL_VMEM SQ_ACCUM_PREV_HIRES
+
+
+range: 
+gpu: 
+
+kernel: 
+
+

src/perfmon_pub/vega10/pmc_sq_perf3.txt

@@ -0,0 +1,13 @@
+#################################################
+# SMEM latency
+#################################################
+pmc: SQ_INSTS_SMEM  SQ_INST_LEVEL_SMEM SQ_ACCUM_PREV_HIRES
+
+
+range: 
+gpu: 
+
+
+kernel: 
+
+

src/perfmon_pub/vega10/pmc_sq_perf4.txt

@@ -0,0 +1,11 @@
+#################################################
+# ifetch latency
+#################################################
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_WAVES SQ_IFETCH SQ_IFETCH_LEVEL  SQ_ACCUM_PREV_HIRES
+
+range: 
+gpu: 
+kernel: 
+
+
+

src/perfmon_pub/vega10/pmc_sq_perf6.txt

@@ -0,0 +1,15 @@
+#################################################
+# LDS latency
+#################################################
+pmc: SQ_INSTS_LDS SQ_INST_LEVEL_LDS  SQ_ACCUM_PREV_HIRES
+
+range: 
+gpu: 
+
+kernel: 
+
+
+
+
+
+

src/perfmon_pub/vega10/pmc_sq_perf8.txt

@@ -0,0 +1,7 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE CPC_ME1_BUSY_FOR_PACKET_DECODE SQ_CYCLES SQ_WAVES SQ_WAVE_CYCLES SQ_BUSY_CYCLES SQ_LEVEL_WAVES  SQ_ACCUM_PREV_HIRES 
+
+gpu: 
+range: 
+
+kernel: 
+

src/perfmon_pub/vega10/pmc_sqc_perf1.txt

@@ -0,0 +1,12 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES
+
+
+pmc: SQC_TC_INST_REQ               SQC_TC_DATA_READ_REQ        SQC_TC_DATA_WRITE_REQ    SQC_TC_DATA_ATOMIC_REQ       SQC_TC_STALL                    SQC_TC_REQ               SQC_DCACHE_REQ_READ_16 
+pmc: SQC_ICACHE_REQ                SQC_ICACHE_HITS             SQC_ICACHE_MISSES        SQC_ICACHE_MISSES_DUPLICATE  SQC_DCACHE_INPUT_VALID_READYB   SQC_DCACHE_ATOMIC        SQC_DCACHE_REQ_READ_8  
+pmc: SQC_DCACHE_REQ                SQC_DCACHE_HITS             SQC_DCACHE_MISSES        SQC_DCACHE_MISSES_DUPLICATE  SQC_DCACHE_REQ_READ_1           SQC_DCACHE_REQ_READ_2    SQC_DCACHE_REQ_READ_4 
+
+range: 
+gpu:  
+
+kernel: 
+

src/perfmon_pub/vega10/pmc_ta_perf.txt

@@ -0,0 +1,37 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES 
+
+pmc: TA_TA_BUSY_sum                      TA_SH_FIFO_BUSY_sum                 
+pmc: TA_SH_FIFO_CMD_BUSY_sum             TA_SH_FIFO_ADDR_BUSY_sum            
+pmc: TA_SH_FIFO_DATA_BUSY_sum            TA_SH_FIFO_DATA_SFIFO_BUSY_sum      
+pmc: TA_SH_FIFO_DATA_TFIFO_BUSY_sum      TA_SQ_TA_CMD_CYCLES_sum             
+pmc: TA_SP_TA_ADDR_CYCLES_sum            TA_SP_TA_DATA_CYCLES_sum 
+
+
+# Starvation
+pmc: TA_SH_FIFO_ADDR_STARVED_WHILE_BUSY_CYCLES_sum          TA_SH_FIFO_CMD_STARVED_WHILE_BUSY_CYCLES_sum
+pmc: TA_SH_FIFO_DATA_STARVED_WHILE_BUSY_CYCLES_sum          TA_TA_SH_FIFO_STARVED_sum
+
+
+
+# buffer access
+pmc: TA_BUFFER_WAVEFRONTS_sum                   TA_BUFFER_READ_WAVEFRONTS_sum
+pmc: TA_BUFFER_WRITE_WAVEFRONTS_sum             TA_BUFFER_ATOMIC_WAVEFRONTS_sum
+pmc: TA_BUFFER_TOTAL_CYCLES_sum                 TA_BUFFER_COALESCABLE_WAVEFRONTS_sum
+pmc: TA_BUFFER_COALESCED_READ_CYCLES_sum        TA_BUFFER_COALESCED_WRITE_CYCLES_sum
+
+
+# stalls
+pmc: TA_ADDR_STALLED_BY_TC_CYCLES_sum    TA_TOTAL_WAVEFRONTS_sum
+pmc: TA_ADDR_STALLED_BY_TD_CYCLES_sum    TA_DATA_STALLED_BY_TC_CYCLES_sum    
+
+# flat accesses
+pmc: TA_FLAT_WAVEFRONTS_sum              TA_FLAT_READ_WAVEFRONTS_sum         
+pmc: TA_FLAT_WRITE_WAVEFRONTS_sum        TA_FLAT_ATOMIC_WAVEFRONTS_sum       
+pmc: TA_FLAT_COALESCEABLE_WAVEFRONTS_sum 
+
+
+range: 
+
+gpu:
+
+kernel: 

src/perfmon_pub/vega10/pmc_tcc2_perf.txt

@@ -0,0 +1,26 @@
+pmc: GRBM_COUNT         GRBM_GUI_ACTIVE         SQ_CYCLES       SQ_BUSY_CYCLES          SQ_WAVES
+
+# MI50: no TCC_RW_REQ
+pmc: TCC_CYCLE[0]           TCC_HIT[0]                  TCC_MISS[0]  TCC_CYCLE[1]                   TCC_HIT[1]                  TCC_MISS[1]  TCC_CYCLE[2]                   TCC_HIT[2]                  TCC_MISS[2]  TCC_CYCLE[3]                TCC_HIT[3]                  TCC_MISS[3]  TCC_CYCLE[4]                   TCC_HIT[4]                  TCC_MISS[4]  TCC_CYCLE[5]                   TCC_HIT[5]                  TCC_MISS[5]  TCC_CYCLE[6]                   TCC_HIT[6]                  TCC_MISS[6]  TCC_CYCLE[7]   TCC_HIT[7]                  TCC_MISS[7]  TCC_CYCLE[8]                   TCC_HIT[8]                  TCC_MISS[8]  TCC_CYCLE[9]                   TCC_HIT[9]                  TCC_MISS[9]  TCC_CYCLE[10]                  TCC_HIT[10]                 TCC_MISS[10] TCC_CYCLE[11]                  TCC_HIT[11]                 TCC_MISS[11] TCC_CYCLE[12]                  TCC_HIT[12]                 TCC_MISS[12] TCC_CYCLE[13]                  TCC_HIT[13]                 TCC_MISS[13] TCC_CYCLE[14]                  TCC_HIT[14]                 TCC_MISS[14] TCC_CYCLE[15]                  TCC_HIT[15]                 TCC_MISS[15] 
+
+
+
+pmc: TCC_REQ[0]                     TCC_READ[0]                 TCC_WRITE[0]                TCC_ATOMIC[0]   TCC_REQ[1]                     TCC_READ[1]                 TCC_WRITE[1]                TCC_ATOMIC[1]   TCC_REQ[2]                     TCC_READ[2]                 TCC_WRITE[2]                TCC_ATOMIC[2]   TCC_REQ[3]                     TCC_READ[3]                 TCC_WRITE[3]                TCC_ATOMIC[3]   TCC_REQ[4]                     TCC_READ[4]                 TCC_WRITE[4]                TCC_ATOMIC[4]   TCC_REQ[5]                     TCC_READ[5]                 TCC_WRITE[5]                TCC_ATOMIC[5]   TCC_REQ[6]                     TCC_READ[6]                 TCC_WRITE[6]                TCC_ATOMIC[6]   TCC_REQ[7]                     TCC_READ[7]                 TCC_WRITE[7]                TCC_ATOMIC[7]   TCC_REQ[8]                     TCC_READ[8]                 TCC_WRITE[8]                TCC_ATOMIC[8]   TCC_REQ[9]                     TCC_READ[9]                 TCC_WRITE[9]                TCC_ATOMIC[9]   TCC_REQ[10]                    TCC_READ[10]                TCC_WRITE[10]               TCC_ATOMIC[10]  TCC_REQ[11]                    TCC_READ[11]                TCC_WRITE[11]               TCC_ATOMIC[11]  TCC_REQ[12]                    TCC_READ[12]                TCC_WRITE[12]               TCC_ATOMIC[12]  TCC_REQ[13]                    TCC_READ[13]                TCC_WRITE[13]               TCC_ATOMIC[13]  TCC_REQ[14]                    TCC_READ[14]                TCC_WRITE[14]               TCC_ATOMIC[14]  TCC_REQ[15]                    TCC_READ[15]                TCC_WRITE[15]               TCC_ATOMIC[15]  
+
+
+
+pmc: TCC_EA_RDREQ[0]                TCC_EA_RDREQ_32B[0]         TCC_EA_WRREQ[0]             TCC_EA_WRREQ_64B[0]   TCC_EA_RDREQ[1]                TCC_EA_RDREQ_32B[1]         TCC_EA_WRREQ[1]             TCC_EA_WRREQ_64B[1]   TCC_EA_RDREQ[2]                TCC_EA_RDREQ_32B[2]         TCC_EA_WRREQ[2]             TCC_EA_WRREQ_64B[2]   TCC_EA_RDREQ[3]                TCC_EA_RDREQ_32B[3]         TCC_EA_WRREQ[3]             TCC_EA_WRREQ_64B[3]   TCC_EA_RDREQ[4]                TCC_EA_RDREQ_32B[4]         TCC_EA_WRREQ[4]             TCC_EA_WRREQ_64B[4]   TCC_EA_RDREQ[5]                TCC_EA_RDREQ_32B[5]         TCC_EA_WRREQ[5]             TCC_EA_WRREQ_64B[5]   TCC_EA_RDREQ[6]                TCC_EA_RDREQ_32B[6]         TCC_EA_WRREQ[6]             TCC_EA_WRREQ_64B[6]   TCC_EA_RDREQ[7]                TCC_EA_RDREQ_32B[7]         TCC_EA_WRREQ[7]             TCC_EA_WRREQ_64B[7]   TCC_EA_RDREQ[8]                TCC_EA_RDREQ_32B[8]         TCC_EA_WRREQ[8]             TCC_EA_WRREQ_64B[8]   TCC_EA_RDREQ[9]                TCC_EA_RDREQ_32B[9]         TCC_EA_WRREQ[9]             TCC_EA_WRREQ_64B[9]   TCC_EA_RDREQ[10]               TCC_EA_RDREQ_32B[10]        TCC_EA_WRREQ[10]            TCC_EA_WRREQ_64B[10]  TCC_EA_RDREQ[11]               TCC_EA_RDREQ_32B[11]        TCC_EA_WRREQ[11]            TCC_EA_WRREQ_64B[11]  TCC_EA_RDREQ[12]               TCC_EA_RDREQ_32B[12]        TCC_EA_WRREQ[12]            TCC_EA_WRREQ_64B[12]  TCC_EA_RDREQ[13]               TCC_EA_RDREQ_32B[13]        TCC_EA_WRREQ[13]            TCC_EA_WRREQ_64B[13]  TCC_EA_RDREQ[14]               TCC_EA_RDREQ_32B[14]        TCC_EA_WRREQ[14]            TCC_EA_WRREQ_64B[14]  TCC_EA_RDREQ[15]               TCC_EA_RDREQ_32B[15]        TCC_EA_WRREQ[15]            TCC_EA_WRREQ_64B[15]  
+
+
+pmc: TCC_EA_ATOMIC[0]               TCC_EA_RDREQ_LEVEL[0]       TCC_EA_WRREQ_LEVEL[0]       TCC_EA_ATOMIC_LEVEL[0]  TCC_EA_ATOMIC[1]               TCC_EA_RDREQ_LEVEL[1]       TCC_EA_WRREQ_LEVEL[1]       TCC_EA_ATOMIC_LEVEL[1]  TCC_EA_ATOMIC[2]               TCC_EA_RDREQ_LEVEL[2]       TCC_EA_WRREQ_LEVEL[2]       TCC_EA_ATOMIC_LEVEL[2]  TCC_EA_ATOMIC[3]               TCC_EA_RDREQ_LEVEL[3]       TCC_EA_WRREQ_LEVEL[3]       TCC_EA_ATOMIC_LEVEL[3]  TCC_EA_ATOMIC[4]               TCC_EA_RDREQ_LEVEL[4]       TCC_EA_WRREQ_LEVEL[4]       TCC_EA_ATOMIC_LEVEL[4]  TCC_EA_ATOMIC[5]               TCC_EA_RDREQ_LEVEL[5]       TCC_EA_WRREQ_LEVEL[5]       TCC_EA_ATOMIC_LEVEL[5]  TCC_EA_ATOMIC[6]               TCC_EA_RDREQ_LEVEL[6]       TCC_EA_WRREQ_LEVEL[6]       TCC_EA_ATOMIC_LEVEL[6]  TCC_EA_ATOMIC[7]               TCC_EA_RDREQ_LEVEL[7]       TCC_EA_WRREQ_LEVEL[7]       TCC_EA_ATOMIC_LEVEL[7]  TCC_EA_ATOMIC[8]               TCC_EA_RDREQ_LEVEL[8]       TCC_EA_WRREQ_LEVEL[8]       TCC_EA_ATOMIC_LEVEL[8]  TCC_EA_ATOMIC[9]               TCC_EA_RDREQ_LEVEL[9]       TCC_EA_WRREQ_LEVEL[9]       TCC_EA_ATOMIC_LEVEL[9]  TCC_EA_ATOMIC[10]              TCC_EA_RDREQ_LEVEL[10]      TCC_EA_WRREQ_LEVEL[10]      TCC_EA_ATOMIC_LEVEL[10] TCC_EA_ATOMIC[11]              TCC_EA_RDREQ_LEVEL[11]      TCC_EA_WRREQ_LEVEL[11]      TCC_EA_ATOMIC_LEVEL[11] TCC_EA_ATOMIC[12]              TCC_EA_RDREQ_LEVEL[12]      TCC_EA_WRREQ_LEVEL[12]      TCC_EA_ATOMIC_LEVEL[12] TCC_EA_ATOMIC[13]              TCC_EA_RDREQ_LEVEL[13]      TCC_EA_WRREQ_LEVEL[13]      TCC_EA_ATOMIC_LEVEL[13] TCC_EA_ATOMIC[14]              TCC_EA_RDREQ_LEVEL[14]      TCC_EA_WRREQ_LEVEL[14]      TCC_EA_ATOMIC_LEVEL[14] TCC_EA_ATOMIC[15]              TCC_EA_RDREQ_LEVEL[15]      TCC_EA_WRREQ_LEVEL[15]      TCC_EA_ATOMIC_LEVEL[15] 
+
+
+pmc: TCC_EA_RDREQ_IO_CREDIT_STALL[0]   TCC_EA_RDREQ_GMI_CREDIT_STALL[0]  TCC_EA_RDREQ_DRAM_CREDIT_STALL[0]  TCC_EA_RDREQ_IO_CREDIT_STALL[1]   TCC_EA_RDREQ_GMI_CREDIT_STALL[1]  TCC_EA_RDREQ_DRAM_CREDIT_STALL[1]  TCC_EA_RDREQ_IO_CREDIT_STALL[2]   TCC_EA_RDREQ_GMI_CREDIT_STALL[2]  TCC_EA_RDREQ_DRAM_CREDIT_STALL[2]  TCC_EA_RDREQ_IO_CREDIT_STALL[3]   TCC_EA_RDREQ_GMI_CREDIT_STALL[3]  TCC_EA_RDREQ_DRAM_CREDIT_STALL[3]  TCC_EA_RDREQ_IO_CREDIT_STALL[4]   TCC_EA_RDREQ_GMI_CREDIT_STALL[4]  TCC_EA_RDREQ_DRAM_CREDIT_STALL[4]  TCC_EA_RDREQ_IO_CREDIT_STALL[5]   TCC_EA_RDREQ_GMI_CREDIT_STALL[5]  TCC_EA_RDREQ_DRAM_CREDIT_STALL[5]  TCC_EA_RDREQ_IO_CREDIT_STALL[6]   TCC_EA_RDREQ_GMI_CREDIT_STALL[6]  TCC_EA_RDREQ_DRAM_CREDIT_STALL[6]  TCC_EA_RDREQ_IO_CREDIT_STALL[7]   TCC_EA_RDREQ_GMI_CREDIT_STALL[7]  TCC_EA_RDREQ_DRAM_CREDIT_STALL[7]  TCC_EA_RDREQ_IO_CREDIT_STALL[8]   TCC_EA_RDREQ_GMI_CREDIT_STALL[8]  TCC_EA_RDREQ_DRAM_CREDIT_STALL[8]  TCC_EA_RDREQ_IO_CREDIT_STALL[9]   TCC_EA_RDREQ_GMI_CREDIT_STALL[9]  TCC_EA_RDREQ_DRAM_CREDIT_STALL[9]  TCC_EA_RDREQ_IO_CREDIT_STALL[10]  TCC_EA_RDREQ_GMI_CREDIT_STALL[10] TCC_EA_RDREQ_DRAM_CREDIT_STALL[10] TCC_EA_RDREQ_IO_CREDIT_STALL[11]  TCC_EA_RDREQ_GMI_CREDIT_STALL[11] TCC_EA_RDREQ_DRAM_CREDIT_STALL[11] TCC_EA_RDREQ_IO_CREDIT_STALL[12]  TCC_EA_RDREQ_GMI_CREDIT_STALL[12] TCC_EA_RDREQ_DRAM_CREDIT_STALL[12] TCC_EA_RDREQ_IO_CREDIT_STALL[13]  TCC_EA_RDREQ_GMI_CREDIT_STALL[13] TCC_EA_RDREQ_DRAM_CREDIT_STALL[13] TCC_EA_RDREQ_IO_CREDIT_STALL[14]  TCC_EA_RDREQ_GMI_CREDIT_STALL[14] TCC_EA_RDREQ_DRAM_CREDIT_STALL[14] TCC_EA_RDREQ_IO_CREDIT_STALL[15]  TCC_EA_RDREQ_GMI_CREDIT_STALL[15] TCC_EA_RDREQ_DRAM_CREDIT_STALL[15] 
+
+
+pmc: TCC_EA_WRREQ_IO_CREDIT_STALL[0]   TCC_EA_WRREQ_GMI_CREDIT_STALL[0]  TCC_EA_WRREQ_DRAM_CREDIT_STALL[0]  TCC_TOO_MANY_EA_WRREQS_STALL[0] TCC_EA_WRREQ_IO_CREDIT_STALL[1]   TCC_EA_WRREQ_GMI_CREDIT_STALL[1]  TCC_EA_WRREQ_DRAM_CREDIT_STALL[1]  TCC_TOO_MANY_EA_WRREQS_STALL[1] TCC_EA_WRREQ_IO_CREDIT_STALL[2]   TCC_EA_WRREQ_GMI_CREDIT_STALL[2]  TCC_EA_WRREQ_DRAM_CREDIT_STALL[2]  TCC_TOO_MANY_EA_WRREQS_STALL[2] TCC_EA_WRREQ_IO_CREDIT_STALL[3]   TCC_EA_WRREQ_GMI_CREDIT_STALL[3]  TCC_EA_WRREQ_DRAM_CREDIT_STALL[3]  TCC_TOO_MANY_EA_WRREQS_STALL[3] TCC_EA_WRREQ_IO_CREDIT_STALL[4]   TCC_EA_WRREQ_GMI_CREDIT_STALL[4]  TCC_EA_WRREQ_DRAM_CREDIT_STALL[4]  TCC_TOO_MANY_EA_WRREQS_STALL[4] TCC_EA_WRREQ_IO_CREDIT_STALL[5]   TCC_EA_WRREQ_GMI_CREDIT_STALL[5]  TCC_EA_WRREQ_DRAM_CREDIT_STALL[5]  TCC_TOO_MANY_EA_WRREQS_STALL[5] TCC_EA_WRREQ_IO_CREDIT_STALL[6]   TCC_EA_WRREQ_GMI_CREDIT_STALL[6]  TCC_EA_WRREQ_DRAM_CREDIT_STALL[6]  TCC_TOO_MANY_EA_WRREQS_STALL[6] TCC_EA_WRREQ_IO_CREDIT_STALL[7]   TCC_EA_WRREQ_GMI_CREDIT_STALL[7]  TCC_EA_WRREQ_DRAM_CREDIT_STALL[7]  TCC_TOO_MANY_EA_WRREQS_STALL[7] TCC_EA_WRREQ_IO_CREDIT_STALL[8]   TCC_EA_WRREQ_GMI_CREDIT_STALL[8]  TCC_EA_WRREQ_DRAM_CREDIT_STALL[8]  TCC_TOO_MANY_EA_WRREQS_STALL[8] TCC_EA_WRREQ_IO_CREDIT_STALL[9]   TCC_EA_WRREQ_GMI_CREDIT_STALL[9]  TCC_EA_WRREQ_DRAM_CREDIT_STALL[9]  TCC_TOO_MANY_EA_WRREQS_STALL[9] TCC_EA_WRREQ_IO_CREDIT_STALL[10]  TCC_EA_WRREQ_GMI_CREDIT_STALL[10] TCC_EA_WRREQ_DRAM_CREDIT_STALL[10] TCC_TOO_MANY_EA_WRREQS_STALL[10] TCC_EA_WRREQ_IO_CREDIT_STALL[11]  TCC_EA_WRREQ_GMI_CREDIT_STALL[11] TCC_EA_WRREQ_DRAM_CREDIT_STALL[11] TCC_TOO_MANY_EA_WRREQS_STALL[11] TCC_EA_WRREQ_IO_CREDIT_STALL[12]  TCC_EA_WRREQ_GMI_CREDIT_STALL[12] TCC_EA_WRREQ_DRAM_CREDIT_STALL[12] TCC_TOO_MANY_EA_WRREQS_STALL[12] TCC_EA_WRREQ_IO_CREDIT_STALL[13]  TCC_EA_WRREQ_GMI_CREDIT_STALL[13] TCC_EA_WRREQ_DRAM_CREDIT_STALL[13] TCC_TOO_MANY_EA_WRREQS_STALL[13] TCC_EA_WRREQ_IO_CREDIT_STALL[14]  TCC_EA_WRREQ_GMI_CREDIT_STALL[14] TCC_EA_WRREQ_DRAM_CREDIT_STALL[14] TCC_TOO_MANY_EA_WRREQS_STALL[14] TCC_EA_WRREQ_IO_CREDIT_STALL[15]  TCC_EA_WRREQ_GMI_CREDIT_STALL[15] TCC_EA_WRREQ_DRAM_CREDIT_STALL[15] TCC_TOO_MANY_EA_WRREQS_STALL[15] 
+
+gpu: 
+kernel: 
+range: 
+

src/perfmon_pub/vega10/pmc_tcc_perf.txt

@@ -0,0 +1,19 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_WAVES 
+
+pmc: TCC_CYCLE_sum                          TCC_BUSY_sum                          TCC_PROBE_sum                          TCC_PROBE_ALL_sum 
+pmc: TCC_NC_REQ_sum                         TCC_UC_REQ_sum                        TCC_CC_REQ_sum                         
+pmc: TCC_REQ_sum                            TCC_STREAMING_REQ_sum                 TCC_HIT_sum                            TCC_MISS_sum
+pmc: TCC_READ_sum                           TCC_WRITE_sum                         TCC_ATOMIC_sum                         TCC_WRITEBACK_sum
+pmc: TCC_EA_WRREQ_sum                       TCC_EA_WRREQ_64B_sum                  TCC_EA_WR_UNCACHED_32B_sum 
+pmc: TCC_EA_WRREQ_STALL_sum                 TCC_EA_WRREQ_IO_CREDIT_STALL_sum      TCC_EA_WRREQ_GMI_CREDIT_STALL_sum      TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum
+pmc: TCC_TOO_MANY_EA_WRREQS_STALL_sum       TCC_EA_ATOMIC_sum                     TCC_EA_RDREQ_sum                       TCC_EA_RDREQ_32B_sum
+pmc: TCC_EA_RD_UNCACHED_32B_sum             TCC_EA_RDREQ_IO_CREDIT_STALL_sum      TCC_EA_RDREQ_GMI_CREDIT_STALL_sum      TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum
+pmc:                                        TCC_NORMAL_WRITEBACK_sum              TCC_ALL_TC_OP_WB_WRITEBACK_sum         TCC_NORMAL_EVICT_sum
+pmc: TCC_ALL_TC_OP_INV_EVICT_sum            TCC_EA_RDREQ_DRAM_sum                 TCC_EA_WRREQ_DRAM_sum                    
+pmc: TCC_EA_RDREQ_LEVEL_sum                 TCC_EA_WRREQ_LEVEL_sum                TCC_EA_ATOMIC_LEVEL_sum
+
+gpu: 
+kernel: 
+
+range: 
+

src/perfmon_pub/vega10/pmc_tcp_perf.txt

@@ -0,0 +1,18 @@
+pmc: GRBM_COUNT         GRBM_GUI_ACTIVE         SQ_CYCLES       SQ_BUSY_CYCLES          SQ_BUSY_CU_CYCLES       SQ_WAVES        SQ_WAVE_CYCLES
+
+pmc: TCP_GATE_EN1_sum                        TCP_GATE_EN2_sum                        TCP_TD_TCP_STALL_CYCLES_sum                     TCP_TCR_TCP_STALL_CYCLES_sum
+pmc: TCP_READ_TAGCONFLICT_STALL_CYCLES_sum   TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum  TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum         TCP_TA_TCP_STATE_READ_sum
+pmc: TCP_VOLATILE_sum                        TCP_TOTAL_ACCESSES_sum                  TCP_TOTAL_READ_sum                              TCP_TOTAL_WRITE_sum
+pmc: TCP_TOTAL_ATOMIC_WITH_RET_sum           TCP_TOTAL_ATOMIC_WITHOUT_RET_sum        TCP_TOTAL_WRITEBACK_INVALIDATES_sum             TCP_TOTAL_CACHE_ACCESSES_sum
+pmc: TCP_UTCL1_TRANSLATION_MISS_sum          TCP_UTCL1_TRANSLATION_HIT_sum           TCP_UTCL1_PERMISSION_MISS_sum                   TCP_UTCL1_REQUEST_sum
+pmc: TCP_TCP_LATENCY_sum                     TCP_TCC_READ_REQ_LATENCY_sum            TCP_TCC_WRITE_REQ_LATENCY_sum                   TCP_TCC_READ_REQ_sum
+pmc: TCP_TCC_WRITE_REQ_sum                   TCP_TCC_ATOMIC_WITH_RET_REQ_sum         TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum              TCP_TCC_NC_READ_REQ_sum
+pmc: TCP_TCC_NC_WRITE_REQ_sum                TCP_TCC_NC_ATOMIC_REQ_sum               TCP_TCC_UC_READ_REQ_sum                         TCP_TCC_UC_WRITE_REQ_sum
+pmc: TCP_TCC_UC_ATOMIC_REQ_sum               TCP_TCC_CC_READ_REQ_sum                 TCP_TCC_CC_WRITE_REQ_sum                        TCP_TCC_CC_ATOMIC_REQ_sum
+pmc:       				                								  	     TCP_PENDING_STALL_CYCLES_sum
+
+#pmc: TCA_CYCLE_sum                           TCA_BUSY_sum
+
+gpu: 
+kernel: 
+range: 

src/perfmon_pub/vega10/pmc_td_perf.txt

@@ -0,0 +1,12 @@
+pmc: GRBM_COUNT GRBM_GUI_ACTIVE SQ_CYCLES SQ_BUSY_CYCLES SQ_BUSY_CU_CYCLES SQ_WAVES SQ_WAVE_CYCLES
+
+pmc: TD_TD_BUSY_sum                          TD_TC_STALL_sum
+pmc: TD_COALESCABLE_WAVEFRONT_sum            TD_LOAD_WAVEFRONT_sum
+pmc: TD_ATOMIC_WAVEFRONT_sum                 TD_STORE_WAVEFRONT_sum
+
+
+
+gpu:
+range: 
+kernel: 
+

src/utils/perfagg.py

@@ -29,6 +29,19 @@ prog = "omniperf"
 # Per IP block max number of simulutaneous counters
 # GFX IP Blocks
 perfmon_config = {
+    "vega10": {
+        "SQ": 8,
+        "TA": 2,
+        "TD": 2,
+        "TCP": 4,
+        "TCC": 4,
+        "CPC": 2,
+        "CPF": 2,
+        "SPI": 2,
+        "GRBM": 2,
+        "GDS": 4,
+        "TCC_channels": 16,
+    },
     "mi50": {
         "SQ": 8,
         "TA": 2,

src/utils/plot_roofline.py

@@ -28,6 +28,8 @@ import sys
 from pathlib import Path
 
 import numpy
+import matplotlib
+matplotlib.use('Agg')
 import matplotlib.pyplot as plt
 from matplotlib.pyplot import get, text
 from math import log, pi, sqrt

src/utils/specs.py

@@ -31,7 +31,7 @@ from dataclasses import dataclass
 from pathlib import Path as path
 from textwrap import dedent
 
-gpu_list = {"gfx906", "gfx908", "gfx90a"}
+gpu_list = {"gfx906", "gfx908", "gfx90a","gfx900"}
 
 
 @dataclass