Initial support for gfx1010, gfx1011, gfx1012

Change-Id: I9ec398070c85db08aea72947557c6e1b5f7d541d


[ROCm/ROCR-Runtime commit: 6ebdad5896]

projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_aql_queue.cpp

@@ -948,7 +948,7 @@ void AqlQueue::ExecutePM4(uint32_t* cmd_data, size_t cmd_size_b) {
     rel_mem[4] = 0;
     rel_mem[5] = 0;
     rel_mem[6] = 0;
-  } else if (agent_->isa()->GetMajorVersion() == 9) {
+  } else if (agent_->isa()->GetMajorVersion() >= 9) {
     // Construct an AQL packet to jump to the PM4 IB.
     struct amd_aql_pm4_ib {
       uint16_t header;

projects/rocr-runtime/runtime/hsa-runtime/core/runtime/isa.cpp

@@ -218,6 +218,9 @@ const IsaRegistry::IsaMap IsaRegistry::GetSupportedIsas() {
   ISAREG_ENTRY_GEN(9, 0, 6, false, true )
   ISAREG_ENTRY_GEN(9, 0, 8, false, true )
   ISAREG_ENTRY_GEN(9, 0, 8, false, false)
+  ISAREG_ENTRY_GEN(10, 1, 0, false, false)
+  ISAREG_ENTRY_GEN(10, 1, 1, false, false)
+  ISAREG_ENTRY_GEN(10, 1, 2, false, false)
 
   return supported_isas;
 }