Documentation update for FP8 on MI300 (#766)

This commit is contained in:
Fei Zheng
2025-06-26 13:35:36 -06:00
committed by GitHub
parent a95a45d69a
commit f5bc717fe1
3 changed files with 20 additions and 3 deletions
+7
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@@ -519,6 +519,13 @@ MFMA instructions are classified by the type of input data they operate on, and
- Instructions per :ref:`normalization unit <normalization-units>`
* - MFMA-F8 Instructions
- The total number of 8-bit floating point :ref:`MFMA <desc-mfma>`
instructions issued per :ref:`normalization unit <normalization-units>`. This is supported in AMD Instinct MI300 series and later only.
- Instructions per :ref:`normalization unit <normalization-units>`
* - MFMA-F16 Instructions
- The total number of 16-bit floating point :ref:`MFMA <desc-mfma>`
+10
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@@ -49,6 +49,16 @@ of ROCm Compute Profilers profiling report.
- GIOPs
* - :ref:`MFMA <desc-mfma>` FLOPs (F8)
- The total number of 8-bit floating point :ref:`MFMA <desc-mfma>`
operations executed per second. This does not include any 16-bit
brain floating point operations from :ref:`VALU <desc-valu>`
instructions. This is also presented as a percent of the peak theoretical
F8 MFMA operations achievable on the specific accelerator. It is supported on AMD Instinct MI300 series and later only.
- GFLOPs
* - :ref:`MFMA <desc-mfma>` FLOPs (BF16)
- The total number of 16-bit brain floating point :ref:`MFMA <desc-mfma>`