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SWDEV-436533 [CLI/Python API] Align Cache Info BM UI to Host

Просмотр исходного кода 
- [CLI] Refactored cache info to display
cache flags as "cache_properties" names.
Names are displayed as a list of comma-separated
cache type strings. Previously, values
were shown one by one as ENABLED.

ex.
CACHE_PROPERTIES = <a,b,c>

- [JSON] mirrors CLI fields.
No longer display "cache_flags", renamed
field as "cache_properties" dictionary. This
allows users to better understand the
list of names provided.

- [Python API] Updated amdsmi_get_gpu_cache_info
to mirror Host return.

README.md - updated to reflect all changes.

Change-Id: Ife2ef5adcef30058937d1376efb01749e45c02fb
Signed-off-by: Charis Poag <Charis.Poag@amd.com>
Этот коммит содержится в:
Charis Poag
2024-01-17 16:28:39 -06:00
коммит произвёл Maisam Arif
родитель c260819003
Коммит fe86afed8c
4 изменённых файлов: 87 добавлений и 73 удалений
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amdsmi_cli/README.md
+41 -52
Просмотреть файл
@@ -657,33 +657,30 @@ VRAM:
VRAM_SIZE_MB: 96432 MB
CACHE:
CACHE 0:
CACHE_PROPERTIES: DATA_CACHE, SIMD_CACHE
CACHE_SIZE: 32 KB
CACHE_LEVEL: 1
MAX_NUM_CU_SHARED: 2
NUM_CACHE_INSTANCE: 348
DATA_CACHE: ENABLED
SIMD_CACHE: ENABLED
NUM_CACHE_INSTANCE: 464
CACHE 1:
CACHE_PROPERTIES: INST_CACHE, SIMD_CACHE
CACHE_SIZE: 64 KB
CACHE_LEVEL: 1
MAX_NUM_CU_SHARED: 2
NUM_CACHE_INSTANCE: 120
INST_CACHE: ENABLED
SIMD_CACHE: ENABLED
NUM_CACHE_INSTANCE: 160
CACHE 2:
CACHE_SIZE: 24576 KB
CACHE_PROPERTIES: DATA_CACHE, SIMD_CACHE
CACHE_SIZE: 32768 KB
CACHE_LEVEL: 2
MAX_NUM_CU_SHARED: 228
MAX_NUM_CU_SHARED: 304
NUM_CACHE_INSTANCE: 1
DATA_CACHE: ENABLED
SIMD_CACHE: ENABLED
CACHE 3:
CACHE_PROPERTIES: DATA_CACHE, SIMD_CACHE
CACHE_SIZE: 262144 KB
CACHE_LEVEL: 3
MAX_NUM_CU_SHARED: 228
MAX_NUM_CU_SHARED: 304
NUM_CACHE_INSTANCE: 1
DATA_CACHE: ENABLED
SIMD_CACHE: ENABLED
RAS:
EEPROM_VERSION: 0x0
PARITY_SCHEMA: DISABLED
@@ -770,34 +767,31 @@ VRAM:
VRAM_VENDOR: HYNIX
VRAM_SIZE_MB: 96432 MB
CACHE:
CACHE:
CACHE 0:
CACHE_PROPERTIES: DATA_CACHE, SIMD_CACHE
CACHE_SIZE: 32 KB
CACHE_LEVEL: 1
MAX_NUM_CU_SHARED: 2
NUM_CACHE_INSTANCE: 348
DATA_CACHE: ENABLED
SIMD_CACHE: ENABLED
NUM_CACHE_INSTANCE: 464
CACHE 1:
CACHE_PROPERTIES: INST_CACHE, SIMD_CACHE
CACHE_SIZE: 64 KB
CACHE_LEVEL: 1
MAX_NUM_CU_SHARED: 2
NUM_CACHE_INSTANCE: 120
INST_CACHE: ENABLED
SIMD_CACHE: ENABLED
NUM_CACHE_INSTANCE: 160
CACHE 2:
CACHE_SIZE: 24576 KB
CACHE_PROPERTIES: DATA_CACHE, SIMD_CACHE
CACHE_SIZE: 32768 KB
CACHE_LEVEL: 2
MAX_NUM_CU_SHARED: 228
MAX_NUM_CU_SHARED: 304
NUM_CACHE_INSTANCE: 1
DATA_CACHE: ENABLED
SIMD_CACHE: ENABLED
CACHE 3:
CACHE_PROPERTIES: DATA_CACHE, SIMD_CACHE
CACHE_SIZE: 262144 KB
CACHE_LEVEL: 3
MAX_NUM_CU_SHARED: 228
MAX_NUM_CU_SHARED: 304
NUM_CACHE_INSTANCE: 1
DATA_CACHE: ENABLED
SIMD_CACHE: ENABLED
RAS:
EEPROM_VERSION: 0x0
PARITY_SCHEMA: DISABLED
@@ -884,34 +878,31 @@ VRAM:
VRAM_VENDOR: HYNIX
VRAM_SIZE_MB: 96432 MB
CACHE:
CACHE:
CACHE 0:
CACHE_PROPERTIES: DATA_CACHE, SIMD_CACHE
CACHE_SIZE: 32 KB
CACHE_LEVEL: 1
MAX_NUM_CU_SHARED: 2
NUM_CACHE_INSTANCE: 348
DATA_CACHE: ENABLED
SIMD_CACHE: ENABLED
NUM_CACHE_INSTANCE: 464
CACHE 1:
CACHE_PROPERTIES: INST_CACHE, SIMD_CACHE
CACHE_SIZE: 64 KB
CACHE_LEVEL: 1
MAX_NUM_CU_SHARED: 2
NUM_CACHE_INSTANCE: 120
INST_CACHE: ENABLED
SIMD_CACHE: ENABLED
NUM_CACHE_INSTANCE: 160
CACHE 2:
CACHE_SIZE: 24576 KB
CACHE_PROPERTIES: DATA_CACHE, SIMD_CACHE
CACHE_SIZE: 32768 KB
CACHE_LEVEL: 2
MAX_NUM_CU_SHARED: 228
MAX_NUM_CU_SHARED: 304
NUM_CACHE_INSTANCE: 1
DATA_CACHE: ENABLED
SIMD_CACHE: ENABLED
CACHE 3:
CACHE_PROPERTIES: INST_CACHE, SIMD_CACHE
CACHE_SIZE: 262144 KB
CACHE_LEVEL: 3
MAX_NUM_CU_SHARED: 228
MAX_NUM_CU_SHARED: 304
NUM_CACHE_INSTANCE: 1
DATA_CACHE: ENABLED
SIMD_CACHE: ENABLED
RAS:
EEPROM_VERSION: 0x0
PARITY_SCHEMA: DISABLED
@@ -999,33 +990,31 @@ VRAM:
VRAM_SIZE_MB: 96432 MB
CACHE:
CACHE 0:
CACHE:
CACHE 0:
CACHE_PROPERTIES: INST_CACHE, SIMD_CACHE
CACHE_SIZE: 32 KB
CACHE_LEVEL: 1
MAX_NUM_CU_SHARED: 2
NUM_CACHE_INSTANCE: 348
DATA_CACHE: ENABLED
SIMD_CACHE: ENABLED
NUM_CACHE_INSTANCE: 464
CACHE 1:
CACHE_PROPERTIES: INST_CACHE, SIMD_CACHE
CACHE_SIZE: 64 KB
CACHE_LEVEL: 1
MAX_NUM_CU_SHARED: 2
NUM_CACHE_INSTANCE: 120
INST_CACHE: ENABLED
SIMD_CACHE: ENABLED
NUM_CACHE_INSTANCE: 160
CACHE 2:
CACHE_SIZE: 24576 KB
CACHE_PROPERTIES: DATA_CACHE, SIMD_CACHE
CACHE_SIZE: 32768 KB
CACHE_LEVEL: 2
MAX_NUM_CU_SHARED: 228
MAX_NUM_CU_SHARED: 304
NUM_CACHE_INSTANCE: 1
DATA_CACHE: ENABLED
SIMD_CACHE: ENABLED
CACHE 3:
CACHE_PROPERTIES: DATA_CACHE, SIMD_CACHE
CACHE_SIZE: 262144 KB
CACHE_LEVEL: 3
MAX_NUM_CU_SHARED: 228
MAX_NUM_CU_SHARED: 304
NUM_CACHE_INSTANCE: 1
DATA_CACHE: ENABLED
SIMD_CACHE: ENABLED
RAS:
EEPROM_VERSION: 0x0
PARITY_SCHEMA: DISABLED
amdsmi_cli/amdsmi_commands.py
+18 -8
Просмотреть файл
@@ -559,16 +559,26 @@ class AMDSMICommands():
if args.cache:
try:
cache_info = amdsmi_interface.amdsmi_get_gpu_cache_info(args.gpu)
for cache_key, cache_dict in cache_info.items():
for key, value in cache_dict.items():
if key == 'cache_size' or key == 'cache_level' or \
key == 'max_num_cu_shared' or key == 'num_cache_instance':
continue
if value:
cache_info[cache_key][key] = "ENABLED"
logging.debug("Before dictionary modify | cache_info = " + str(cache_info))
for key, cache_values in cache_info.items():
cache_properties = "N/A"
if 'cache_flags' in list(cache_info[key].keys()):
if isinstance(cache_values['cache_flags'], list):
cache_properties = list(cache_values['cache_flags'])
cache_values.pop('cache_flags') # remove cache_flags from output
cache_info[key] = { # add properties to top of key's dictionary
'cache_properties': list(cache_properties),
**cache_info[key] # append remaining key's dictionary
}
logging.debug("After dictionary modify | cache_info = " + str(cache_info))
if self.logger.is_human_readable_format():
for _ , cache_values in cache_info.items():
for key, cache_values in cache_info.items():
cache_values['cache_size'] = f"{cache_values['cache_size']} KB"
# take cache_properties out of list -> display as string, removing brackets
update_cache_properties = str(cache_values['cache_properties'])
update_cache_properties = update_cache_properties.replace("[","").replace("]", "")
cache_values['cache_properties'] = update_cache_properties
logging.debug("After human_readable | cache_info = " + str(cache_info))
except amdsmi_exception.AmdSmiLibraryException as e:
cache_info = "N/A"
py-interface/README.md
+4 -5
Просмотреть файл
@@ -475,13 +475,12 @@ Output: Dictionary of Dictionaries containing cache information
Field | Description
---|---
`cache #` | upt 10 caches will be available
`cache_index` | cache index - up to 10 caches will be available
`cache_flags` | list of up to 4 cache property type strings. Ex. data ("DATA_CACHE"), instruction ("INST_CACHE"), CPU ("CPU_CACHE"), or SIMD ("SIMD_CACHE").
`cache_size` | size of cache in KB
`cache_level` | level of cache
`data_cache` | True if data cache is enabled, false otherwise
`instruction_cache` | True if instruction cache is enabled, false otherwise
`cpu_cache` | True if cpu cache is enabled, false otherwise
`simd_cache` | True if simd cache is enabled, false otherwise
`max_num_cu_shared` | max number of compute units shared
`num_cache_instance` | number of cache instances
Exceptions that can be thrown by `amdsmi_get_gpu_cache_info` function:
py-interface/amdsmi_interface.py
+24 -8
Просмотреть файл
@@ -22,7 +22,7 @@
import ctypes
import re
from typing import Union, Any, Dict, List, Tuple
from enum import IntEnum
from enum import IntEnum, Enum
from collections.abc import Iterable
from . import amdsmi_wrapper
@@ -357,6 +357,11 @@ class AmdSmiProcessorType(IntEnum):
NON_AMD_GPU = amdsmi_wrapper.NON_AMD_GPU
NON_AMD_CPU = amdsmi_wrapper.NON_AMD_CPU
class AmdSmiCacheTypeNames(Enum):
DATA_CACHE = 2
INST_CACHE = 4
CPU_CACHE = 8
SIMD_CACHE = 16
class AmdSmiEventReader:
def __init__(
@@ -1626,15 +1631,26 @@ def amdsmi_get_gpu_cache_info(
inst_cache = bool(cache_flags & amdsmi_wrapper.CACHE_FLAGS_INST_CACHE)
cpu_cache = bool(cache_flags & amdsmi_wrapper.CACHE_FLAGS_CPU_CACHE)
simd_cache = bool(cache_flags & amdsmi_wrapper.CACHE_FLAGS_SIMD_CACHE)
cache_info_dict[f"cache {cache_index}"] = {"cache_size": cache_size,
cache_flag_list = []
if (data_cache):
cache_flag_list.append(
AmdSmiCacheTypeNames(amdsmi_wrapper.CACHE_FLAGS_DATA_CACHE).name)
if (inst_cache):
cache_flag_list.append(
AmdSmiCacheTypeNames(amdsmi_wrapper.CACHE_FLAGS_INST_CACHE).name)
if (cpu_cache):
cache_flag_list.append(
AmdSmiCacheTypeNames(amdsmi_wrapper.CACHE_FLAGS_CPU_CACHE).name)
if (simd_cache):
cache_flag_list.append(
AmdSmiCacheTypeNames(amdsmi_wrapper.CACHE_FLAGS_SIMD_CACHE).name)
cache_info_dict[f"cache {cache_index}"] = {
"cache_flags": cache_flag_list,
"cache_size": cache_size,
"cache_level": cache_level,
"max_num_cu_shared": max_num_cu_shared,
"num_cache_instance": num_cache_instance}
if (data_cache): cache_info_dict[f"cache {cache_index}"]["data_cache"] = data_cache
if (inst_cache): cache_info_dict[f"cache {cache_index}"]["inst_cache"] = inst_cache
if (cpu_cache): cache_info_dict[f"cache {cache_index}"]["cpu_cache"] = cpu_cache
if (simd_cache): cache_info_dict[f"cache {cache_index}"]["simd_cache"] = simd_cache
"num_cache_instance": num_cache_instance
}
if cache_info_dict == {}:
raise AmdSmiLibraryException(amdsmi_wrapper.AMDSMI_STATUS_NO_DATA)