This reverts commit 84fb57e7f9.
Reason for revert: Even though this change is valid, this would break backward compatibility.
Change-Id: I9c7cab83198c8d5c8485b11194099162e3e7a874
[ROCm/clr commit: ec6f83b544]
Support zero width and height for hipTextObjectCreate to align
with cuda.
Change-Id: I5d4c48625faf5f060ed2a7e634ec65e4ecac9da5
[ROCm/clr commit: efce2f77c4]
1) For Dynamic CO variables, free the device pointer in
DynCO destructor instead of DeviceVar destructor.
2) For Static CO Remove Fatbinary,
only call hipFree for valid device Vars instead of all devices.
Change-Id: I84291f5371b2c05d1d0bcdb4f9c6bd122e7c9b21
[ROCm/clr commit: a2d8199402]
Modified hipFuncSetAttribute to handle pointers to dynamic functions
returned by hipModuleGetFunction.
Change-Id: I54b98f9d31a79630dd7edcd363fad81f1d89219b
[ROCm/clr commit: 1a710dabcf]
This reverts commit 3b470cb067.
Reason for revert: Breaking change that will be merged in at a later date
Change-Id: Idd300492cc08a57c50decc22df287ddcc5463c88
[ROCm/clr commit: 6e55f40313]
This reverts commit 116effa83c.
Reason for revert: It is considered a breaking change.
Change-Id: Ia1f7b27a6d3caa4a9fe12bee469f5f0a6b8327fd
[ROCm/clr commit: 62e1d50c2a]
This reverts commit 30571de816.
Reason for revert: It is considered a breaking change.
Change-Id: I9b2dfc60f62eec7268c0374b0b33e45eca7b3bbb
[ROCm/clr commit: ed458615c4]
This reverts commit 830c72e286.
Reason for revert: It is considered a breaking change.
Change-Id: I6bfd81dcc16d36304efa2f151969427249a4122f
[ROCm/clr commit: 48df130d87]
After setting the new params in hipDrvGraphExecMemsetNodeSetParams, we
need to update the AQL packet as well, otherwise during the graph launch
it still dispatches the packet which has the original params and not the
updated one.
Change-Id: Ie49a641ba3f66c8085a29f92d88ac6ea6a1c0534
[ROCm/clr commit: ba2ebb3b99]
* When hipMemset3dAsync is captured, a 3d extent can set be as a parameter (depth > 1). That worked on nvidia, but on amd wrong portion of array was filled because when creating Memset3D command, extent dimensions were used to create pitchedPtr, instead of original array width and height.
* Also, when capturing hipMemset3dAsync, nvidia allows any of the extent dimension to be 0, and in that case, no work should be done.
Change-Id: I46a605bf9ae801cd3348e98d528c21263a8eefce
[ROCm/clr commit: ec60bb1aed]
Add an atomic counter to track the outstanding HSA handlers.
Wait on CPU for the callbacks if the number exceeds the value
in DEBUG_HIP_BLOCK_SYNC env variable.
Change-Id: I95dc8c4bf0258c7e59411b7504220709ed6898c5
[ROCm/clr commit: 403f624bf8]
=> GraphExec instance is destroyed before async launch completes,
destroy after all pending graph launches
=> Remove GraphExec destroy during next sync point(hipStreamSync,
hipDeviceSync etc..)
Change-Id: I4df682aae5787fd6e5240a7be936ce50361345d0
[ROCm/clr commit: f9f995c6d0]
1) SW Conversions for ocp and fnuz are enabled on pre mi300 archs
2) for mi300 only fnuz is enabled
3) for gfx1200 only ocp is enabled
Change-Id: I90373752a2d15eff20d5deec874ed396ba4e1788
[ROCm/clr commit: e729f08704]
- Don't generate callbacks for HIP events
- Don't process profiling info in the callback for HIP events
- Wait for CPU status update of the submitted commands
every 50 calls. That will allow to drain the commands and
destroy HSA signals.
Change-Id: Ib601a350e7e7c2b6c6209a172385389baccf73a9
[ROCm/clr commit: 364dfb0ed1]
Changed the validation to occur on the sub-object rather than the parent.
Change-Id: I87bf5ef3526d0db9304099ef9ac1a5494e9a01a9
[ROCm/clr commit: 5da72f9d52]
- Use AMD_LOG_LEVEL_SIZE in MBs to set log file size truncation, by default its 2048 MB
Change-Id: Ia2f87e8c6b94148e30edfb602b279f93630817c3
[ROCm/clr commit: 35e03ea0d0]
PAL supports allocating from system memory once device memory is used up
or allocation is larger than the device memory.
Change-Id: Iccd3377e95a6cc6d23e45d4738a17af8b9ee32d7
[ROCm/clr commit: b07178618c]