144 Melakukan

Penulis SHA1 Pesan Tanggal
Christophe Paquot b8de199652 SWDEV-276396 - Implement hipDeviceReset
Add a Purge function to MemObjMap

Change-Id: Iac51dfda9a7b7c45f2f4a0dc35f7a623121aba1a


[ROCm/clr commit: d13581efa7]
2021-08-22 23:56:07 -07:00
Vladislav Sytchenko de280603a7 SWDEV-289548 - [PAL] Revive Raven 2 support
Revert back to using the Raven (gfx902) target ID for Raven 2 (gfx909).
This is due to the HSAIL compiler not supporting gfx909.

In theory there should be no issue with running Raven isa on Raven 2.

Change-Id: I425edebc99075799eda5522fad231b8fb3184873


[ROCm/clr commit: 0b1481d4f1]
2021-08-22 23:56:07 -07:00
kjayapra-amd 8f1e9bb054 SWDEV-288690 - Updating the return value with roc::Device::init
Change-Id: I132fa424cf9bec608e5c8429e93d20e78b76c6f0


[ROCm/clr commit: d2bf9f9b58]
2021-08-22 23:56:07 -07:00
Jason Tang e8ca936563 SWDEV-287332 - Disable NullDevice in HIP
Change-Id: I45c6010d2a3fcd0576438e3c72fbed78dff09b6b


[ROCm/clr commit: 7932b5a562]
2021-05-26 09:27:59 -04:00
Ravi C Akkenapally 51663d1605 SWDEV-245531 - GLInterop: Add Buffer Interop support
Change-Id: I38326173475e84f8eca2605522542ef89a3cf524


[ROCm/clr commit: 0aa524363d]
2021-05-19 12:24:24 -07:00
kjayapra-amd aae0d4ca51 SWDEV-286346 - Implement Arena Memory Object for externally created memory.
Change-Id: I8530602d89edf83ad367c52167e48a1559ee1e18


[ROCm/clr commit: 1c49d8816c]
2021-05-18 10:59:52 -04:00
Jason Tang 6cd1f5854e SWDEV-277566 - Separate code object loading from building
Change-Id: I87b8178f55e8ef23762dfe11fab71665ba680f00


[ROCm/clr commit: 211ba25b4e]
2021-05-13 08:41:35 -04:00
Brian Sumner 567d9cc617 SWDEV-285332 - move common context into parent
Change-Id: I99ceb62ad948e1fa9d1dcaa5ede98626cc95bea7


[ROCm/clr commit: 6d09a83b2d]
2021-05-09 09:18:39 -07:00
Vladislav Sytchenko c585ae92a7 SWDEV-280473 - Support HSAIL shared library build
This change makes HSAIL usage similar to that of Comgr. By default, the
runtime will statically link against it, however if HSAIL_DYN_DLL is
defined, then the runtime will try to dynamically load HSAIL.

Currently stick to statically linking to HSAIL. In a feature patch the
dynamic loading behaviour will be enabled.

Change-Id: I6a78a4375975cf847f236b200404c8cf941d012b


[ROCm/clr commit: c7b50bb890]
2021-04-14 12:25:54 -04:00
Vladislav Sytchenko 7b3014ec69 SWDEV-280473 - Remove HSAIL support from the ROCm backend
In adition to removing the HSAIL logic from the ROCm backend, guard all
of the HSAIL includes in the common layer behind the WITH_COMPILER_LIB
define. This is to avoid including HSAIL headers when building with
no support for it.

In common logic replace the use of the aclType enum with the new
Program::file_type_t enum. This is essentially a local copy of the HSAIL
enum to avoid including any HSAIL headers.

Change-Id: Ica0651d1b29dfccc255cc584eb82a5cb35e1b520


[ROCm/clr commit: cbeb372e46]
2021-04-12 14:55:06 -04:00
Jason Tang 636bdbd0fa SWDEV-277559 - Remove AMDIL
The rest of AMDIL support will be removed along with orca backend.

Change-Id: I0462501e7147dc4b99870fd02034d0a4a0496e55


[ROCm/clr commit: 1a38be8972]
2021-04-09 14:15:15 -04:00
Konstantin Zhuravlyov 48a2ce0404 SWDEV-76911 - Target ID workarounds in vdi runtime:
- Add HSAIL ID for Hawaii as gfx702
  - Add HSAIL ID for Renoir without xnack as gfx90c

Fixes: SWDEV-271289, SWDEV-272761
Change-Id: I92cf4619cdfd550462ff8ec3740443ef1e5a5f96


[ROCm/clr commit: 3010cf0a58]
2021-04-08 12:14:25 -04:00
Todd tiantuo Li 142a5d196c SWDEV-1 - enable gfx90c for ROC and PAL paths
Change-Id: If5c4f1ca1b136e14b9e11cd27b1beff386adc377


[ROCm/clr commit: 0d7ded0bfb]
2021-04-01 12:02:08 -07:00
Vladislav Sytchenko 9f2bb57232 SWDEV-1 - Remove unannounced asic
Change-Id: I0ec360e7f924dcfbc26bc70981a714abb57804c9


[ROCm/clr commit: b4064ad557]
2021-03-03 23:21:41 -05:00
Vladislav Sytchenko 3cd2c487d3 SWDEV-193973 - Enable HSAIL for all Navi Asics
Change-Id: I0a48442f9a970de3d449e512293bc4600c62db13


[ROCm/clr commit: 4e1232a110]
2021-02-26 11:56:09 -05:00
kjayapra-amd d26aceba19 SWDEV-274058 - Porting HIP, ROCclr gfx90a changes to mainline.
Change-Id: I4f4220df77e57f749a00c1dbb66743ac5af4959a


[ROCm/clr commit: 46a50965c4]
2021-02-24 09:55:54 -05:00
German Andryeyev b5e80a048a SWDEV-86035 - Enable PAL for gfx8
Change-Id: Ia6623993e44aeb4bdf317628ee8a84af6c4cacc7


[ROCm/clr commit: e7c636c5e7]
2021-02-11 14:25:43 -05:00
Vladislav Sytchenko b8ce1cc059 SWDEV-1 - Update ISA table
Disable gfx9+ for GSL.

Enable gfx9+ (except MI100/200/300) for PAL.

Change-Id: Ic5a238af939e1d8795503aae39df6a6ece50a9d2


[ROCm/clr commit: 81e331dc42]
2021-01-28 11:26:22 -05:00
Tony Tye 902cf1a239 Update code object handling for GSL, PAL and ROCm
- Correct GSL path to report targets using the TargetID syntax.

- Correct GSL path to check compatibility of code objects when
  loading.

- Add concept of an device isa and create a registery used by ROCm,
  PAL and GSL.

- Support XNACK and SRAMECC target features consistently for PAL and ROCm.

- Correct logic for NullDevices and asserts to avoid memory coruption.

- Allow all NullDevices to be created for HIP.

- Numerous other code improvements.

Change-Id: I40abf3d2b22249c1492d1af5919665f8184f4e0e


[ROCm/clr commit: c7e8d91e14]
2021-01-14 11:11:51 -05:00
Tony Tye 29ca46821b Add stronger checking
- Add assertions to enforce that objects are of the correct kind and
  have been allocated.

- Make destructors check if objects have been allocated before
  deleting.

- Operations that require a non-NullDevice return failure if given a
  NullDevice.

- Use static_cast rather than reinterpret_cast when cohersing from a
  base class to a derived class.

Change-Id: I02ee0ea9d7982fd7ca29d49c9b02cfae111b7127


[ROCm/clr commit: e5431676d4]
2021-01-13 08:24:28 +00:00
Tony Tye 3b6c42f78d [NFC] Correct comments and line spacing
- Correct spelling mistakes or working in comments.
- Adding missing line separators.
- Add missing comments for namespace closing brace.

Change-Id: If09cdd38aa088b0f68f750dfdef81351eb8c4935


[ROCm/clr commit: eb16dc5ef3]
2021-01-13 08:24:28 +00:00
agodavar b1eb35e730 SWDEV-245381 : Updated guarantee error messages to print based on BUILD_TYPE
Change-Id: Ia21039326b440f6d807a6495a9a05dd52b384c76


[ROCm/clr commit: 69a786e8d1]
2021-01-05 05:49:09 -05:00
Alex Xie 2a6c8ecb60 SWDEV-258808 - OCLSeparateCompile subtest of oclcompiler error
[PAL to KFD/ROCr][ROCr_Runtime][Vega10] OCLSeparateCompile subtest of
oclcompiler from ocltst test package is encountering clLinkProgram()
failed (chksum 0x00000001) error

If runtime does not provide a file name as dump file to ELF library,
ELF library use a temp file in current folder.
The current folder can be not writable for several reasons:
1. The application current folder might be system folder, the user
  does not have write permission.
2. The current folder is under a readonly file system. This happens for
embedded customers.

Tested in VEGA10. Issue was fixed.

Change-Id: Ic0e9f040b7c7583914301673cce237ab28b0c0cb


[ROCm/clr commit: 6327dbc4cc]
2020-11-24 15:08:12 -05:00
Jason Tang 091f1e8e85 Change file mode 755 back to 644
Change-Id: I4ba5d66997ffd3331c56674d4bf805160dcdf049


[ROCm/clr commit: 25cc965c76]
2020-10-19 15:09:32 -04:00
Sarbojit Sarkar 70d71642d2 [perf]hipMalloc performance optimization
Change-Id: I6e8a918cc1c4cafad197b09e10755cd180e11ead


[ROCm/clr commit: 4a025e1a87]
2020-10-06 03:19:41 -04:00
kjayapra-amd 3e6cf63a83 SWDEV-241902 - Changes to pass file descriptor and offset to load code object.
Change-Id: I0243cccdeaa533b2a56fde42f12d5424c3b63a3b


[ROCm/clr commit: a66c56d641]
2020-09-15 07:54:24 -04:00
Laurent Morichetti c863b2074b Use std::atomic
Replace amd::Atomic with std::atomic. Remove make_atomic uses by
converting the variable to std::atomic and making sure the memory
order is relaxed when synchronizes-with is not needed.

Delete utils/atomic.hpp.

Change-Id: I0b36db8d604a8510ac6e36b32885fd16a1b8ccfa


[ROCm/clr commit: 5d4b6f74d3]
2020-09-09 14:55:29 -04:00
Tao Sang f3b85497ae Replace private libelf with elfio
Change-Id: I4c630d78f7bf23dda85ec8480bb2790864405657


[ROCm/clr commit: e986f5c820]
2020-08-26 12:32:13 -04:00
Tao Sang 7591ff8172 Fix static lib crash by setting top init_priority
Set top init_priority on affecting global variables so that
they will be created firstly and destroyed lastly.

Change-Id: Ied59fbecab66ba8195c4a7a02b6bef9fa2fad3af


[ROCm/clr commit: f7bf882981]
2020-07-06 16:54:10 -04:00
kjayapra-amd 5a1e09a37d SWDEV-229840 - Add Debug prints when the element is already present in MemObjMap_
Change-Id: I21129d087e73cc2a9e35f03e6a1a2dc527626f48


[ROCm/clr commit: 71c05075ba]
2020-06-19 12:33:20 -04:00
Saleel Kudchadker f00b041e6c Reset GPU_FORCE_BLIT_COPY_SIZE as its fixed in KFD
Commit ebcfa85cf7ebb26c96fca48a34292d88e74dd675
fixes programming of SDMA*_ULV_CNTL.HYSTERIS register

Change-Id: Ibb1d824bf3f8e351f840adbc099601b322f935f6


[ROCm/clr commit: d8efc31c34]
2020-06-17 13:23:41 -07:00
Saleel Kudchadker 2a42d5838d Set hidden mem witholding to 0 by default
TF doesn't reserve all available memory now. If any
client wants to reserve they can explicitly set
HIP_HIDDEN_FREE_MEM env var
Change-Id: Ied3a948b79f49aa7327f6a820e9789e39cec143b


[ROCm/clr commit: d8ca3c632c]
2020-06-04 14:37:40 -04:00
kjayapra-amd 95d6ff1279 SWDEV-229840 - Remove false error messages.
Change-Id: I0346768a2a52913d5330bc2007a7706e2a439c47


[ROCm/clr commit: 32043017ed]
2020-05-22 18:18:41 -04:00
Michael LIAO b785d25506 Clear executable permission.
Change-Id: Ia0d363b1ba89d7947e5b5a55cb67edba86f0515e


[ROCm/clr commit: 503ef06555]
2020-05-07 10:38:58 -04:00
Saleel Kudchadker 6b7c6748b1 Add a threshold for forcing ROCr to take blit path
This workaround is to avoid performance penalty of SDMA engine
taking a while to clock up from a lower DPM state. Add env var
GPU_FORCE_BLIT_COPY_SIZE (1024 by default for HIP in KB). Forcing
Src and Dst agent to be amdgpu makes ROCr take blit copy path for
what otherwise should have been SDMA copy

Change-Id: I222f687155f86000d17d66d25182e490b6710463


[ROCm/clr commit: 5f64e6e7ad]
2020-04-28 17:11:24 -04:00
kjayapra-amd 236705c62f SWDEV-229840 - Improve error messages on ROCCLR Layer.
Change-Id: Iab7d9156cdc206db86385aa05023a0095ed40f92


[ROCm/clr commit: 7458bf9964]
2020-04-19 20:01:49 -04:00
Vlad Sytchenko 4720e03e65 Revert "(SWDEV-210228)"
This reverts commit 9ce8e0eeb8.

Change-Id: I1e24ce384ae4cc7b39b019dac328e17cca687d38


[ROCm/clr commit: e57dbb684f]
2020-04-14 16:15:58 -04:00
Vladislav Sytchenko 9ce8e0eeb8 (SWDEV-210228)
Don't error when querying the number of devices if there are no devices present in the system.

We should just return 0 for the number of devices in this case and let the application handle this situation.

Change-Id: I20614ade5e649f3ce9ddd970d4b38bfe296f6cdb


[ROCm/clr commit: 2a223ecec6]
2020-04-01 13:36:44 -04:00
German Andryeyev 35dee1ac53 SWDEV-193956 - [hipclang-vdi-rocm][perf]
~45% to 50% of Performance drop on rocBLAS_int8 test

Add support for active waits without blocking the host thread.

Change-Id: Ie7bb48dcafcb4c93d448bf74749b829b626c3578


[ROCm/clr commit: 0fc433e076]
2020-03-04 17:02:15 -05:00
Saleel Kudchadker ae58f45215 Increase the amount of free mem withheld
Change-Id: I37ec2250885758f122db6eac0e897dc16d02558d


[ROCm/clr commit: a788f0bc15]
2020-02-15 16:14:16 -08:00
Saleel Kudchadker 0ddfa04517 Implement HIP_HIDDEN_FREE_MEM env var
Set value to 256Mb to reflect what HIP/HCC reserves
Change-Id: Icaadf79f60d3916965ac168da237d15b975b1fe4


[ROCm/clr commit: 0730b39adb]
2020-02-14 12:57:11 -05:00
Laurent Morichetti b3297f189d Replace cl_* integral types with standard types.
cl_bool -> bool
cl_int -> int32_t
cl_uint -> uint32_t
cl_long -> int64_t
cl_ulong -> uint64_t
cl_float -> float
cl_double -> double
cl_bitfield -> uint64_t

Change-Id: I840c8993b55f98f5b745d21e27f5f28233647a58


[ROCm/clr commit: d9d9c69399]
2020-02-12 13:16:06 -08:00
Laurent Morichetti e284923583 Update copyright info
Change-Id: Ia4f9ff0f5f873b4223a8cca154188bb0d2f1abba


[ROCm/clr commit: b4c6143a2f]
2020-02-04 09:26:14 -08:00
Laurent Morichetti 011f3e945b Merge branch 'origin/pghafari/vdi-prototype' into lmoriche/amd-master
Change-Id: Id3b833d405596735becb3346f3b08c6da57033fe


[ROCm/clr commit: 20c7173849]
2020-01-30 20:12:13 -08:00