344 Commits

Autor SHA1 Mensaje Fecha
Vladislav Sytchenko 086bdf83b4 SWDEV-232428 - Push hostcall implementation to the device layer
This change unifies the hostcall implementation for all the backends,
by pushing the common logic to the device layer. This is done by
replacing the use of hsa_signal_t with device::Signal (a light wrapper
around it).

Change-Id: I7b6fca7930b5a0b199da5d85e2e048354cc04e7b


[ROCm/clr commit: 671778bdd3]
2021-02-16 17:19:57 -05:00
Jason Tang ac06dab550 SWDEV-265304 - Disable GFX8 in LinuxPro ROCr build
Change-Id: Ia26bb025a133a4acb255a539a45668975019cc6e


[ROCm/clr commit: c65be06c4c]
2021-02-16 13:32:47 -05:00
Ravi C Akkenapally 6629930067 SWDEV-179105 - Stream Operations: Add support for Wait and Write
Change-Id: Ibffa1d6d573826b64763da280074a77271d66808


[ROCm/clr commit: 0a5f9a3b10]
2021-02-15 17:02:38 -08:00
kjayapra-amd 4583cbafee SWDEV-270013 - Allocate kernel_arguments from kern_arg & finegrain pool instead of coarse grain.
Change-Id: Id4c6977934fdd6ef2311f6e75593801f1e51983c


[ROCm/clr commit: 2df099df9e]
2021-02-15 18:20:08 -05:00
Payam 72b49f0800 SWDEV-257937 - Updated fix for ROC_BARRIER_SYNC=0
Change-Id: I7e28e541b654db57fb0890d7dbb7519cfb2d93db


[ROCm/clr commit: a2e0b0495c]
2021-02-11 14:01:45 -05:00
German Andryeyev 1ac2b818e6 SWDEV-271806 - Disable pinning for views.
Only parent object should pin system memory

Change-Id: Ic9a0a34e3aff2263501c564c3cebd33f4f7e2455


[ROCm/clr commit: fb142e7b2f]
2021-02-11 13:05:58 -05:00
Rahul Garg ff35f82881 SWDEV-271182 - Fix HdpMemFlushCntl and HdpRegFlushCntl
Change-Id: Ib690b475c2c4514c862ded5fc2bdd1049e27bd46


[ROCm/clr commit: df0b14ff47]
2021-02-10 11:40:35 -05:00
German Andryeyev e60c7aa890 SWDEV-269654 - Fix HIP stream busy query
- Avoid GPU wait on the marker submission and update the command
batch after HSA signal callback upon HSA barrier completion.

Change-Id: I5c1c97212aefc2ae4b99aa9e2a81627ee9a38c1c


[ROCm/clr commit: 6966d8098e]
2021-02-09 12:57:12 -05:00
kjayapra-amd 4693ecf345 SWDEV-270013 - Adding code to differentiate between kern_arg + fine_grain and fine_grain segment of system memory.
Change-Id: Id0404b2dab8561946ad0a90a77030582f7e021a4


[ROCm/clr commit: 85fafb0561]
2021-01-28 09:48:17 -05:00
Jason Tang 6fb4972c65 SWDEV-269147 - Disable ROC offline devices for now
Change-Id: I520f3c8e56db91cbc384d08beba4e0bd4626941d


[ROCm/clr commit: 1e08a3e0cd]
2021-01-23 14:48:07 -05:00
Tony Tye a05c745d54 SWDEV-268864 - Remove duplicatation of isa related information
Remove targetId_, gfxipMajor_, gfxipMinor_ and gfxipStepping_ from
device::Info as they are now available in device::Isa.

Change-Id: I381b1d4798ebf50655740e004a01ac7f86dbf668


[ROCm/clr commit: c2308216dd]
2021-01-18 22:32:37 +00:00
Tony Tye 902cf1a239 Update code object handling for GSL, PAL and ROCm
- Correct GSL path to report targets using the TargetID syntax.

- Correct GSL path to check compatibility of code objects when
  loading.

- Add concept of an device isa and create a registery used by ROCm,
  PAL and GSL.

- Support XNACK and SRAMECC target features consistently for PAL and ROCm.

- Correct logic for NullDevices and asserts to avoid memory coruption.

- Allow all NullDevices to be created for HIP.

- Numerous other code improvements.

Change-Id: I40abf3d2b22249c1492d1af5919665f8184f4e0e


[ROCm/clr commit: c7e8d91e14]
2021-01-14 11:11:51 -05:00
Tony Tye 44c3b775a4 Use strncpy
Use strncpy instead of strcpy to ensure the arrays will not be
overflowered. Only copy one less than size of char array to leave a
NUL character at the end even if the copy is truncated provided the
original object is zeroed memory.

Change-Id: I00f7679630cf28dcb9a51cb0aba2810a4f4c72b9


[ROCm/clr commit: e0448535a3]
2021-01-13 08:24:28 +00:00
Tony Tye 4bfc88db5f Simplify handling of Settings
roc:Settings and pal::Settings are derivations. Allocate them as their
derived class then assign that to the base class member to avoid the
need for a static_cast.

Use device::settings to access the Settings consistently.

Change-Id: I0f85157962fbf6fed176da0caf83b723bcbe1452


[ROCm/clr commit: 583dddf6b6]
2021-01-13 08:24:28 +00:00
Tony Tye 29ca46821b Add stronger checking
- Add assertions to enforce that objects are of the correct kind and
  have been allocated.

- Make destructors check if objects have been allocated before
  deleting.

- Operations that require a non-NullDevice return failure if given a
  NullDevice.

- Use static_cast rather than reinterpret_cast when cohersing from a
  base class to a derived class.

Change-Id: I02ee0ea9d7982fd7ca29d49c9b02cfae111b7127


[ROCm/clr commit: e5431676d4]
2021-01-13 08:24:28 +00:00
Tony Tye 303b379d62 [NFC] Reorder some system includes alphebetically
Change-Id: I5245eb8482b447f6ce95e1c0b686d09ca7d20deb


[ROCm/clr commit: 8992f9e18d]
2021-01-13 08:24:28 +00:00
Tony Tye 3b6c42f78d [NFC] Correct comments and line spacing
- Correct spelling mistakes or working in comments.
- Adding missing line separators.
- Add missing comments for namespace closing brace.

Change-Id: If09cdd38aa088b0f68f750dfdef81351eb8c4935


[ROCm/clr commit: eb16dc5ef3]
2021-01-13 08:24:28 +00:00
German Andryeyev 27e6704673 Explicit page table update on all devices
HMM with xnack enabled should automatically update page tables,
but currently it doesn't perform that. For now, runtime will
force page table update on all devices unconditionally.

Change-Id: Idfa6e1c145e6c114856214dce042b8a8349e5c58


[ROCm/clr commit: 7d3aaa7a39]
2021-01-12 23:16:46 -05:00
German Andryeyev 30cf81fc93 Add HSA signal global tracking logic.
Implement the global class for signals tracking per device queue.
Switch to the new tracking mechanism.

Change-Id: I3c4dda04b34e6d18d6a95510d84102909633b415


[ROCm/clr commit: 8698aeef0d]
2021-01-08 12:57:33 -05:00
German Andryeyev b301590fb9 Fix a deadlock in ROCr backend
When OCL ROCr backend performs CL_MEM_COPY_HOST_PTR it may attempt
to have access to amd::Memory object it's currently creating,
but it's not ready yet. The logic creates a temporary dummy object
to perform a copy transfer. The new change will make sure runtime
skips allocation of the same device::Memory object second time.

Change-Id: I14c6a00a3941fdcaa6aea299e9f096e4c3f5cadf


[ROCm/clr commit: 1fde842703]
2020-12-09 13:23:17 -05:00
German Andryeyev 8014e4c7bc Remove obsolete terminate() method
Change-Id: I66b4a74f17977f1af320f402402a2f1b602e9911


[ROCm/clr commit: 08b846ae12]
2020-11-30 11:46:09 -05:00
Aryan Salmanpour 265afae619 don't update maxComputeUnits_ if any exception occurs during conversion of global CU mask string
Change-Id: I7664809fe84d7422b18b1272ffeb642e03a39f1a


[ROCm/clr commit: 72277c29b0]
2020-11-23 09:51:19 -05:00
Aryan Salmanpour e8c7cf569f Add an environment variable for setting a global CU mask
Change-Id: I773b152023c7b8e1e679a42015748f9b23fd946d


[ROCm/clr commit: d03ee6eff6]
2020-11-20 10:05:09 -05:00
Jason Tang 649f1872d9 SWDEV-254181 - Fix ocl min_max_image_buffer_size regression.
ROCr is now reporting the actual HW addressing limits for HIP, so OpenCL will have to impose lower limit.

Change-Id: I60c2ce27ed1d1f45f16fb76438965a236ba872c6


[ROCm/clr commit: 1da0fe4263]
2020-10-26 09:15:31 -04:00
Jason Tang 091f1e8e85 Change file mode 755 back to 644
Change-Id: I4ba5d66997ffd3331c56674d4bf805160dcdf049


[ROCm/clr commit: 25cc965c76]
2020-10-19 15:09:32 -04:00
Alex Xie 23a7abc8e8 SWDEV-251360 - Add tracing for memory allocation/free.
This can be used to debug VM fault

Change-Id: I7685485b0450ea84d10b710639ad7b6c5ec2fcf3


[ROCm/clr commit: e4e6c46356]
2020-10-15 15:38:55 -04:00
Rahul Garg 7b0edf7aa0 Fix PCI bus domain ID
SWDEV-256338

Change-Id: I09afdca4f1a08f99ce662a4c4ed8a51d85500699


[ROCm/clr commit: a224dc2a7b]
2020-10-15 14:59:57 -04:00
Rahul Garg 40b90694c6 Add image1DMaxWidth_ for maxTexture1D property
Needed by SWDEV-254068

Change-Id: Ic650dfb6e5b38d7544ba647c53de52deda39b92d


[ROCm/clr commit: c0f8b52f06]
2020-10-14 17:30:43 -04:00
German Andryeyev 2b3377b0bc Add ROCr queries for HMM support
Change-Id: I2b5508bf0faf8f48dd7348d6a5202fb28de09876


[ROCm/clr commit: c05de4f2f9]
2020-10-13 09:12:00 -04:00
German Andryeyev 2c21a44b40 Add option to skip AQL barrier
The change reuses HSA signals for dispatches as a wait signal.
Skipping the barrier requires to  disable L2 cache for sysmem
allocations and extra tracking for HDP access with the large bar.
ROC_BARRIER_SYNC=0 activates the new logic. Barrier sync is
still used by default.
ROC_ACTIVE_WAIT=1 enables unconditional active wait in ROCr.
The change also consolidated ROCr wait logic under single function.

Change-Id: I6bd1be30aa88258da1b1f9de319ef5a45852afd8


[ROCm/clr commit: d9397590de]
2020-10-06 08:37:12 -04:00
Sarbojit Sarkar 70d71642d2 [perf]hipMalloc performance optimization
Change-Id: I6e8a918cc1c4cafad197b09e10755cd180e11ead


[ROCm/clr commit: 4a025e1a87]
2020-10-06 03:19:41 -04:00
German Andryeyev 7229c259ca Add support for CPU device in advise
Change-Id: I7250e0183580c14cd3d6050ef85f9ce26e36f4a8


[ROCm/clr commit: df63547906]
2020-10-05 12:52:46 -04:00
Tao Sang 9e61c14aeb Fix empty cpu agent on raven system
Change-Id: I30f5e65367613152ce96b80b13e1c9f2a28da807


[ROCm/clr commit: bc7291e85c]
2020-10-05 10:54:57 -04:00
Jatin Chaudhary 2a16ef5d04 Adding and populating available registers per cu value
Change-Id: Ide012038a9d74b20166ce1e69a9f2c0cbdce0d73


[ROCm/clr commit: d0f009a0ee]
2020-09-28 05:30:23 -04:00
Aryan Salmanpour b01d49542c Fix a crash when printf used in a kernel launched on a stream with custom CU mask
SWDEV-249719 - root cause: queues with custom CU mask are not inserted
into queuePool_ (i.e., queue of reusable HSA queues) of ROC device class
causing a crash when creating hostcall buffers for printf

Change-Id: Ieee7005d9a5a30b3113394ce23ee65927126d0d6


[ROCm/clr commit: 2e199bd492]
2020-09-25 09:25:19 -04:00
Satyanvesh Dittakavi c667dc6fa0 set free mem to zero avoding underflow
Change-Id: I964b41695fb41712624146c5959a35b37eacf52d


[ROCm/clr commit: 90c694988b]
2020-09-18 11:56:57 -04:00
Jason Tang 61c85339c3 SWDEV-252095 - Fix progvar_prog_scope_misc test Aborted (core dumped)
The progvar_prog_scope_misc test expects CL_DEVICE_MAX_MEM_ALLOC_SIZE to be multiple of integer.

Change-Id: Ic0690f5ab06ffa3feafb718beabbcf83ab53978c


[ROCm/clr commit: 740f1ba0aa]
2020-09-11 12:36:39 -04:00
Jason Tang eaf65e59ae Remove gfxipVersion_ from device level
Change-Id: I11485beffdb9371a20d7abcaa1d1774c102db574


[ROCm/clr commit: 5ecce5c287]
2020-09-07 11:33:49 -04:00
kjayapra-amd bfaa8f8ab5 SWDEV-240800 - P2P device attributes support
Change-Id: I2b060a66715f676dfb7136940e69e21288f509d8


[ROCm/clr commit: 0163d8acc0]
2020-09-03 14:41:53 -04:00
Sarbojit Sarkar a5c2a7ff84 Fix for HIP_VISIBLE_DEVICE [SWDEV-247751]
Change-Id: Iff0ca6646f9d97b1ffa378c3cdc44159b6bf8ad0


[ROCm/clr commit: 8ac8384aea]
2020-09-02 02:08:56 -04:00
Aryan Salmanpour 771a8abb90 SWDEV-248499 Fix a crash when printf is used with cooperative kernels
root cause - cooperative queue is not inserted into queuePool_ (HSA queues) of ROC device calss causing a crash when creating hostcall buffers for printf

Change-Id: I3f9aceb4e5fe6a7c7a2a549a4bb0a3511fe02799


[ROCm/clr commit: d2b9d267b2]
2020-08-25 16:51:34 -04:00
German Andryeyev a5ca15a599 Enable prefetch async functionality
Fix a typo with the name define, when compilation wasn't enabled.
Force CPU prefetch if system was forced in runtime

Change-Id: Id4b578f9fa44a45426fdb5d8ecb1da803aa42313


[ROCm/clr commit: 6e69258b69]
2020-08-13 11:09:10 -04:00
Jason Tang d4cbe1a339 Fix HSAIL build
Change-Id: I34209b3ae0ce0eefc30e464fd7f081a0b62449b0


[ROCm/clr commit: 7bb671fa55]
2020-08-07 17:18:38 -04:00
Jason Tang 04054e9b60 SWDEV-246565 - Remove passing -msram-ecc to Comgr
Change-Id: I1604a0014186a5779561da3ec3eefec65aff5c37


[ROCm/clr commit: f8f6bc16a1]
2020-08-06 12:48:53 -04:00
Jatin Chaudhary ba5507f650 Adding device memory channel information
Change-Id: I47dfa3daff97b1e3f42484dde5a4aa64244ac544


[ROCm/clr commit: 2f3df8e691]
2020-08-06 06:54:35 -04:00
Tao Sang 44eb207f8d Apply constexpr on global constant varaibles
When HIP_ENABLE_DEFERRED_LOADING=0, many global variables will be
referenced but they are not initialized in that early time. The patch
will use constexpr to initialze global constant varables in compile
time.

Change-Id: I9d538b7abc6a0ce700ec3332b97fc144db5fc1ef


[ROCm/clr commit: fdef6f722f]
2020-07-22 22:14:13 -04:00
Tao Sang 10f1bfc765 Add numa lib detection in cmake
If numa lib is in building system, define ROCCLR_NUMA_SUPPORT to
support numa; otherwise, don't support numa.

Change-Id: I3848d7fdec5a3813ff1edad9b71ff04372dc0b9a


[ROCm/clr commit: 214827defa]
2020-07-21 14:58:56 -04:00
Jason Tang cd1ee42c36 SWDEV-232197 - Use HSA_ISA_INFO_NAME as the TargetID
TargetID will be passed to LC compiler.

Change-Id: I0385634922c11d53b57ebd596047698c47bda72b


[ROCm/clr commit: 8b7e0f3cfe]
2020-07-21 09:24:03 -04:00
Jason Tang e69ff5e142 SWDEV-244000 - Print freeMem_ for memory accounting
Change-Id: I5bbce213236a109e9aa69766d2d4d370b58d0d08


[ROCm/clr commit: 5e0bb5bd39]
2020-07-15 13:44:05 -04:00
kjayapra-amd adb0ce1c43 SWDEV-240165 - Move all amd::MemObjMap_ reference to ROCclr and only allow base ptr to get ipc handle.
Change-Id: I9de10a0c4ba4dee3b3c8b972966840ab807001d8


[ROCm/clr commit: 16e6b65b5c]
2020-07-09 21:19:45 -04:00