When a new enough microcode build is running use a vendor AQL packet
to submit the PM4 IB.
Change-Id: Icd3e2b322c418477420ba4a29f4455ce340ef0d2
[ROCm/ROCR-Runtime commit: 4d62b9482a]
SWDEV-107075 - [OCL][VG10] Conformance RQ Mipmaps tests are failing. Adding the below changes to fix the failures
- For 1Darray images the Height should be 1 and we should use the correct value for "numSlices" in copyRegion
- For 2Darray images the Depth should be 1 and we should use the correct value for "numSlices" in copyRegion
- The right Height should be used when gpuMemoryDepthPitch is calculated
Also, PAL was not obeying the "numSlices" parameter for SDMA-based memory <--> image or image <--> image copies and this issue is fixed in CL#1369626.
The current changes in OCL runtime will be submitted into stg once the above CL from PAL gets promoted into OCL stg.
ReviewBoardURL = http://ocltc.amd.com/reviews/r/12260/
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palresource.cpp#24 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palsettings.cpp#17 edit
[ROCm/clr commit: df5aae929a]
SWDEV-107075 - [OCL][VG10] Conformance RQ Mipmaps tests are failing. Adding the below changes to fix the failures
- For 1Darray images the Height should be 1 and we should use the correct value for "numSlices" in copyRegion
- For 2Darray images the Depth should be 1 and we should use the correct value for "numSlices" in copyRegion
- The right Height should be used when gpuMemoryDepthPitch is calculated
Also, PAL was not obeying the "numSlices" parameter for SDMA-based memory <--> image or image <--> image copies and this issue is fixed in CL#1369626.
The current changes in OCL runtime will be submitted into stg once the above CL from PAL gets promoted into OCL stg.
ReviewBoardURL = http://ocltc.amd.com/reviews/r/12260/
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palresource.cpp#24 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palsettings.cpp#17 edit
SWDEV-2 - Change OpenCL version number from 2360 to 2361.
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/utils/versions.hpp#2107 edit
[ROCm/clr commit: 5dc87aa5f5]
SWDEV-2 - Change OpenCL version number from 2360 to 2361.
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/utils/versions.hpp#2107 edit
1. Split hip_ir.ll to hip_hc.ll and hip_hc_gfx803.ll
a. hip_hc.ll contains arch generic ir implementations
b. hip_hc_gfx803.ll contains gfx803 (fiji, polaris) specific ir
2. HIPCC can now parse --amdgpu-target=*.
a. Usage: hipcc --amdgpu-target=gfx803 --amdgpu-target=gfx701
b. TODO: Convert to --amdgpu-target=gfx803,gfx701
3. With LLC in HCC able to generate native f16 isa, removed inline half asm math ops
4. Fixed threadfence and threadfence_block to use functions in rocdl
Change-Id: Ic9a9e3e04139b0d75d2c2a263c030ca77adc1019
[ROCm/clr commit: 60ec83c683]
1. Split hip_ir.ll to hip_hc.ll and hip_hc_gfx803.ll
a. hip_hc.ll contains arch generic ir implementations
b. hip_hc_gfx803.ll contains gfx803 (fiji, polaris) specific ir
2. HIPCC can now parse --amdgpu-target=*.
a. Usage: hipcc --amdgpu-target=gfx803 --amdgpu-target=gfx701
b. TODO: Convert to --amdgpu-target=gfx803,gfx701
3. With LLC in HCC able to generate native f16 isa, removed inline half asm math ops
4. Fixed threadfence and threadfence_block to use functions in rocdl
Change-Id: Ic9a9e3e04139b0d75d2c2a263c030ca77adc1019
1. Split hip_ir.ll to hip_hc.ll and hip_hc_gfx803.ll
a. hip_hc.ll contains arch generic ir implementations
b. hip_hc_gfx803.ll contains gfx803 (fiji, polaris) specific ir
2. HIPCC can now parse --amdgpu-target=*.
a. Usage: hipcc --amdgpu-target=gfx803 --amdgpu-target=gfx701
b. TODO: Convert to --amdgpu-target=gfx803,gfx701
3. With LLC in HCC able to generate native f16 isa, removed inline half asm math ops
4. Fixed threadfence and threadfence_block to use functions in rocdl
Change-Id: Ic9a9e3e04139b0d75d2c2a263c030ca77adc1019
[ROCm/hip commit: 01b66dd998]
1. Split hip_ir.ll to hip_hc.ll and hip_hc_gfx803.ll
a. hip_hc.ll contains arch generic ir implementations
b. hip_hc_gfx803.ll contains gfx803 (fiji, polaris) specific ir
2. HIPCC can now parse --amdgpu-target=*.
a. Usage: hipcc --amdgpu-target=gfx803 --amdgpu-target=gfx701
b. TODO: Convert to --amdgpu-target=gfx803,gfx701
3. With LLC in HCC able to generate native f16 isa, removed inline half asm math ops
4. Fixed threadfence and threadfence_block to use functions in rocdl
Change-Id: Ic9a9e3e04139b0d75d2c2a263c030ca77adc1019
Aditya Atluri
James Edwards
Jay Cornwall
foreman
Maneesh Gupta
pensun
Sylvain Jeaugey
Evgeny Mankov