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Author SHA1 Message Date
Vladana Stojiljkovic 30571de816 SWDEV-492768 - Match hipStreamAddCallback capture behavior with nvidia 
Change-Id: I7a084d8eeffe8b5095f7eb9969a565a40e76bb4b


[ROCm/clr commit: f6c8bbf4dc]
 2024-10-31 12:42:17 -04:00
Vladana Stojiljkovic f6c8bbf4dc SWDEV-492768 - Match hipStreamAddCallback capture behavior with nvidia 
Change-Id: I7a084d8eeffe8b5095f7eb9969a565a40e76bb4b
 2024-10-31 12:42:17 -04:00
Vladana Stojiljkovic 116effa83c SWDEV-491452 - Allow hipMemAdvise capturing only inrelaxed mode 
Change-Id: I1ca5e050ff869b486e3a0a41d7f06390a88e1110


[ROCm/clr commit: 02bbe11e56]
 2024-10-31 12:41:47 -04:00
Vladana Stojiljkovic 02bbe11e56 SWDEV-491452 - Allow hipMemAdvise capturing only inrelaxed mode 
Change-Id: I1ca5e050ff869b486e3a0a41d7f06390a88e1110
 2024-10-31 12:41:47 -04:00
Vladana Stojiljkovic 7ff9aa117d SWDEV-493526 - Create kernel node when hipLaunchByPtr is captured 
Change-Id: Id3493485dfdb468436ab33e6d7cb19b6b0066fd4


[ROCm/clr commit: e08df57502]
 2024-10-31 12:41:31 -04:00
Vladana Stojiljkovic e08df57502 SWDEV-493526 - Create kernel node when hipLaunchByPtr is captured 
Change-Id: Id3493485dfdb468436ab33e6d7cb19b6b0066fd4
 2024-10-31 12:41:31 -04:00
Yiannis Papadopoulos 2837825b14 rocr: Adding pointer to the owner driver in Agent class 
Change-Id: If913d7c7e4caf6d6e6eee3a858a27c6027c2923f
 2024-10-31 12:29:10 -04:00
Yiannis Papadopoulos 83513d4daf rocr: Adding pointer to the owner driver in Agent class 
Change-Id: If913d7c7e4caf6d6e6eee3a858a27c6027c2923f


[ROCm/ROCR-Runtime commit: 2837825b14]
 2024-10-31 12:29:10 -04:00
Chris Freehill c7521a5f2a rocr: Fix supported_isas transient memory issue 
An ASAN run of the release build revealed some elements of
the supported_isas static map were still using stack data. This
change makes it use heap data so it will persist.

Change-Id: Ie51887e88b9e2dec27acfc97ea45a6219fea971c
 2024-10-31 11:59:29 -04:00
Chris Freehill 4005fd9b9d rocr: Fix supported_isas transient memory issue 
An ASAN run of the release build revealed some elements of
the supported_isas static map were still using stack data. This
change makes it use heap data so it will persist.

Change-Id: Ie51887e88b9e2dec27acfc97ea45a6219fea971c


[ROCm/ROCR-Runtime commit: c7521a5f2a]
 2024-10-31 11:59:29 -04:00
Vladana Stojiljkovic d655fa8c66 SWDEV-489571 - Fix ihipGraphAddMemsetNode to allow memset of 3d portions of an array 
* When hipMemset3dAsync is captured, a 3d extent can set be as a parameter (depth > 1). That worked on nvidia, but on amd wrong portion of array was filled because when creating Memset3D command, extent dimensions were used to create pitchedPtr, instead of original array width and height.
* Also, when capturing hipMemset3dAsync, nvidia allows any of the extent dimension to be 0, and in that case, no work should be done.

Change-Id: I46a605bf9ae801cd3348e98d528c21263a8eefce


[ROCm/clr commit: ec60bb1aed]
 2024-10-31 10:29:54 -04:00
Vladana Stojiljkovic ec60bb1aed SWDEV-489571 - Fix ihipGraphAddMemsetNode to allow memset of 3d portions of an array 
* When hipMemset3dAsync is captured, a 3d extent can set be as a parameter (depth > 1). That worked on nvidia, but on amd wrong portion of array was filled because when creating Memset3D command, extent dimensions were used to create pitchedPtr, instead of original array width and height.
* Also, when capturing hipMemset3dAsync, nvidia allows any of the extent dimension to be 0, and in that case, no work should be done.

Change-Id: I46a605bf9ae801cd3348e98d528c21263a8eefce
 2024-10-31 10:29:54 -04:00
Alex Xie e751f00ca2 SWDEV-489468 - make resource cache bigger for APU 
Change-Id: I065c712acd06c273a0b194fe792ec4f876fa9c46


[ROCm/clr commit: f8c56f6bac]
 2024-10-31 09:55:01 -04:00
Alex Xie f8c56f6bac SWDEV-489468 - make resource cache bigger for APU 
Change-Id: I065c712acd06c273a0b194fe792ec4f876fa9c46
 2024-10-31 09:55:01 -04:00
Chris Freehill 4256630fd0 rocr: Fix several rocrtst memory errors 
Change-Id: I9049a3905fb26cf9b8ad0839684a70771a49f616
 2024-10-30 20:36:25 -04:00
Chris Freehill dd33820b23 rocr: Fix several rocrtst memory errors 
Change-Id: I9049a3905fb26cf9b8ad0839684a70771a49f616


[ROCm/ROCR-Runtime commit: 4256630fd0]
 2024-10-30 20:36:25 -04:00
Tao Sang 2cce18fb38 SWDEV-492563 - Fix Ocl issues 
1. Fix LDSSize type to be uint32_t.
2. Prevent clWaitForEvents running on complete events whose
   HostQueue have been destructed.

Change-Id: I829e915f56b37db2ba76bb876c9656166534f154


[ROCm/clr commit: 82dff9a67d]
 2024-10-30 19:15:59 -04:00
Tao Sang 82dff9a67d SWDEV-492563 - Fix Ocl issues 
1. Fix LDSSize type to be uint32_t.
2. Prevent clWaitForEvents running on complete events whose
   HostQueue have been destructed.

Change-Id: I829e915f56b37db2ba76bb876c9656166534f154
 2024-10-30 19:15:59 -04:00
corey-derochie-amd 8444e5fe7f Set minimum ROCm version for MSCCLPP to 6.2 (#1401) 
* Added ROCm version check around setting `ENABLE_MSCCLPP` flag.

[ROCm/rccl commit: 6db2644766]
 2024-10-30 16:48:54 -06:00
corey-derochie-amd 6db2644766 Set minimum ROCm version for MSCCLPP to 6.2 (#1401) 
* Added ROCm version check around setting `ENABLE_MSCCLPP` flag.
 2024-10-30 16:48:54 -06:00
Yiltan Hassan Temucin 9ae2320ac3 remove cooperative groups 
[ROCm/rocshmem commit: fe767d9abf]
 2024-10-30 20:10:21 +00:00
Yiltan Hassan Temucin fe767d9abf remove cooperative groups 2024-10-30 20:10:21 +00:00
Avinash da3887bafb Memory leak fixes in hostside functions (#1388) 
memory leak fixes for parseRome4P2H and ncclTopoAddGPU

[ROCm/rccl commit: d6006f0425]
 2024-10-30 14:25:56 -05:00
Avinash d6006f0425 Memory leak fixes in hostside functions (#1388) 
memory leak fixes for parseRome4P2H and ncclTopoAddGPU
 2024-10-30 14:25:56 -05:00
Tim e346e19065 Adjustment for UT Sendrecv (#1400) 
Enabled UT sendrecv to same rank and refactor UBR call

[ROCm/rccl commit: fd9924cfe7]
 2024-10-30 15:13:53 -04:00
Tim fd9924cfe7 Adjustment for UT Sendrecv (#1400) 
Enabled UT sendrecv to same rank and refactor UBR call
 2024-10-30 15:13:53 -04:00
avinashkethineedi f682dcee3f Add example code demonstrating team-based broadcast and alltoall API usage 
* Update all_reduce test to keep the naming convention uniform across the examples


[ROCm/rocshmem commit: 68c893d790]
 2024-10-30 19:09:17 +00:00
avinashkethineedi 68c893d790 Add example code demonstrating team-based broadcast and alltoall API usage 
* Update all_reduce test to keep the naming convention uniform across the examples
 2024-10-30 19:09:17 +00:00
Aryan Salmanpour 75cdddf403 use a single context for decoding (#68) 
[ROCm/rocjpeg commit: 6d31992746]
 2024-10-30 11:48:47 -04:00
Aryan Salmanpour 6d31992746 use a single context for decoding (#68) 2024-10-30 11:48:47 -04:00
Rahul Manocha 3bf096bb71 SWDEV-475482 - Disable Texture Object tests to merge clr change on windows 
Change-Id: I61893d4e950a5683c04bf0a0ace9a68c7e328e98


[ROCm/hip-tests commit: 9e77ca3f71]
 2024-10-30 11:33:39 -04:00
Rahul Manocha 9e77ca3f71 SWDEV-475482 - Disable Texture Object tests to merge clr change on windows 
Change-Id: I61893d4e950a5683c04bf0a0ace9a68c7e328e98
 2024-10-30 11:33:39 -04:00
srawat d8cfdd2887 Refactor API reference docs (#1125) 
* Refactor API reference docs

* refactor API ref docs

* corrections

* consistent naming

* updates

* Update CHANGELOG.md

* improving SEO

* improving SEO

* Update using-rocprofv3.rst

* Update counter_collection_services.md

* Update using-rocprofv3.rst

* Fixing doc build errors

* changelogs and some formatting issues

---------

Co-authored-by: Gopesh Bhardwaj <gopesh.bhardwaj@amd.com>

[ROCm/rocprofiler-sdk commit: 4204042ac6]
 2024-10-30 19:39:08 +05:30
srawat 4204042ac6 Refactor API reference docs (#1125) 
* Refactor API reference docs

* refactor API ref docs

* corrections

* consistent naming

* updates

* Update CHANGELOG.md

* improving SEO

* improving SEO

* Update using-rocprofv3.rst

* Update counter_collection_services.md

* Update using-rocprofv3.rst

* Fixing doc build errors

* changelogs and some formatting issues

---------

Co-authored-by: Gopesh Bhardwaj <gopesh.bhardwaj@amd.com>
 2024-10-30 19:39:08 +05:30
Nusrat Islam e1c20e7f24 ext-src: Improved allreduce performance in cpx mode for MI308 (#1393) 
To get the improved performance for TP=4, the user needs to use
RCCL_MSCCL_FORCE_ENABLE=1 and MSCCLPP_READ_ALLRED=1. For TP=8, the
user should use MSCCLPP_HIERARCHICAL_ALLRED=1.

[ROCm/rccl commit: 0fb3b5eba9]
 2024-10-30 08:30:15 -05:00
Nusrat Islam 0fb3b5eba9 ext-src: Improved allreduce performance in cpx mode for MI308 (#1393) 
To get the improved performance for TP=4, the user needs to use
RCCL_MSCCL_FORCE_ENABLE=1 and MSCCLPP_READ_ALLRED=1. For TP=8, the
user should use MSCCLPP_HIERARCHICAL_ALLRED=1.
 2024-10-30 08:30:15 -05:00
Gopesh Bhardwaj b69bf8d939 changelog update for release notes (#1171) 
[ROCm/rocprofiler-sdk commit: 762ca819cf]
 2024-10-30 15:48:43 +05:30
Gopesh Bhardwaj 762ca819cf changelog update for release notes (#1171) 2024-10-30 15:48:43 +05:30
Istvan Kiss 122cecc59d SWDEV-490062 - Update documentation 
Change-Id: Ib5297fdda2e05795b3b20436cc1de962e310b08b


[ROCm/hip commit: 3d60bd3a64]
 2024-10-30 06:03:47 -04:00
Istvan Kiss 3d60bd3a64 SWDEV-490062 - Update documentation 
Change-Id: Ib5297fdda2e05795b3b20436cc1de962e310b08b
 2024-10-30 06:03:47 -04:00
Saleel Kudchadker a2b25be61c SWDEV-491375 - Improve MemObjMap perf 
- Create bins each with its own map and lock. This would help cases
where the hash of a VA is differnet than ther one which falls in
different bin, and there is no lock contention
- Use STL shared mutexes, that way we can unique_lock for map updates
vs simple reads which can use shared_lock

Change-Id: I118818be65c6373700f5e511045babb6a398938a


[ROCm/clr commit: e23ff0520b]
 2024-10-30 05:37:33 +00:00
Saleel Kudchadker e23ff0520b SWDEV-491375 - Improve MemObjMap perf 
- Create bins each with its own map and lock. This would help cases
where the hash of a VA is differnet than ther one which falls in
different bin, and there is no lock contention
- Use STL shared mutexes, that way we can unique_lock for map updates
vs simple reads which can use shared_lock

Change-Id: I118818be65c6373700f5e511045babb6a398938a
 2024-10-30 05:37:33 +00:00
Jonathan R. Madsen 22f8106311 Remove serializing Reserved field of HSA_CAPABILITY (#1170) 
- reserved fields have no meaning

[ROCm/rocprofiler-sdk commit: 7f416a2f82]
 2024-10-30 00:12:48 -05:00
Jonathan R. Madsen 7f416a2f82 Remove serializing Reserved field of HSA_CAPABILITY (#1170) 
- reserved fields have no meaning
 2024-10-30 00:12:48 -05:00
Giovanni Lenzi Baraldi f6b0641a2a Update fetch_size metric (#1165) 
Co-authored-by: Gopesh Bhardwaj <gopesh.bhardwaj@amd.com>

[ROCm/rocprofiler-sdk commit: 4acca76edb]
 2024-10-29 21:44:27 -03:00
Giovanni Lenzi Baraldi 4acca76edb Update fetch_size metric (#1165) 
Co-authored-by: Gopesh Bhardwaj <gopesh.bhardwaj@amd.com>
 2024-10-29 21:44:27 -03:00
corey-derochie-amd af1e36a7ee Remove MSCCL switch case fall-through by adding break statement. (#1342) 
[ROCm/rccl commit: ea20af698e]
 2024-10-29 15:47:59 -06:00
corey-derochie-amd ea20af698e Remove MSCCL switch case fall-through by adding break statement. (#1342) 2024-10-29 15:47:59 -06:00
corey-derochie-amd f9d38d8858 6.2 final documentation fixes updated for 6.3 (#1252) (#1399) 
* Update CHANGELOG.md

* Update NOTICES.txt

* [DOCS] Note on using less than 8 MI300 GPUs



* Update README.md



---------

Signed-off-by: nileshnegi <Nilesh.Negi@amd.com>
Co-authored-by: nileshnegi <Nilesh.Negi@amd.com>

[ROCm/rccl commit: 8ac63e7e70]
 2024-10-29 15:23:45 -06:00
corey-derochie-amd 8ac63e7e70 6.2 final documentation fixes updated for 6.3 (#1252) (#1399) 
* Update CHANGELOG.md

* Update NOTICES.txt

* [DOCS] Note on using less than 8 MI300 GPUs



* Update README.md



---------

Signed-off-by: nileshnegi <Nilesh.Negi@amd.com>
Co-authored-by: nileshnegi <Nilesh.Negi@amd.com>
 2024-10-29 15:23:45 -06:00