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مولف SHA1 پیام تاریخ
coleramos425 6da5e58dd5 Enable specs correction, detection of cli_style property, and hbm stack num 
Co-authored-by: fei.zheng <fei.zheng@amd.com>
Signed-off-by: coleramos425 <colramos@amd.com>


[ROCm/rocprofiler-compute commit: 92f429f8b2]
 2024-01-24 16:30:04 -06:00
coleramos425 92f429f8b2 Enable specs correction, detection of cli_style property, and hbm stack num 
Co-authored-by: fei.zheng <fei.zheng@amd.com>
Signed-off-by: coleramos425 <colramos@amd.com>
 2024-01-24 16:30:04 -06:00
coleramos425 924b421c3f Add new submodule for mem chart 
Co-authored-by: fei.zheng <fei.zheng@amd.com>
Signed-off-by: coleramos425 <colramos@amd.com>


[ROCm/rocprofiler-compute commit: e3f76599b3]
 2024-01-24 16:30:04 -06:00
coleramos425 e3f76599b3 Add new submodule for mem chart 
Co-authored-by: fei.zheng <fei.zheng@amd.com>
Signed-off-by: coleramos425 <colramos@amd.com>
 2024-01-24 16:30:04 -06:00
coleramos425 28e83fb63d Update rocprof config files for counter updates 
Co-authored-by: fei.zheng <fei.zheng@amd.com>
Signed-off-by: coleramos425 <colramos@amd.com>


[ROCm/rocprofiler-compute commit: c86334466a]
 2024-01-24 16:30:04 -06:00
coleramos425 c86334466a Update rocprof config files for counter updates 
Co-authored-by: fei.zheng <fei.zheng@amd.com>
Signed-off-by: coleramos425 <colramos@amd.com>
 2024-01-24 16:30:04 -06:00
coleramos425 8b021ccb30 Add new plotille module 
Co-authored-by: fei.zheng <fei.zheng@amd.com>
Signed-off-by: coleramos425 <colramos@amd.com>


[ROCm/rocprofiler-compute commit: 60be13cebd]
 2024-01-24 16:30:04 -06:00
coleramos425 60be13cebd Add new plotille module 
Co-authored-by: fei.zheng <fei.zheng@amd.com>
Signed-off-by: coleramos425 <colramos@amd.com>
 2024-01-24 16:30:04 -06:00
coleramos425 219cc0d16a Update config files for new l2 cache per channel structure and general counter updates 
Co-authored-by: fei.zheng <fei.zheng@amd.com>
Signed-off-by: coleramos425 <colramos@amd.com>


[ROCm/rocprofiler-compute commit: 19ad88a04e]
 2024-01-24 16:30:04 -06:00
coleramos425 19ad88a04e Update config files for new l2 cache per channel structure and general counter updates 
Co-authored-by: fei.zheng <fei.zheng@amd.com>
Signed-off-by: coleramos425 <colramos@amd.com>
 2024-01-24 16:30:04 -06:00
coleramos425 c20a76f03d Modify schema to reflect new l2 cache per channel 
Co-authored-by: fei.zheng <fei.zheng@amd.com>
Signed-off-by: coleramos425 <colramos@amd.com>


[ROCm/rocprofiler-compute commit: 8fadbb070f]
 2024-01-24 16:30:04 -06:00
coleramos425 8fadbb070f Modify schema to reflect new l2 cache per channel 
Co-authored-by: fei.zheng <fei.zheng@amd.com>
Signed-off-by: coleramos425 <colramos@amd.com>
 2024-01-24 16:30:04 -06:00
coleramos425 26f27cdf82 Fix bug in coalescing TCC per channel counters 
Signed-off-by: coleramos425 <colramos@amd.com>


[ROCm/rocprofiler-compute commit: ff09288c83]
 2024-01-24 16:30:04 -06:00
coleramos425 ff09288c83 Fix bug in coalescing TCC per channel counters 
Signed-off-by: coleramos425 <colramos@amd.com>
 2024-01-24 16:30:04 -06:00
coleramos425 bdda466109 Implement specs correction function 
Co-authored-by: fei.zheng <fei.zheng@amd.com>
Signed-off-by: coleramos425 <colramos@amd.com>


[ROCm/rocprofiler-compute commit: 8534cec3a6]
 2024-01-24 16:30:04 -06:00
coleramos425 8534cec3a6 Implement specs correction function 
Co-authored-by: fei.zheng <fei.zheng@amd.com>
Signed-off-by: coleramos425 <colramos@amd.com>
 2024-01-24 16:30:04 -06:00
coleramos425 a75180dbd2 Add options for --specs and --specs-correction 
Co-authored-by: fei.zheng <fei.zheng@amd.com>
Signed-off-by: coleramos425 <colramos@amd.com>


[ROCm/rocprofiler-compute commit: 224d627438]
 2024-01-24 16:30:04 -06:00
coleramos425 224d627438 Add options for --specs and --specs-correction 
Co-authored-by: fei.zheng <fei.zheng@amd.com>
Signed-off-by: coleramos425 <colramos@amd.com>
 2024-01-24 16:30:04 -06:00
colramos-amd 035c6ec7a3 Fix bug in profiling for Mi100 
Signed-off-by: colramos-amd <colramos@amd.com>


[ROCm/rocprofiler-compute commit: d4a649a926]
 2024-01-24 16:30:04 -06:00
colramos-amd d4a649a926 Fix bug in profiling for Mi100 
Signed-off-by: colramos-amd <colramos@amd.com>
 2024-01-24 16:30:04 -06:00
colramos-amd e8ec84a854 Separate aggregation of TCC and TCC2 counters 
Co-authored-by: fei.zheng <fei.zheng@amd.com>
Signed-off-by: colramos-amd <colramos@amd.com>


[ROCm/rocprofiler-compute commit: 4ffcaa1b4a]
 2024-01-24 16:30:04 -06:00
colramos-amd 4ffcaa1b4a Separate aggregation of TCC and TCC2 counters 
Co-authored-by: fei.zheng <fei.zheng@amd.com>
Signed-off-by: colramos-amd <colramos@amd.com>
 2024-01-24 16:30:04 -06:00
colramos-amd 3bc71d87e9 Optimizations to run_prof() utility 
Signed-off-by: colramos-amd <colramos@amd.com>


[ROCm/rocprofiler-compute commit: a1b5c252e2]
 2024-01-24 16:30:04 -06:00
colramos-amd a1b5c252e2 Optimizations to run_prof() utility 
Signed-off-by: colramos-amd <colramos@amd.com>
 2024-01-24 16:30:04 -06:00
colramos-amd 5a1281e375 Moving the join_prof func into parent class and adding output_headers specific to rocprof ver 
Signed-off-by: colramos-amd <colramos@amd.com>


[ROCm/rocprofiler-compute commit: 42dd2cbcac]
 2024-01-24 16:30:04 -06:00
colramos-amd 42dd2cbcac Moving the join_prof func into parent class and adding output_headers specific to rocprof ver 
Signed-off-by: colramos-amd <colramos@amd.com>
 2024-01-24 16:30:04 -06:00
colramos-amd 84748197bf Adding sbios, vbios, and partitioning info to specs. Also reorganizing fields. 
Co-authored-by: fei.zheng <fei.zheng@amd.com>
Signed-off-by: colramos-amd <colramos@amd.com>


[ROCm/rocprofiler-compute commit: 987f612489]
 2024-01-24 16:30:04 -06:00
colramos-amd 987f612489 Adding sbios, vbios, and partitioning info to specs. Also reorganizing fields. 
Co-authored-by: fei.zheng <fei.zheng@amd.com>
Signed-off-by: colramos-amd <colramos@amd.com>
 2024-01-24 16:30:04 -06:00
Galantsev, Dmitrii bf5b13ffb1 Merge amd-staging into amd-master 20240124 
Change-Id: I358fde8bed15c8b2a240a0be8cf5411e21238b08
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>


[ROCm/rocm_smi_lib commit: 9386d60522]
 2024-01-24 16:26:34 -06:00
Galantsev, Dmitrii 9386d60522 Merge amd-staging into amd-master 20240124 
Change-Id: I358fde8bed15c8b2a240a0be8cf5411e21238b08
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
 2024-01-24 16:26:34 -06:00
Kiriti Gowda d0ddd577d2 Update CMakeLists.txt (#197) 
[ROCm/rocdecode commit: f352cb7548]
 2024-01-24 11:57:29 -08:00
Kiriti Gowda f352cb7548 Update CMakeLists.txt (#197) 2024-01-24 11:57:29 -08:00
Deepak Mewar 9375b6f820 amdsmi README updated for esmi library usage 
Change-Id: I1406f0b0434e735b7d1cc1d931e7a2c92dfba728
 2024-01-24 14:30:26 -05:00
Deepak Mewar a8b48ff1e5 amdsmi README updated for esmi library usage 
Change-Id: I1406f0b0434e735b7d1cc1d931e7a2c92dfba728


[ROCm/amdsmi commit: 9375b6f820]
 2024-01-24 14:30:26 -05:00
Sam Wu dc564d8bd6 Documentation - Use custom rocm-docs-core footer, header, and stylesheets for doxysphinx (#191) 
[ROCm/rocdecode commit: 3c5cf5ecba]
 2024-01-24 10:11:14 -08:00
Sam Wu 3c5cf5ecba Documentation - Use custom rocm-docs-core footer, header, and stylesheets for doxysphinx (#191) 2024-01-24 10:11:14 -08:00
Maisam Arif c400a22d4d 24.2.0 Version update 
Signed-off-by: Maisam Arif <maisarif@amd.com>
Change-Id: Ied7c24d63ca38c2e5ea5eca6b411e0156f61a403
 2024-01-24 11:13:02 -06:00
Maisam Arif 7e831b1992 24.2.0 Version update 
Signed-off-by: Maisam Arif <maisarif@amd.com>
Change-Id: Ied7c24d63ca38c2e5ea5eca6b411e0156f61a403


[ROCm/amdsmi commit: c400a22d4d]
 2024-01-24 11:13:02 -06:00
Maisam Arif c48c989bbc 24.1.0 Version update 
Signed-off-by: Maisam Arif <maisarif@amd.com>
Change-Id: Ibfe92d199b10dc48ece85dfdeda1041f5ea98626
 2024-01-24 12:09:48 -05:00
Maisam Arif 9eef868334 24.1.0 Version update 
Signed-off-by: Maisam Arif <maisarif@amd.com>
Change-Id: Ibfe92d199b10dc48ece85dfdeda1041f5ea98626


[ROCm/amdsmi commit: c48c989bbc]
 2024-01-24 12:09:48 -05:00
Maisam Arif 5e25c0771b Fix subvendor_id error handling 
Change-Id: Ibb2e8e329233221e72247674b4f2fbaef51baa32
Signed-off-by: Maisam Arif <maisarif@amd.com>
 2024-01-24 10:59:14 -06:00
Maisam Arif d269c35312 Fix subvendor_id error handling 
Change-Id: Ibb2e8e329233221e72247674b4f2fbaef51baa32
Signed-off-by: Maisam Arif <maisarif@amd.com>


[ROCm/amdsmi commit: 5e25c0771b]
 2024-01-24 10:59:14 -06:00
Wenkai Du 17f70df058 Revert "msccl: build same number of kernels as in ROCm 5.7" (#1058) 
This reverts commit f960174d03be7e5174baa83b256526d388a38842.

[ROCm/rccl commit: 7987015a19]
 2024-01-24 08:43:50 -08:00
Wenkai Du 7987015a19 Revert "msccl: build same number of kernels as in ROCm 5.7" (#1058) 
This reverts commit f960174d03be7e5174baa83b256526d388a38842.
 2024-01-24 08:43:50 -08:00
Bill(Shuzhou) Liu c1e745f25c UMC ECC count return not supported 
The current code assume err_count sysfs only have 2 lines, which is
changed for umc_err_count by adding extra line for defer errors.
The code is changed to relax such check.

Change-Id: I1c469555a5d460d7bc4f4926245646c09c6a2056


[ROCm/rocm_smi_lib commit: 73c65b6bfe]
 2024-01-24 08:31:24 -06:00
Bill(Shuzhou) Liu 73c65b6bfe UMC ECC count return not supported 
The current code assume err_count sysfs only have 2 lines, which is
changed for umc_err_count by adding extra line for defer errors.
The code is changed to relax such check.

Change-Id: I1c469555a5d460d7bc4f4926245646c09c6a2056
 2024-01-24 08:31:24 -06:00
Maisam Arif 3f53b626f9 Merge amd-dev into amd-master 20240124 Part 2 
Signed-off-by: Maisam Arif <maisarif@amd.com>
Change-Id: Ied8b8a6ede28e78cf5b246fc969a753b41b6f104
 2024-01-24 07:53:44 -06:00
Maisam Arif 41481c66e1 Merge amd-dev into amd-master 20240124 Part 2 
Signed-off-by: Maisam Arif <maisarif@amd.com>
Change-Id: Ied8b8a6ede28e78cf5b246fc969a753b41b6f104


[ROCm/amdsmi commit: 3f53b626f9]
 2024-01-24 07:53:44 -06:00
Maisam Arif 94f41f2b70 Corrected AmdSmiCacheTypeNames interface class 
Signed-off-by: Maisam Arif <maisarif@amd.com>
Change-Id: Iec9c6097aec460b180a112be2d24293a40bde125
 2024-01-24 07:48:30 -06:00
Maisam Arif b6a3bb8109 Corrected AmdSmiCacheTypeNames interface class 
Signed-off-by: Maisam Arif <maisarif@amd.com>
Change-Id: Iec9c6097aec460b180a112be2d24293a40bde125


[ROCm/amdsmi commit: 94f41f2b70]
 2024-01-24 07:48:30 -06:00