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Автор SHA1 Сообщение Дата
Chauncey Hui d8404bfee9 SWDEV-2 - Change OpenCL version number from 3205 to 3206 2020-10-01 03:00:04 -04:00
Evgeny 6f19938892 SWDEV-251491 : gen_ostream_ops.py porting to python3
Change-Id: I7081b6ad21b038040267067bd73d8a44df46e4ff


[ROCm/roctracer commit: 9562675382]
2020-10-01 00:52:23 -05:00
Evgeny 9562675382 SWDEV-251491 : gen_ostream_ops.py porting to python3
Change-Id: I7081b6ad21b038040267067bd73d8a44df46e4ff
2020-10-01 00:52:23 -05:00
Evgeny 29191089cc SWDEV-254810 : JSON generator cleanup
Change-Id: Iacf782ee1e33443e9efb35b1adfcd2a43feda91d
2020-10-01 00:48:56 -05:00
Evgeny e6be2dd03a SWDEV-254810 : JSON generator cleanup
Change-Id: Iacf782ee1e33443e9efb35b1adfcd2a43feda91d


[ROCm/rocprofiler commit: 29191089cc]
2020-10-01 00:48:56 -05:00
Wenkai Du dbde26e681 Add Alltoallv RCCL kernel implementation (#269)
* Add alltoallv API and implementation

* Extend Rome P2P channel limit to multinode and alltoall kernels

* topo_expl: fix compilation and sync up with main

* gtest: use RCCL alltoallv API

* Code review changes

[ROCm/rccl commit: b871ea3c0c]
2020-09-30 16:25:36 -07:00
Wenkai Du b871ea3c0c Add Alltoallv RCCL kernel implementation (#269)
* Add alltoallv API and implementation

* Extend Rome P2P channel limit to multinode and alltoall kernels

* topo_expl: fix compilation and sync up with main

* gtest: use RCCL alltoallv API

* Code review changes
2020-09-30 16:25:36 -07:00
Vladislav Sytchenko 46c26cc6d8 Fix Windows build
Change-Id: Icdc723843541a5c13503670b5f972b78db0cccbf


[ROCm/clr commit: 1183455755]
2020-09-30 14:40:07 -04:00
Vladislav Sytchenko 1183455755 Fix Windows build
Change-Id: Icdc723843541a5c13503670b5f972b78db0cccbf
2020-09-30 14:40:07 -04:00
mshivama c0eb26b2e7 Add missing definitions for class static members
The static members __HIP_Coordinates::x, ::y and ::z must be defined
outside the class. Otherwise, linker throws `undefined reference error`
when these definitions are needed in the HIP application.

Change-Id: Iabc09744b478c22e4b13cf9824877ec9cfdd4f7a


[ROCm/clr commit: 9b6d26f8b2]
2020-09-30 03:38:24 -04:00
mshivama 9b6d26f8b2 Add missing definitions for class static members
The static members __HIP_Coordinates::x, ::y and ::z must be defined
outside the class. Otherwise, linker throws `undefined reference error`
when these definitions are needed in the HIP application.

Change-Id: Iabc09744b478c22e4b13cf9824877ec9cfdd4f7a
2020-09-30 03:38:24 -04:00
mshivama 75fda6da3d Add missing definitions for class static members
The static members __HIP_Coordinates::x, ::y and ::z must be defined
outside the class. Otherwise, linker throws `undefined reference error`
when these definitions are needed in the HIP application.

Change-Id: Iabc09744b478c22e4b13cf9824877ec9cfdd4f7a


[ROCm/hip commit: b8640f1f0d]
2020-09-30 03:38:24 -04:00
mshivama b8640f1f0d Add missing definitions for class static members
The static members __HIP_Coordinates::x, ::y and ::z must be defined
outside the class. Otherwise, linker throws `undefined reference error`
when these definitions are needed in the HIP application.

Change-Id: Iabc09744b478c22e4b13cf9824877ec9cfdd4f7a
2020-09-30 03:38:24 -04:00
Sarbojit Sarkar fc2cc1471c SWDEV-253247: add ulong and ulonglong version of__shfl*
Change-Id: I40ab6cfa12175f334e8392b71f567054d8256e2a


[ROCm/clr commit: deeb37412c]
2020-09-30 01:58:22 -04:00
Sarbojit Sarkar deeb37412c SWDEV-253247: add ulong and ulonglong version of__shfl*
Change-Id: I40ab6cfa12175f334e8392b71f567054d8256e2a
2020-09-30 01:58:22 -04:00
Sarbojit Sarkar fcba52f6f5 SWDEV-253247: add ulong and ulonglong version of__shfl*
Change-Id: I40ab6cfa12175f334e8392b71f567054d8256e2a


[ROCm/hip commit: bf20337fc1]
2020-09-30 01:58:22 -04:00
Sarbojit Sarkar bf20337fc1 SWDEV-253247: add ulong and ulonglong version of__shfl*
Change-Id: I40ab6cfa12175f334e8392b71f567054d8256e2a
2020-09-30 01:58:22 -04:00
mshivama 4bd3a9fb18 Layout the cooperative group related headers to target Nvidia
Change-Id: I530ffc72d6fae1e273b5322d508629221e11ea6f


[ROCm/clr commit: b35f5215b2]
2020-09-29 21:32:24 -04:00
mshivama b35f5215b2 Layout the cooperative group related headers to target Nvidia
Change-Id: I530ffc72d6fae1e273b5322d508629221e11ea6f
2020-09-29 21:32:24 -04:00
mshivama bd685759d2 Layout the cooperative group related headers to target Nvidia
Change-Id: I530ffc72d6fae1e273b5322d508629221e11ea6f


[ROCm/hip commit: 4b6d92798f]
2020-09-29 21:32:24 -04:00
mshivama 4b6d92798f Layout the cooperative group related headers to target Nvidia
Change-Id: I530ffc72d6fae1e273b5322d508629221e11ea6f
2020-09-29 21:32:24 -04:00
Sarbojit Sarkar 1d5784202c SWDEV-253654 : Added invalid parameter checks
Change-Id: I8a2ae1ee6898f111aac1c68663a653cca410daec


[ROCm/clr commit: d4fa2e8c80]
2020-09-29 13:20:27 -04:00
Sarbojit Sarkar d4fa2e8c80 SWDEV-253654 : Added invalid parameter checks
Change-Id: I8a2ae1ee6898f111aac1c68663a653cca410daec
2020-09-29 13:20:27 -04:00
Sarbojit Sarkar de746bc845 SWDEV-253654 : Added invalid parameter checks
Change-Id: I8a2ae1ee6898f111aac1c68663a653cca410daec


[ROCm/hip commit: 464e27829c]
2020-09-29 13:20:27 -04:00
Sarbojit Sarkar 464e27829c SWDEV-253654 : Added invalid parameter checks
Change-Id: I8a2ae1ee6898f111aac1c68663a653cca410daec
2020-09-29 13:20:27 -04:00
Julia Jiang 8976ef0471 SWDEV-247518-fix HPC multi gpu test performance drop
Change-Id: I2f07d9ba183cf88b3845d8d61607a8a0462d015f


[ROCm/clr commit: 3d59e050db]
2020-09-29 12:04:40 -04:00
Julia Jiang 3d59e050db SWDEV-247518-fix HPC multi gpu test performance drop
Change-Id: I2f07d9ba183cf88b3845d8d61607a8a0462d015f
2020-09-29 12:04:40 -04:00
Julia Jiang 50910964ea SWDEV-247518-fix HPC multi gpu test performance drop
Change-Id: I2f07d9ba183cf88b3845d8d61607a8a0462d015f


[ROCm/hip commit: 9f1a177dc7]
2020-09-29 12:04:40 -04:00
Julia Jiang 9f1a177dc7 SWDEV-247518-fix HPC multi gpu test performance drop
Change-Id: I2f07d9ba183cf88b3845d8d61607a8a0462d015f
2020-09-29 12:04:40 -04:00
Chris Freehill 2b41fb9fdc Add README for rocrtst
Change-Id: Icd43a243ccfc9caf5ade3cd0e7ffc00e251fc0a2
2020-09-28 20:27:53 -05:00
Chris Freehill 6e6cc27c73 Add README for rocrtst
Change-Id: Icd43a243ccfc9caf5ade3cd0e7ffc00e251fc0a2


[ROCm/ROCR-Runtime commit: 2b41fb9fdc]
2020-09-28 20:27:53 -05:00
Jay Cornwall 44f80d170d libhsakmt: Limit control stack size on gfx10
The queue control stack size cannot exceed 0x7000 on ASICs
gfx1010 through gfx1031. The lower limit is not achievable
with AQL so this should have no practical effect.

Fixes control stack size overflow on large ASICs.

Change-Id: Ib78cf6e4c5f096044bf8de24debe211689891caa
Signed-off-by: Jay Cornwall <jay.cornwall@amd.com>
2020-09-28 18:14:57 -05:00
Jay Cornwall 7821213760 libhsakmt: Limit control stack size on gfx10
The queue control stack size cannot exceed 0x7000 on ASICs
gfx1010 through gfx1031. The lower limit is not achievable
with AQL so this should have no practical effect.

Fixes control stack size overflow on large ASICs.

Change-Id: Ib78cf6e4c5f096044bf8de24debe211689891caa
Signed-off-by: Jay Cornwall <jay.cornwall@amd.com>


[ROCm/ROCR-Runtime commit: 44f80d170d]
2020-09-28 18:14:57 -05:00
Evgeny 8ba4e41e68 SWDEV-253997 : packaging fix: installing hsa_ostream_ops.h
Change-Id: Ib739cbb7538473afc9744e12d2bd568635e78616


[ROCm/roctracer commit: 1d975e5ba5]
2020-09-28 13:19:51 -04:00
Evgeny 1d975e5ba5 SWDEV-253997 : packaging fix: installing hsa_ostream_ops.h
Change-Id: Ib739cbb7538473afc9744e12d2bd568635e78616
2020-09-28 13:19:51 -04:00
Jatin Chaudhary 2a16ef5d04 Adding and populating available registers per cu value
Change-Id: Ide012038a9d74b20166ce1e69a9f2c0cbdce0d73


[ROCm/clr commit: d0f009a0ee]
2020-09-28 05:30:23 -04:00
Jatin Chaudhary d0f009a0ee Adding and populating available registers per cu value
Change-Id: Ide012038a9d74b20166ce1e69a9f2c0cbdce0d73
2020-09-28 05:30:23 -04:00
Chauncey Hui fcebc82e75 SWDEV-2 - Change OpenCL version number from 3204 to 3205
[ROCm/clr commit: b26a283118]
2020-09-26 03:00:04 -04:00
Chauncey Hui b26a283118 SWDEV-2 - Change OpenCL version number from 3204 to 3205 2020-09-26 03:00:04 -04:00
Sarbojit Sarkar 596fa95c9b SWDEV-252337: Fix for V100 compilation issue
Change-Id: Ib57ff3ac28f0a581f395f32181974e64eca6d858


[ROCm/clr commit: 7da8264b7c]
2020-09-25 21:55:22 -04:00
Sarbojit Sarkar 7da8264b7c SWDEV-252337: Fix for V100 compilation issue
Change-Id: Ib57ff3ac28f0a581f395f32181974e64eca6d858
2020-09-25 21:55:22 -04:00
Sarbojit Sarkar 52a06d5016 SWDEV-252337: Fix for V100 compilation issue
Change-Id: Ib57ff3ac28f0a581f395f32181974e64eca6d858


[ROCm/hip commit: 0be1f7843a]
2020-09-25 21:55:22 -04:00
Sarbojit Sarkar 0be1f7843a SWDEV-252337: Fix for V100 compilation issue
Change-Id: Ib57ff3ac28f0a581f395f32181974e64eca6d858
2020-09-25 21:55:22 -04:00
Sean Keely a3c4aaf95a Correct return type error in hsa_amd_signal_wait_any.
The error checking macro IS_OPEN returns an hsa_signal_t.
This conflicts with the return type of uint32_t.

Add an assert and rely on spurious return rule to return zero
when rocr is not initialized.

Change-Id: Ifc9bb75e22ecdd675273de59b31e5026a69c62e0
2020-09-25 21:33:23 -04:00
Sean Keely e78c1df5e3 Correct return type error in hsa_amd_signal_wait_any.
The error checking macro IS_OPEN returns an hsa_signal_t.
This conflicts with the return type of uint32_t.

Add an assert and rely on spurious return rule to return zero
when rocr is not initialized.

Change-Id: Ifc9bb75e22ecdd675273de59b31e5026a69c62e0


[ROCm/ROCR-Runtime commit: a3c4aaf95a]
2020-09-25 21:33:23 -04:00
nunnikri 256de55920 SWDEV-253325 : Chaning amdgpu-target to cuda-gpu-arch (#268)
[ROCm/rccl commit: aa985bfb7e]
2020-09-25 15:44:56 -06:00
nunnikri aa985bfb7e SWDEV-253325 : Chaning amdgpu-target to cuda-gpu-arch (#268) 2020-09-25 15:44:56 -06:00
Stanley Tsang 67a8d86d78 Updating inline asm to not require explicit L1 cache invalidation (#270)
[ROCm/rccl commit: acca2ae20a]
2020-09-25 13:46:26 -06:00
Stanley Tsang acca2ae20a Updating inline asm to not require explicit L1 cache invalidation (#270) 2020-09-25 13:46:26 -06:00
gilbertlee-amd 5ca117d7cd New TransferBench features (#273)
* Upgrading TransferBench to support pinned CPU memory, expanding functionality, cleaning up env vars

[ROCm/rccl commit: ee262819a7]
2020-09-25 12:20:48 -06:00