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Auteur SHA1 Message Date
Satyanvesh Dittakavi 04201d5db5 SWDEV-248293 - Fix elapsedTime 
Fixes the elapsed time for the scenarios where HIP API takes one of the start/stop events
and another one is recorded using hipEventRecord.


Change-Id: I51831b2651fc8e7207ff0e3fcc6dc7c1b4239fa8


[ROCm/clr commit: f80044bd6a]
 2020-09-02 03:22:47 -04:00
Satyanvesh Dittakavi f80044bd6a SWDEV-248293 - Fix elapsedTime 
Fixes the elapsed time for the scenarios where HIP API takes one of the start/stop events
and another one is recorded using hipEventRecord.


Change-Id: I51831b2651fc8e7207ff0e3fcc6dc7c1b4239fa8
 2020-09-02 03:22:47 -04:00
Satyanvesh Dittakavi 88c3a16a69 SWDEV-248293 - Fix elapsedTime 
Fixes the elapsed time for the scenarios where HIP API takes one of the start/stop events
and another one is recorded using hipEventRecord.


Change-Id: I51831b2651fc8e7207ff0e3fcc6dc7c1b4239fa8


[ROCm/hip commit: 08cf695e1f]
 2020-09-02 03:22:47 -04:00
Satyanvesh Dittakavi 08cf695e1f SWDEV-248293 - Fix elapsedTime 
Fixes the elapsed time for the scenarios where HIP API takes one of the start/stop events
and another one is recorded using hipEventRecord.


Change-Id: I51831b2651fc8e7207ff0e3fcc6dc7c1b4239fa8
 2020-09-02 03:22:47 -04:00
Chauncey Hui 98c442504a SWDEV-2 - Change OpenCL version number from 3191 to 3192 
[ROCm/clr commit: 59e45d5c85]
 2020-09-02 03:00:03 -04:00
Chauncey Hui 59e45d5c85 SWDEV-2 - Change OpenCL version number from 3191 to 3192 2020-09-02 03:00:03 -04:00
Sarbojit Sarkar a5c2a7ff84 Fix for HIP_VISIBLE_DEVICE [SWDEV-247751] 
Change-Id: Iff0ca6646f9d97b1ffa378c3cdc44159b6bf8ad0


[ROCm/clr commit: 8ac8384aea]
 2020-09-02 02:08:56 -04:00
Sarbojit Sarkar 8ac8384aea Fix for HIP_VISIBLE_DEVICE [SWDEV-247751] 
Change-Id: Iff0ca6646f9d97b1ffa378c3cdc44159b6bf8ad0
 2020-09-02 02:08:56 -04:00
agodavar 04f34e929a SWDEV-246142: Improve performance for sync with multiple streams 
Change-Id: Ifc625c4c1311ac235b08ea705a3df216d47b2c5e


[ROCm/clr commit: 9124285f18]
 2020-09-02 00:56:46 -04:00
agodavar 9124285f18 SWDEV-246142: Improve performance for sync with multiple streams 
Change-Id: Ifc625c4c1311ac235b08ea705a3df216d47b2c5e
 2020-09-02 00:56:46 -04:00
agodavar a6accd4db6 SWDEV-246142: Improve performance for sync with multiple streams 
Change-Id: Ifc625c4c1311ac235b08ea705a3df216d47b2c5e


[ROCm/hip commit: 76824a7f04]
 2020-09-02 00:56:46 -04:00
agodavar 76824a7f04 SWDEV-246142: Improve performance for sync with multiple streams 
Change-Id: Ifc625c4c1311ac235b08ea705a3df216d47b2c5e
 2020-09-02 00:56:46 -04:00
Oak Zeng 3d3b28b670 CWSR control stack size calculation for gfx10 
Gfx10 need 12bytes/wave control stack

Change-Id: I6c6f2819572e6b43aa3140d4dbe79d930e4c1c9c
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Signed-off-by: Jay Cornwall <Jay.Cornwall@amd.com>
 2020-09-01 21:34:00 -07:00
Oak Zeng a1aec2cc19 CWSR control stack size calculation for gfx10 
Gfx10 need 12bytes/wave control stack

Change-Id: I6c6f2819572e6b43aa3140d4dbe79d930e4c1c9c
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Signed-off-by: Jay Cornwall <Jay.Cornwall@amd.com>


[ROCm/ROCR-Runtime commit: 3d3b28b670]
 2020-09-01 21:34:00 -07:00
Laurent Morichetti 0f18c47edd Periodically wake up the thread in monitor::wait 
There is a small window where a thread can go to sleep in
Monitor::wait after releasing the lock but before another thread
notifies the monitor and updates the on-deck thread.

A simple approach to fix this problem is to wake-up the Monitor::wait
every 10 milliseconds and check if it is on-deck.

Change-Id: I4b9abda89d1fc653cdae2b4c84cdda01efde1cf2


[ROCm/clr commit: 5079410c94]
 2020-09-01 18:09:38 -04:00
Laurent Morichetti 5079410c94 Periodically wake up the thread in monitor::wait 
There is a small window where a thread can go to sleep in
Monitor::wait after releasing the lock but before another thread
notifies the monitor and updates the on-deck thread.

A simple approach to fix this problem is to wake-up the Monitor::wait
every 10 milliseconds and check if it is on-deck.

Change-Id: I4b9abda89d1fc653cdae2b4c84cdda01efde1cf2
 2020-09-01 18:09:38 -04:00
Laurent Morichetti d0b6c2b538 Improve queueLock and lastCmdLock 
Reduce the size of the queueLock and lastCmdLock critical sections
to improve lock contention performance. The smaller the critical
sections are the better.

lasCmdLock is still needed to guarantee that getLastEnqueueCommand_
can retain the command before it is swapped out and released.

Change-Id: Id35d4a77c035b2da0de4c15568b153d49e958bb7


[ROCm/clr commit: 080dcfe857]
 2020-09-01 18:09:31 -04:00
Laurent Morichetti 080dcfe857 Improve queueLock and lastCmdLock 
Reduce the size of the queueLock and lastCmdLock critical sections
to improve lock contention performance. The smaller the critical
sections are the better.

lasCmdLock is still needed to guarantee that getLastEnqueueCommand_
can retain the command before it is swapped out and released.

Change-Id: Id35d4a77c035b2da0de4c15568b153d49e958bb7
 2020-09-01 18:09:31 -04:00
Laurent Morichetti 5f5f1a3a84 Fix indentation with clang-format 
Change-Id: I7aeadef3c613d5efc31a98e666bfb819ae34bdf5


[ROCm/clr commit: c95c613edc]
 2020-09-01 18:09:19 -04:00
Laurent Morichetti c95c613edc Fix indentation with clang-format 
Change-Id: I7aeadef3c613d5efc31a98e666bfb819ae34bdf5
 2020-09-01 18:09:19 -04:00
Saleel Kudchadker 20845c2560 Revert "SWDEV-241977 [ROCm QA] Random Soft hang observed while running TF and Caffe2 benchmarks" 
This reverts commit c6649a8c7f.

Change-Id: Ib56493c92eca793f1dfb6f1cbefb32f0b4f65e89


[ROCm/clr commit: 1c24072d13]
 2020-09-01 18:09:10 -04:00
Saleel Kudchadker 1c24072d13 Revert "SWDEV-241977 [ROCm QA] Random Soft hang observed while running TF and Caffe2 benchmarks" 
This reverts commit ce038f3163.

Change-Id: Ib56493c92eca793f1dfb6f1cbefb32f0b4f65e89
 2020-09-01 18:09:10 -04:00
Evgeny Shcherbakov 8263eceef9 Merge "concurrent: enable/fix the related settings" into amd-staging 2020-09-01 17:43:08 -04:00
Evgeny Shcherbakov aed8c48279 Merge "concurrent: enable/fix the related settings" into amd-staging 
[ROCm/rocprofiler commit: 8263eceef9]
 2020-09-01 17:43:08 -04:00
Wenkai Du cfa1228504 Make data alignment requirements matching ISA manual 
From https://developer.amd.com/wp-content/resources/Vega_Shader_ISA.pdf

8.1.7. Alignment
For Dword or larger reads or writes, the two LSBs of the byte-address
are ignored, thus forcing Dword alignment.


[ROCm/rccl commit: 4751992231]
 2020-09-01 21:21:58 +00:00
Wenkai Du 4751992231 Make data alignment requirements matching ISA manual 
From https://developer.amd.com/wp-content/resources/Vega_Shader_ISA.pdf

8.1.7. Alignment
For Dword or larger reads or writes, the two LSBs of the byte-address
are ignored, thus forcing Dword alignment.
 2020-09-01 21:21:58 +00:00
Alex Xie e0cb881d91 SWDEV-249516 - [Lnx][Navi][rocm]conformance image read write tests data error 
Change-Id: Ie1c4fda953198b49ed66fea9da23e62c686d9cea


[ROCm/clr commit: 7e8f7b5927]
 2020-09-01 17:20:58 -04:00
Alex Xie 7e8f7b5927 SWDEV-249516 - [Lnx][Navi][rocm]conformance image read write tests data error 
Change-Id: Ie1c4fda953198b49ed66fea9da23e62c686d9cea
 2020-09-01 17:20:58 -04:00
Saleel Kudchadker e17f998c20 Fix hipPrintf* tests 
The test needs to check dup2 syscall status and not the
errno val

Change-Id: Ic88eb2047b839adbc9e12965b098d8960cd7e2b8


[ROCm/clr commit: 99f1830ed6]
 2020-09-01 15:00:49 -04:00
Saleel Kudchadker 99f1830ed6 Fix hipPrintf* tests 
The test needs to check dup2 syscall status and not the
errno val

Change-Id: Ic88eb2047b839adbc9e12965b098d8960cd7e2b8
 2020-09-01 15:00:49 -04:00
Saleel Kudchadker 7c60cf0a5b Fix hipPrintf* tests 
The test needs to check dup2 syscall status and not the
errno val

Change-Id: Ic88eb2047b839adbc9e12965b098d8960cd7e2b8


[ROCm/hip commit: 7720651f2d]
 2020-09-01 15:00:49 -04:00
Saleel Kudchadker 7720651f2d Fix hipPrintf* tests 
The test needs to check dup2 syscall status and not the
errno val

Change-Id: Ic88eb2047b839adbc9e12965b098d8960cd7e2b8
 2020-09-01 15:00:49 -04:00
Wenkai Du ead006c5d7 Add alltoallv test 
[ROCm/rccl-tests commit: 58dcd35af2]
 2020-09-01 18:55:25 +00:00
Wenkai Du 58dcd35af2 Add alltoallv test 2020-09-01 18:55:25 +00:00
Tao Sang d21b94e2b0 Replace private libelf with elfio 
Change-Id: I59ae33f7cc55e73f6519af14be91dd9863b03af3


[ROCm/clr commit: 2332174c8a]
 2020-09-01 10:29:11 -04:00
Tao Sang 2332174c8a Replace private libelf with elfio 
Change-Id: I59ae33f7cc55e73f6519af14be91dd9863b03af3
 2020-09-01 10:29:11 -04:00
Tao Sang f985a8d247 Replace private libelf with elfio 
Change-Id: I59ae33f7cc55e73f6519af14be91dd9863b03af3


[ROCm/hip commit: 4e1344de0f]
 2020-09-01 10:29:11 -04:00
Tao Sang 4e1344de0f Replace private libelf with elfio 
Change-Id: I59ae33f7cc55e73f6519af14be91dd9863b03af3
 2020-09-01 10:29:11 -04:00
Chauncey Hui 2f20f0b06d SWDEV-2 - Change OpenCL version number from 3190 to 3191 
[ROCm/clr commit: fb4904f6dc]
 2020-09-01 03:00:02 -04:00
Chauncey Hui fb4904f6dc SWDEV-2 - Change OpenCL version number from 3190 to 3191 2020-09-01 03:00:02 -04:00
Rahul Garg e633304e19 Revert "[dtest] Additional tests for Memcpy" 
This reverts commit 6443ff4197.

Reason for revert: All the PSDBs on the CI are failing with the below error and its been root caused to this commit:
......................................................................................... Passed 0.59 sec 99% tests passed, 1 tests
failed out of 211 Total Test time (real) = 287.02 sec The following tests FAILED: 139 - directed_tests/runtimeApi/memory/hipMemcpyNegativeMThrdMSize_Negative_tests.tst
(Child aborted) Errors while running CTest Restoring clocks to: auto

Change-Id: I4ea0e14ba5f92cd61677f4a3b9482fea00902310


[ROCm/clr commit: f2d9d83a7c]
 2020-09-01 00:48:20 -04:00
Rahul Garg f2d9d83a7c Revert "[dtest] Additional tests for Memcpy" 
This reverts commit becc687747.

Reason for revert: All the PSDBs on the CI are failing with the below error and its been root caused to this commit:
......................................................................................... Passed 0.59 sec 99% tests passed, 1 tests
failed out of 211 Total Test time (real) = 287.02 sec The following tests FAILED: 139 - directed_tests/runtimeApi/memory/hipMemcpyNegativeMThrdMSize_Negative_tests.tst
(Child aborted) Errors while running CTest Restoring clocks to: auto

Change-Id: I4ea0e14ba5f92cd61677f4a3b9482fea00902310
 2020-09-01 00:48:20 -04:00
Rahul Garg d0229930f9 Revert "[dtest] Additional tests for Memcpy" 
This reverts commit fc61d76630.

Reason for revert: All the PSDBs on the CI are failing with the below error and its been root caused to this commit:
......................................................................................... Passed 0.59 sec 99% tests passed, 1 tests
failed out of 211 Total Test time (real) = 287.02 sec The following tests FAILED: 139 - directed_tests/runtimeApi/memory/hipMemcpyNegativeMThrdMSize_Negative_tests.tst
(Child aborted) Errors while running CTest Restoring clocks to: auto

Change-Id: I4ea0e14ba5f92cd61677f4a3b9482fea00902310


[ROCm/hip commit: 280d300320]
 2020-09-01 00:48:20 -04:00
Rahul Garg 280d300320 Revert "[dtest] Additional tests for Memcpy" 
This reverts commit 858b7e027e.

Reason for revert: All the PSDBs on the CI are failing with the below error and its been root caused to this commit:
......................................................................................... Passed 0.59 sec 99% tests passed, 1 tests
failed out of 211 Total Test time (real) = 287.02 sec The following tests FAILED: 139 - directed_tests/runtimeApi/memory/hipMemcpyNegativeMThrdMSize_Negative_tests.tst
(Child aborted) Errors while running CTest Restoring clocks to: auto

Change-Id: I4ea0e14ba5f92cd61677f4a3b9482fea00902310
 2020-09-01 00:48:20 -04:00
Jatin Chaudhary a06d43114e Adding dim3 conversion operator to __hip_builtin_threadIdx_t 
Change-Id: Ib7f9e45872ec6d48c0e5b7fc93ccecaafaeac754


[ROCm/clr commit: 9d4bdd466a]
 2020-08-31 21:30:14 -04:00
Jatin Chaudhary 9d4bdd466a Adding dim3 conversion operator to __hip_builtin_threadIdx_t 
Change-Id: Ib7f9e45872ec6d48c0e5b7fc93ccecaafaeac754
 2020-08-31 21:30:14 -04:00
Jatin Chaudhary bb96f35660 Adding dim3 conversion operator to __hip_builtin_threadIdx_t 
Change-Id: Ib7f9e45872ec6d48c0e5b7fc93ccecaafaeac754


[ROCm/hip commit: fef8df6e2e]
 2020-08-31 21:30:14 -04:00
Jatin Chaudhary fef8df6e2e Adding dim3 conversion operator to __hip_builtin_threadIdx_t 
Change-Id: Ib7f9e45872ec6d48c0e5b7fc93ccecaafaeac754
 2020-08-31 21:30:14 -04:00
Wenkai Du 778ab61097 Fix incorrect threads split in sendrecv (#261) 
[ROCm/rccl commit: 4180e6409e]
 2020-08-31 17:33:22 -07:00
Wenkai Du 4180e6409e Fix incorrect threads split in sendrecv (#261) 2020-08-31 17:33:22 -07:00