Extend hsa_amd_vmem_address_reserve/hsa_amd_vmem_address_reserve_align
to support HSA_AMD_VMEM_ADDRESS_NO_REGISTER flag. This allocation can be
used to reserve virtual address ranges that can later be used by
hsa_amd_svm_attributes_set for SVM based memory allocations.
Extend hsa_amd_vmem_address_reserve/hsa_amd_vmem_address_reserve_align
to support HSA_AMD_VMEM_ADDRESS_NO_REGISTER flag. This allocation can be
used to reserve virtual address ranges that can later be used by
hsa_amd_svm_attributes_set for SVM based memory allocations.
[ROCm/ROCR-Runtime commit: b3c48cc68c]
* added progress printout for profiler
* added comments and fixed readability
* removed redundant newlines
* moved format_time helper function to utils
* removed tqdm and redundant time calc
[ROCm/rocprofiler-compute commit: 036866fc12]
* added progress printout for profiler
* added comments and fixed readability
* removed redundant newlines
* moved format_time helper function to utils
* removed tqdm and redundant time calc
Improvements for GB200 systems
* Optimize the network performance by alternating the direction of the
rings and the NIC to GPU assignment across communicators to limit
unnecessary sharing.
* Fix the detection of C2C links in case GPU Direct RDMA is disabled
between a GPU and a NIC.
* Fix PXN support on MNNVL systems, where NCCL would try (and fail) to
share regular host memory across multiple nodes.
* Fix P2C (PXN over C2C), which is now preferred over regular PXN. This
support is currently preliminary and is disabled by default; use
NCCL_PXN_C2C=1 to enable.
Further reduce the overheads of CUDA graph capturing, which increased in
NCCL 2.26.2 for large graphs.
Optimize the network performance on DGX B200 systems by adjusting the
bandwidths provided to the graph search algorithm.
Enable fp8 reductions in symmetric kernels on Blackwell with CUDA 12.8.
Restore the plugin name handling logic to make it possible to specify a
path to the plugin (Issue #1732).
Restore the ability to change NCCL_COLLNET_ENABLE during execution
(Issue #1741).
Add an example tuner plugin with CSV-based overrides.
Remove an x86 dependency from the example profiler.
[ROCm/rccl commit: 3ea7eedf3b]
Improvements for GB200 systems
* Optimize the network performance by alternating the direction of the
rings and the NIC to GPU assignment across communicators to limit
unnecessary sharing.
* Fix the detection of C2C links in case GPU Direct RDMA is disabled
between a GPU and a NIC.
* Fix PXN support on MNNVL systems, where NCCL would try (and fail) to
share regular host memory across multiple nodes.
* Fix P2C (PXN over C2C), which is now preferred over regular PXN. This
support is currently preliminary and is disabled by default; use
NCCL_PXN_C2C=1 to enable.
Further reduce the overheads of CUDA graph capturing, which increased in
NCCL 2.26.2 for large graphs.
Optimize the network performance on DGX B200 systems by adjusting the
bandwidths provided to the graph search algorithm.
Enable fp8 reductions in symmetric kernels on Blackwell with CUDA 12.8.
Restore the plugin name handling logic to make it possible to specify a
path to the plugin (Issue #1732).
Restore the ability to change NCCL_COLLNET_ENABLE during execution
(Issue #1741).
Add an example tuner plugin with CSV-based overrides.
Remove an x86 dependency from the example profiler.
* enable roofline plot in cli.
* Add roofline to analysis config.
* Unify global variables.
* Disable roofline for baseline comparison and gfx908.
* Add check for roofline.csv
"/usr/bin/env python3" is getting converted to "/usr/libexec/platform-python" in RHEL8. Undefining __brp_mangle_shebangs will prevent the same
[ROCm/rocm-core commit: 0d7160da9a]
* Rework cmakery:
* detect rocm/hip/rocshmem better, make sure that ROCM_PATH and
ROCM_ROOT don't conflict and are taken by default
* add /opt/rocm as a fallback when nothing else found
* obtain hipcc in a sanitized way (ensure we use the same logic we
use to later find_package hip)
* factorize redundancies
* export GPU_TARGETS as part of the cmake target for librocshmem,
this helps with a clean error when an application tries to link
with the wrong offload-target flag (rather than a cryptic link error)
* phased out ROCSHMEM_HOME, in favor of rocshmem_ROOT (the cmake
blessed way)
* Remove references to ROCSHMEM_HOME, we prefer ROCSHMEM_ROOT
* Pick CMAKE_PREFIX_PATH method for consistent finding hip/rocm
* Undo this pr using LANGUAGE HIP, maybe later
* Use only rocmcmakebuildtools as recommended from 6.4 onward
[ROCm/rocshmem commit: ee5363be7a]
* Rework cmakery:
* detect rocm/hip/rocshmem better, make sure that ROCM_PATH and
ROCM_ROOT don't conflict and are taken by default
* add /opt/rocm as a fallback when nothing else found
* obtain hipcc in a sanitized way (ensure we use the same logic we
use to later find_package hip)
* factorize redundancies
* export GPU_TARGETS as part of the cmake target for librocshmem,
this helps with a clean error when an application tries to link
with the wrong offload-target flag (rather than a cryptic link error)
* phased out ROCSHMEM_HOME, in favor of rocshmem_ROOT (the cmake
blessed way)
* Remove references to ROCSHMEM_HOME, we prefer ROCSHMEM_ROOT
* Pick CMAKE_PREFIX_PATH method for consistent finding hip/rocm
* Undo this pr using LANGUAGE HIP, maybe later
* Use only rocmcmakebuildtools as recommended from 6.4 onward
* Refactor `Barrier_all` and `Sync_all` to use default context
- Removed context-specific implementations of barrier_all and sync_all
- Added barrier_all and sync_all to the default context implementation
- Updated functional tests to use the default context for barrier_all and sync_all
* Update `Barrier_all` and `Sync_all` API usage in documentation
* Update `CHANGELOG`
---------
Co-authored-by: Yiltan <ytemucin@amd.com>
[ROCm/rocshmem commit: bf48bcabf2]
* Refactor `Barrier_all` and `Sync_all` to use default context
- Removed context-specific implementations of barrier_all and sync_all
- Added barrier_all and sync_all to the default context implementation
- Updated functional tests to use the default context for barrier_all and sync_all
* Update `Barrier_all` and `Sync_all` API usage in documentation
* Update `CHANGELOG`
---------
Co-authored-by: Yiltan <ytemucin@amd.com>