SWDEV-245290 / SWDEV-246220 [HIPPerf] Port OCLPerfDevMemWriteSpeed/OCLPerfDevMemReadSpeed into hip performance subtests
Change-Id: I5dc323c75cebbc17596dcb4ed9492e18c5246868
[ROCm/clr commit: b98727505d]
hipcc extracts bundles from static libraries and pass them to clang. It should
not escape spaces between objects extracted from library.
Fixes: SWDEV-246544
Change-Id: Iad3902f28a43a3986917ee37a49f10382c329940
[ROCm/clr commit: c1a498c219]
Submit explicit profile marker for hipEventRecord to record
timestamps. Enable explicit signal profiling if the API specifies
start and stop events.
Toggle this with env var HIP_FORCE_QUEUE_PROFILING=0
Change-Id: Iae449a63ec3ebf6c2880e65d7b1dd1031a29018f
[ROCm/clr commit: dec95e58e3]
Recently there were few OOM(out of Memory) issues poped. Adding trace will help know genuine OOM issue.
Change-Id: Ie2a56bba95cead24caf1af5c807e73c383c2f5d9
[ROCm/clr commit: bc76760452]
The current implementation creates default reference in the stack and assigns it to class member cuMasks_, so whenever the content of the stack changes, cuMask_ would change.
Change-Id: Iefab63c335d504b83c4ae90bd34ae76c6afb8f3c
[ROCm/clr commit: 8ef5da00c7]
Optimizaiton to remove extra syncs uncovered a bug with the cache
coherency layer, there runtime could lose the track of mem address
if coherency layer performed a sync.
Change-Id: I25647cfa4a4be9cdbd8577ff076a740bbdac79c8
[ROCm/clr commit: 91a25df04f]
rocm-utils is a meta-pacakge that pull in lot more pacakges than
what is required for hip.
Correct dependency to set as of today will be rocminfo.
Change-Id: I065ca74b4520e0c9ce183d82d6026554ff43e1f0
[ROCm/clr commit: b0438e6e99]
If the queue device doesn't match the device on any memory object, use the queue device from the memory object.
Change-Id: I5fdcf00494f8391574f4443332c01788b8da44ef
[ROCm/clr commit: e430506f70]
SWDEV-245906
All asics will still be supported for developer builds.
Change-Id: I0eac2246162d133fe63449c200d996fe05bd51bd
[ROCm/clr commit: 24c1c48db7]
SWDEV-244798
If {src/dst} ptr is marked as hipMemoryTypeHost, check if the memory was
prepinned. If it was, upgrade the copy type to hipMemoryTypeDevice to
avoid extra pinning.
Change-Id: Id287ef5b14ae67dfbcf80c4caa1b08a311191948
[ROCm/clr commit: fe6b645f3b]
When HIP_ENABLE_DEFERRED_LOADING=0, many global variables will be
referenced but they are not initialized in that early time. The patch
will use constexpr to initialze global constant varables in compile
time.
Change-Id: I9837c42e6bab38a894ece4e0f34b64f81b38fef0
[ROCm/clr commit: f7cc49c0b2]
When HIP_ENABLE_DEFERRED_LOADING=0, many global variables will be
referenced but they are not initialized in that early time. The patch
will use constexpr to initialze global constant varables in compile
time.
Change-Id: I9d538b7abc6a0ce700ec3332b97fc144db5fc1ef
[ROCm/clr commit: fdef6f722f]
COMGR_DYN_DLL is used by rocclr to load COMGR as dynamic library.
Need to remove this flag while linking COMGR as static lib by
ROCclr.
Default option is set to link COMGR as dynamic library
Change-Id: I5631a8c1d896bd4d7e5ecf5ef5fa4f631cd2244d
[ROCm/clr commit: 00223c5697]
HIP or any ROCm component above HIP may not be calling
hsa-runtime directly. OpenCl and HIP are the two components
calling ROCclr and to bring in the transitive dependency of
thunk,ROCR,amd_comgr it is better to have the dependency
chain set correctly in the ROCclr cmake target. With this
change OpenCl or HIP should not be setting ROCR dependency
directly.
This helps to link OpenCl(libamdocl.so) link statically with
comgr,hsa,thunk.
Change-Id: I0d538b7abc6a0ce700ec3332b97fc144db5fc5ff
[ROCm/clr commit: 6b8ae3dd77]