Wykres commitów

2445 Commity

Autor SHA1 Wiadomość Data
Sean Keely 505d722b7d Fix Api table copy operation and tools version checking.
Change-Id: Ia76d16f3ea6d0abb931813f90bc3bc2119da5999
2017-02-07 14:26:20 -05:00
Felix Kuehling 74ebfca9f0 Free BOs before munmapping
This avoids unnecessary evictions and failed restores due to the
munmap of userptr BOs that are just about to be freed.

Change-Id: Icf2f0b73991455556a201c54c05ea7e20af80f47
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
2017-02-07 10:45:37 -05:00
Sean Keely bc43f97964 Use fixed size type for queue type arguments.
Change-Id: I81b605c9cc9b18bcef043a4f0292212241ce5987
2017-02-07 01:22:30 -05:00
ozeng cb0f851560 libkmt: Misc fixes in thunk
1. Translate thunk queue priority to kfd priority
2. Initialize event SyncVar
3. Added HSAint32 data type


Change-Id: I7decc1be7cbe9c84cb670d9a7c99050b62ba98f3
2017-02-06 17:19:40 -05:00
Ramesh Errabolu 74e3a49b20 Refactor Thread Trace Service as an independent library
Change-Id: Ia7579bc16626f3e21c8df50f8a35cb4b82f6bda9
2017-02-06 17:04:07 -05:00
Jay Cornwall 28f51d5808 Fix Gfx9 write pointer setup
Should point directly to amd_queue_t.write_dispatch_id. Only noticeable
with HWS enabled which is not yet stable.

Change-Id: I169906d45225379a3ca2729ff04d298fdbb9a9fb
2017-02-06 14:06:12 -05:00
Amber Lin 9dadac6dc9 Add IOMMU to performance counter table
Add IOMMUv2 to blocks returned by hsaKmtPmcGetCounterProperties(). IOMMU
information is read from sysfs.

Change-Id: I3a1c6f902f947913570a78700fc0ffc444e1dd72
Signed-off-by: Amber Lin <Amber.Lin@amd.com>
2017-02-03 14:35:27 -05:00
Ramesh Errabolu 7755bd5487 Refactor Device Id to Asic Type Mapping Service
Change-Id: I8969b41f7c4de9fdeee5131e2049053a486f64fb
2017-02-03 14:22:32 -05:00
Amber Lin d4dbf562a9 Replace spaces with tabs
Thunk follows Linux kernel coding convention to use tabs instead of
spaces.

Change-Id: I4eddcfa9a0513f16c869d9cc63f9f1dae0c39f83
Signed-off-by: Amber Lin <Amber.Lin@amd.com>
2017-02-03 10:13:24 -05:00
Felix Kuehling a90abcb317 Allocate paged system memory as userptr
Change-Id: I0864e678681788df37eccd9d7ebc70086e1f93bf
2017-02-02 10:32:53 -05:00
Amber Lin 72b842a6dc Sync up gfx803 DIDs with KFD
Add gfx803 10/11 device IDs that were recently added to KFD.

Change-Id: Id40b117ae47bacedefa6e333fdfdf58dea92cd2d
Signed-off-by: Amber Lin <Amber.Lin@amd.com>
2017-02-01 12:05:24 -05:00
Jay Cornwall 9e575ea96a Add support for ARM
- Build system fixes
- No user-mode high-precision timer by default, use clock_gettime
- Use C11 aligned_alloc pending C++17 std::aligned_alloc

Change-Id: I268365bdfd11d1e817a89584b9e086ee5b86e1dc
2017-01-31 16:43:49 -08:00
Jay Cornwall 7e0a5f9c00 Add support for gfx900
- Route AQL doorbell directly to HW doorbell
- Reuse precompiled Gfx8 shaders on Gfx9 (ISA is compatible)
- Add a warning for unimplemented code cache invalidation

Change-Id: I92096584a1404e35779c96ae6bdc3e0e7fd04721
2017-01-30 16:36:28 -06:00
Sean Keely 796d31d94d Remove old names from API table interfaces.
Change-Id: I41ca38b596e1dac85e871f583e3ffe7078b790e7
2017-01-27 17:45:26 -06:00
Christophe Paquot 9ae1e15750 Adding the new APIs to the .def files and fixed a couple of things
Change-Id: I247a60b8cdbd4acfed72fb6d78ac7faf69d8a556
2017-01-27 16:51:50 -05:00
Jay Cornwall 1cd46afe6d Implement SDMA path for Gfx9
Gfx9 requires monotonic write pointer and doorbell.
Cound fields are 1-based compared with 0-based pre-Gfx9.

- Restructure implementation to use monotonic ring indices
- Remove redundant submission size checks (handled by AcquireWriteAddress)
- Unify copy/fill per-command limit (documentation is unclear)

Change-Id: I57c1675221d2e63aa319fee700d9951671e1bd65
2017-01-26 13:11:21 -05:00
Christophe Paquot a324f21a46 Add new 1.1 image APIs
Note: Implementation same as 1.0 APIs for now.
      The followup change will have the complete implementation.

Change-Id: Ife633f74ff27eee0bb9b0c46952cf5233b0114e8
2017-01-20 19:37:03 -05:00
Ramesh Errabolu ff1d739660 Add Gfx9 asic header files
Change-Id: I04fe402ab44170dba582099670a8222c5c366e50
2017-01-19 19:23:14 -06:00
Ramesh Errabolu 8ab28d1a51 Add agent properties for Tools
Change-Id: I7bc49d35dc559f9c9058aae591b88c5ecc4b3ce5
2017-01-16 13:50:18 -06:00
Ramesh Errabolu f0263d8198 Removing Old Commandwriter used by Profiler and Debugger
Change-Id: I77d2172eef1724d1d4aed6d8e7a9df6cdbeb0648
2017-01-13 11:51:21 -05:00
Christophe Paquot 31d379c821 Add image 1.1 API changes to current code base
Initial work to import the latest (1.1) hsa_ext_image extension.

Change-Id: I51d70ef26f97250c884b3def2088be0d7eb04eb3
2017-01-12 14:49:54 -08:00
Harish Kasiviswanathan f1f62d863c Add fork support
If fork() is called, clear all duplicated data that is invalid in the
child process.

Change-Id: I4e27198060db593c630c6337b7071dfbd0d80b83
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
2017-01-12 14:38:30 -05:00
Kent Russell 5162a76616 Revert " Add image 1.1 API changes to current code base"
Currently HSA HW Profiler is failing to build due to this patch

This reverts commit e0ce8855dd.

Change-Id: Iabb2b958f33ba614a24b61bb370905b3b7362708
2017-01-12 06:43:54 -05:00
Christophe Paquot e0ce8855dd Add image 1.1 API changes to current code base
Initial work to import the latest (1.1) hsa_ext_image extension.

Change-Id: I4d55adb09ba4d4dbd43d47a4bc54077d4bc531d2
2017-01-11 17:31:37 -05:00
Felix Kuehling 4181b408fc Allocate CWSR buffer in system memory
CWSR buffers can be large on dGPUs (~21MB on gfx803). Allocating them
in VRAM limits the number of queues that can be created unnecessarily.

Also make freeing of per-queue buffers symmetric with allocation. All
buffers are now allocated with allocate_exec_aligned_memory on dGPUs
and APUs, so use free_exec_aligned_memory to free them.

Change-Id: I45e8cb1801857d0268750202cdd422426611e457
2017-01-04 16:07:56 -05:00
Sean Keely 0e17cc2887 Allow reducing max occupancy (max scratch waves) when applications request large amounts of scratch.
Also emit error messages to stderr if no async queue error callback was registered and queue fault messages are enabled (on by default).
Queue fault messages are controlled with env key HSA_ENABLE_QUEUE_FAULT_MESSAGE.

Change-Id: I496487b8d048b83aa95b9784e92928211f167b17
2016-12-20 16:52:59 -06:00
James Edwards 433a3bcde8 Readme and comment updates to ROCm 1.4
Change-Id: I2864a9c475b9ceb2fa08bfc35999c7e0e043b26d
2016-12-16 11:43:36 -06:00
Chris Freehill 160f8c5880 HSA Enabled IPC support
Uncommented HSA IPC code.
Changed hsa_amd_ipc_memory_t to be 8 uint32_t's instead of 9 to
match spec

Change-Id: Id1523125e9b876a23c3743df1be29c98b47f6725
2016-12-15 19:16:29 -05:00
Konstantin Zhuravlyov 08aded148a Revert "Bring loader in sync with stg/sc"
This reverts commit c798c60343.

Change-Id: If99e8cc9e2afb525f690e49eb6538d8e950a5615
2016-12-14 15:14:36 -05:00
Konstantin Zhuravlyov c798c60343 Bring loader in sync with stg/sc
Change-Id: I684522c442de0872007a7e4da8919067fc7b42b3
2016-12-13 16:30:25 -05:00
James Edwards 25ed746314 Make copyright and README changes for ROCm
Change-Id: Ic9717fcbc57d4552dddf8374b34fc7c34e44268a
2016-12-06 16:11:00 -06:00
Harish Kasiviswanathan 559e31d6ff Add API entrypoints for IPC functionality
Implement three new APIs for IPC buffer sharing:
	-hsaKmtShareMemory()
	-hsaKmtRegisterSharedHandle()
	-hsaKmtRegisterSharedHandleToNodes()

Add new ioclts necessary for the above APIs.

Change-Id: Ia2b4d0dc91ec64bff959395d11c0536467404792
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
2016-11-28 16:19:22 -05:00
Ramesh Errabolu 935c1b0ba9 Per review comments
Change-Id: I44585a6dcf3c4f0ce10f0e895270c113790e0652
2016-11-28 12:41:32 -06:00
Harish Kasiviswanathan 4838f6e740 kfd ioctl. Remove unused definitions
Sync the file with Kernel header file

Change-Id: I52d52a38fb38bd4b37d8210ce79775b88c8a985d
2016-11-22 09:44:22 -05:00
Ramesh Errabolu eb2efb83d1 Initial set of changes for ThreadTrace
Change-Id: I07ce31f9b4f508cef0fc9ca6dadcf26b6c90361e
2016-11-21 23:40:56 -06:00
Konstantin Zhuravlyov 4b86843409 Remove load_legacy parameter + change prefix for some loaded code object queries back to AMD
Change-Id: I74e905abd77dab3a7a00b5ced94cd9b5130365c5
2016-11-20 13:46:17 -05:00
Amber Lin 2a50ebba98 Allow a memory to be registered multiple times
A memory region is allowed to be registered multiple times when the memory
is specified by a user pointer. If it's registered with the same user
pointer but with different sizes, it's treated as different instances and
multiple VM objects are created with different GPU address.


Change-Id: I49627111bb5db36d18f1133b252fb62a611f06a4
2016-11-18 17:46:12 -05:00
Yong Zhao a1f417715b Making the code more robust by checking the NULL pointer
Change-Id: I36b9f73eadd7547c71fe3641ac131c7408b14816
Signed-off-by: Yong Zhao <yong.zhao@amd.com>
2016-11-16 11:35:26 -05:00
Sean Keely 8081758a55 Add InterProcess memory sharing support.
Support is disabled pending KFD / Thunk readiness.

Change-Id: I55def748e3d56cbfcfa6e24983a0ab78567aa81d
2016-11-15 18:58:29 -06:00
Sean Keely 9dd76dbeda Add pointer info support.
Change-Id: I3edcc0bfddbf12465065c9bc3b6565288faff1b8
2016-11-11 18:40:16 -06:00
Sean Keely e01c43578c Restrict stack usage in interop map to a more reasonable level.
Change-Id: I663f262a391d1e7f8a6fc3028ea9acbe37d8bcf0
2016-11-10 16:55:55 -06:00
Sean Keely c54c63fd56 Set the default value of userdata in pointer info to NULL.
Change-Id: Ie0d94b921bbce880d9548d5a014a2d7c33062f7e
2016-11-09 21:15:07 -06:00
Konstantin Zhuravlyov 54245e064c Allocate only one segment for code object v2+
Change-Id: I7cd03b5c205d3ea5735f8f29820867ca90ac081b
2016-11-03 09:51:11 -04:00
Andres Rodriguez 0de39b6724 Fix hsaKmtOpen incorrectly doing nothing in some fork scenarios
Currently, if a process' parent called hsaKmtOpen, the child will be
unable to open a connection to KFD, since kfd_open_count will be > 0.

When forking, the refcount should be reset, in order to allow the child
to re-open /dev/kfd.

Change-Id: Ia4b78f6bacc4f82e8ac724e5f488a3eff5084007
2016-11-01 15:54:17 -04:00
Chris Freehill 30f1ec2691 Added support for agent attribute HSA_AMD_AGENT_INFO_MAX_WAVES_PER_CU
Change-Id: I2b90e7165384c4dce928a620a1782395267b35b0
2016-10-28 11:24:21 -04:00
Jay Cornwall c30c25bd30 Fix miscellaneous warnings flagged by Clang
Change-Id: I85a45cb3b44e4379b31bcc56af061fd1571f2af5
2016-10-26 19:26:16 -05:00
Jay Cornwall d5b4078072 Insert explicit memory fence before submitting doorbell
Ensure that the write index and ring buffer contents are visible
to the HW before sending the doorbell. The latter is a write-combined
MMIO store and must be ordered with prior cacehable non-MMIO stores.

Also be more explicit about memory semantics for doorbell stores.

Change-Id: Ie4d96a7ee2a507237a8dbe7705fdf234d62ce9ba
2016-10-17 10:01:47 -04:00
Jay Cornwall c83846cd45 Fix AQL packet lookup in dynamic scratch event handler
Read index was not wrapped correctly.

Change-Id: I25c901b61e4760990871e22468ffd0391abef244
2016-10-17 10:01:14 -04:00
James Edwards d66af9718e Fix hsa-runtime-tools library dependencies.
Change-Id: I649ebde06ab5c4b1892968c22e44c2bd5f53e49b
2016-10-15 14:35:44 -05:00
James Edwards 4b6feb8498 Fix library namespace to ROCR_1.
Change-Id: Ie341203bad8e17673be86529bfed3c4fa98e9343
2016-10-13 16:26:46 -05:00