Commit Graph

667 Commits

Author SHA1 Message Date
Tao Sang 0efc782e69 SWDEV-347733 - Remove luxmark workaround for gfx11
Make gfx11 always use LC by default.
Fix switch order of Navi3x.
Change-Id: I5774563edf4d1aed29a4e92723630adbfb75c48c


[ROCm/clr commit: 8c582a02ef]
2022-12-05 18:38:08 -05:00
Sourabh Betigeri 7aa958a8f7 SWDEV-305894 - Cooperative groups grid and multi grid sync support for gfx940+
Change-Id: I35d72f1cb50c3a96eee56a612b72d641852b145f


[ROCm/clr commit: 5d7f3f9f3c]
2022-12-05 16:30:30 -05:00
Saleel Kudchadker f14b550e87 SWDEV-371123 - Refactor dispatchBarrierValuePacket
Change-Id: I846bd3f60dd8db125e2ca5475e9d25fdd567922b


[ROCm/clr commit: 10ecf8f159]
2022-12-02 12:22:31 -05:00
Jason Tang 5cc5cf4f11 SWDEV-1 - Fix a build error.
Change-Id: I5f14cdca04ee9867f0ae63fff197a0f21ee5f1d2


[ROCm/clr commit: 56fe793134]
2022-12-01 10:31:34 -05:00
Jason Tang 310f43e9e3 SWDEV-1 - Fix a build warning.
Change-Id: I085fcc68ef3aaebf85515ea45fca99d7ec845721


[ROCm/clr commit: c825d06454]
2022-11-30 11:07:15 -05:00
Ioannis Assiouras 941dc51bfd SWDEV-369547 - Ensure that ipc_mem_detach is not called for non-ipcShared MemObj.
Change-Id: Ia73b60b9f08d593301879e0f72c395edbc215112


[ROCm/clr commit: b445717f72]
2022-11-30 02:16:13 -05:00
kjayapra-amd 1fea133877 SWDEV-358915 - Wait for 10 micro secs, if the next engine is SDMA.
Change-Id: Ib3ed91510e62090f47d4f55be8de635caaee083d


[ROCm/clr commit: 61b6a94627]
2022-11-28 12:14:16 -05:00
Anusha GodavarthySurya a93695d9f0 SWDEV-354074 - cache hsa queue and delete when device is destroyed
Change-Id: I26365521d785f0bc612e32bdcdb6caacb3af9a11


[ROCm/clr commit: 446a3fc688]
2022-11-23 07:17:45 +00:00
Alex Xie 1ac90df635 SWDEV-363271 - Add some performance counter logs
Change-Id: I368ba4afe47357eb6051b2a06f762b8050e5a560


[ROCm/clr commit: 9e00c674c8]
2022-11-19 16:27:14 -05:00
German e7d9a3f450 SWDEV-368308 - Remove HW debug extension
Change-Id: If0c68023c09f0dac9111d52ecc0ad63719aa4e70


[ROCm/clr commit: e5a36ab1ad]
2022-11-18 10:29:44 -05:00
German 4b6a6ba8e8 SWDEV-363074 - Adjust staging copy limits in Windows
Pinned copy can cause big performance drops, because slow pinning under Windows.
Use up to 128MB for staging transfers. Change staging buffer size to 4MB.
Linux path should still have the old defaults.

Change-Id: I954edceb3ec89e8e670be116aa2d0a9564c8b11c


[ROCm/clr commit: 79d12df147]
2022-11-17 14:48:16 -05:00
German cb4aa60a37 SWDEV-328670 - Enable ROCr interop
Change-Id: I932afa2a0e75b1f1771c4be1e984b32966636afb


[ROCm/clr commit: b40823ccc1]
2022-11-17 09:40:34 -05:00
Juan Manuel MARTINEZ CAAMAÑO ed84e3c9fa SWDEV-287018 - Generate tempraries for _optimized.bc and _linked.bc if -save-temp-all is passed.
Change-Id: Ie8a7af66f0764f0a94948d45d7deed786f799c96


[ROCm/clr commit: 9b8005d758]
2022-11-15 07:49:07 -05:00
Jason Tang 4eb6a108a3 SWDEV-1 - Add LOG_ERROR output for Pal::CreatePlatform failure
Change-Id: Id5c3fdcd8f822bfa67ae570c09ede7ddc8a936ef


[ROCm/clr commit: 2c09557d60]
2022-11-10 09:30:10 -05:00
Maneesh Gupta f04740b919 SWDEV-299940 - Query global memory available on device with HSA attribute HSA_AMD_AGENT_INFO_MEMORY_AVAIL
This reverts commit 06593a072f.

Reason for revert: ROCr query should now be usable in upcoming release.

Change-Id: I2207761ca6af5d585d090bae1af09eb9a8e9bad6


[ROCm/clr commit: a52f5bda8f]
2022-11-09 10:48:47 -05:00
Julia Jiang a83594277d SWDEV-360748 - Update return value for hipExtGetLinkTypeAndHopCount_Positive_Basic test on Windows
Change-Id: I0eb984da6e96c2409e1b1bbda61ae694c8bebe94


[ROCm/clr commit: 9d616ad0f4]
2022-11-07 10:00:32 -05:00
German 50e08f9511 SWDEV-286150 - Switch PAL to 775 version
Change-Id: I8e64cbe0fea273d4bd6f7d3ebd66feb628fac6b9


[ROCm/clr commit: c1b22840fa]
2022-11-07 09:54:22 -05:00
Saleel Kudchadker b157c8eeea SWDEV-301667 - Improve logging
Change-Id: Ifa6da876b85cb503967cf09aac6d477b10db8e63


[ROCm/clr commit: feca11d5e3]
2022-11-04 18:23:18 -04:00
Saleel Kudchadker 994c9384e7 SWDEV-364052 - Print free memory on queue callback
Change-Id: I7d15b6f6277326d5f3e9b784a3443f18ec6ba58a


[ROCm/clr commit: 3e465c5ff8]
2022-11-04 13:19:33 -04:00
Todd tiantuo Li 32b0929ce3 SWDEV-302996 - add gfx1103 Phoenix support - OCL runtime
Change-Id: Ib6b7efa085b734bda6b5b50c720fe9d93e6dbf95


[ROCm/clr commit: 246429bd68]
2022-11-04 12:07:22 -04:00
kjayapra-amd 9f4ef7089f SWDEV-329423 - Enable NV3x target ID related changes on mainline.
Change-Id: I54fafb371976aaa16a452ec65b0c340c5682c264


[ROCm/clr commit: ea0ce45ad3]
2022-11-03 21:11:24 +00:00
German bc14b745e8 SWDEV-365121 - Use CP DMA for tiny transfers
Sync between compute and SDMA engines can be very expensive under Windows.
Use CP DMA for tiny transfers (< 1KiB) to avoid syncs and improve performance.

Change-Id: I9db39a2199f7b9e337ed08fd36d9cbc150502f1f


[ROCm/clr commit: 473621c008]
2022-11-03 10:04:53 -04:00
Tao Sang 441effd3d7 SWDEV-363140 - Support performance counter on gfx11
Change-Id: I2216f71f4d4db6dd3766333b0c821cb3d35d7851


[ROCm/clr commit: 06573ac92f]
2022-11-03 07:59:24 -04:00
Laurent Morichetti 6d3939cd49 SWDEV-351980 - Store the correlation ID in the dispatch packet
The profiler can retrieve this correlation ID to attribute waves to
specific dispatch locations.

Change-Id: I700e8a91219d612f6a2028c0dda0c92753f3526a


[ROCm/clr commit: b043b4f5a2]
2022-11-02 23:40:10 -04:00
jatang 53f289e0ac SWDEV-293816 - Only dispatch Counter Aql packet when it is created successfully.
Change-Id: Ic8a7374d19012754c6de5d483ec5d07a56661d1b


[ROCm/clr commit: 166ef6b622]
2022-10-31 15:11:41 -04:00
Saleel Kudchadker 0d1d52d249 SWDEV-301667 - Use queue base address for AQL log
Change-Id: Ie525991b341deeb93ab3cb2d77550e8e1d87ee20


[ROCm/clr commit: cf1fd98074]
2022-10-31 13:54:49 -04:00
German c04e2300c8 SWDEV-363074 - Clean-up sync between SDMA and compute
HIP can't rely on the resource tracking, used in OCL and requires different explicit sync.
Make sure ROCCLR syncs compute only when SDMA is used and vise versa.
The new logic will allow to enable CPDMA without unnecessary waits.

Change-Id: Ib9d1788cfd5afa5ea2fec4c96a37d8b9c4d0059d


[ROCm/clr commit: ff6b4db70b]
2022-10-31 10:02:01 -04:00
German c15bee3157 SWDEV-363074 - Enable resource cache for SVM
Blender creates and destroys big allocations during the benchmark.
That causes big delays, because vidmm has to page-in/page-out memory.

Change-Id: I2baf4545807127406e3d2870a7581ff9ae7bcdb5


[ROCm/clr commit: dc4ad8c99c]
2022-10-27 16:39:29 -04:00
Ajay 09e359f925 SWDEV-357207 - Linux: enable StreamWrite/Wait APIs in deviceAttribute
Change-Id: I593df2dbb7a0233dd42f8d873510d85bbb27feff


[ROCm/clr commit: 261620a2ef]
2022-10-21 12:44:35 -04:00
German 6ab9293146 SWDEV-360183 - Finish the trace if queue was destroyed
- Make sure SQQT trace is captured for RGP server if the queue is destroyed before normal capture is done.
- Remove prepare queue from the logic. It's not really used for any HW capture and can cause RGP server abort if destroyed before capture is even started(delayed capture)

Change-Id: I6eb19963190a5769c6477a5496c1b831a6d59b89


[ROCm/clr commit: c1c5127875]
2022-10-21 10:44:10 -04:00
Alex (Bin) Xie d77a150bf9 SWDEV-361591 - clean up header files
Change-Id: I25ca37a94524da0521f5b856a9fa9bab73f103c1


[ROCm/clr commit: 06867f0c04]
2022-10-21 10:23:55 -04:00
Tao Sang 326049efb8 SWDEV-360706 - Fix WriteAqlArgAt() crash in X86
In X86 on Windows, sizeof(size_t)=4, but size=8, for
amd::KernelParameterDescriptor::HiddenGlobalOffsetX/Y/Z items.
Loose the condition to prevent crash.

Change-Id: I2216f71f4d4fd6dd3766023b1c821cb3d35d7848


[ROCm/clr commit: 3d281114fb]
2022-10-20 18:04:49 -04:00
Sourabh Betigeri 644fc9421c SWDEV-361730 - Fix to match the kernel arg allocation sizes between gpu visible mem and host/runtime mem
Change-Id: I6495aa57e97b46373c1d90cc230435780fdcf3ef


[ROCm/clr commit: b2665ccc4b]
2022-10-20 14:20:37 -04:00
Ajay e81e8965c9 SWDEV-360944 - palBlit setArgument desc.size_ --> argSize
Fixes AMF tests that were impacted on Windows

Change-Id: I0326e794ec5a34fdec7a5ff4ed79d5bd055997d2


[ROCm/clr commit: a5b550e828]
2022-10-20 12:44:15 -04:00
Laurent Morichetti 860e33dbed SWDEV-362046 - Report HIP_OPS activities using the ROCr driver_node_id instead of the device's index
The ROCclr assigns zero-based IDs to GPUs in the order they are
discovered. That zero-based ID is what is used to identify the GPU
on which the HIP_OPS activity took place.

When multiple ranks are used, each rank's first logical device always
has GPU ID 0, regardless of which physical device is selected with
CUDA_VISIBLE_DEVICES. Because of this, when merging trace files from
multiple ranks, GPU IDs from different processes may overlap.

The long term solution is to use the KFD's gpu_id which is stable
across APIs and processes. Unfortunately the gpu_id is not yet exposed
by the ROCr, so for now use the driver's node id.

Change-Id: Ib78854527d600d175bb76e2df0747c33f898c615


[ROCm/clr commit: 9a82118c85]
2022-10-20 12:31:30 -04:00
Julia Jiang a8c33d177a SWDEV-357122 - fix failure in vdi so as to handle unreasonable input size in MallocManagedNegativeTest
Change-Id: I1ed1916b652afc67327b0935c3c60fc2a404df30


[ROCm/clr commit: dacd55f3d7]
2022-10-20 12:19:22 -04:00
Christophe Paquot b2d02fe704 SWDEV-322620 - Virtual Memory Management
Hooked up the start VA hint address to PAL.

Change-Id: I4301d3eaaabcc85faf63fb25291291dcc3e8ebd1


[ROCm/clr commit: 470c4d7335]
2022-10-19 10:50:07 -04:00
kjayapra-amd 9bfae25a7c SWDEV-307411 - Require comment/message string in guarantee().
Change-Id: I55a699c5366f6a7d167ede4c9be2ec5b15cea9d0


[ROCm/clr commit: 951a5b9e7d]
2022-10-13 16:21:21 -04:00
Saleel Kudchadker 434df167df SWDEV-359548 - Detect fence optimization
- Use a dirty flag to determine fence optimization
- If fence is dirty submit a marker at top level to sync.

Change-Id: I53fb19b5bb05b7c7b37c41637a6c7aaf870b639a


[ROCm/clr commit: 6405b6cdba]
2022-10-10 14:15:16 -04:00
Saleel Kudchadker 41d911d637 SWDEV-356482 - Improve logging
Change-Id: I0c6286fcdb9d94398ed66262e95e8837898ff9fe


[ROCm/clr commit: eef2f99513]
2022-10-06 11:13:24 -04:00
Saleel Kudchadker 0dd9add8e1 SWDEV-352001 - Store last scopes for dispatch
- Store last fence scopes and use the last value to determine if we need a cache flush again. This helps cases where hipExtLaunchKernel API is
used.
- Purge code for ROC_EVENT_NO_FLUSH

Change-Id: I531cf9c9c60d5e2b3a9e265d0f52f79ed2fa8a8c


[ROCm/clr commit: 9b5cbd37a2]
2022-09-22 11:34:10 -04:00
Laurent Morichetti 0cd3ec5056 SWDEV-351980 - Consolidate registration tables in the roctracer library
Remove the activity_prof::CallbacksTable. The table was redundant with
the information already stored in the roctracer library. Instead use a
single callback into the roctracer library to query whether the activity
is enabled, and to report it.

Change-Id: I2e05b0881bb4a1953c14361d00ea310d02eb6e0c


[ROCm/clr commit: 52eb28930a]
2022-09-21 05:54:09 -04:00
Ajay c2a7fe7bd6 SWDEV-347670 - GPU StreamWait and StreamWrite support in Windows PAL backend
Change-Id: Ic4881305b6332e217f3d3127dce7e9d9d0a7df11


[ROCm/clr commit: 373a7d1195]
2022-09-15 13:57:40 -04:00
Maneesh Gupta 06593a072f SWDEV-352502 - SWDEV-355630 - Revert "SWDEV-299940 - Query global memory available on device with HSA attribute HSA_AMD_AGENT_INFO_MEMORY_AVAIL"
This reverts commit 1b2f5fbce1.

Change-Id: I86175ccf2b543c3ff3dffec6ccae410976972f22


[ROCm/clr commit: 4afca0647e]
2022-09-12 07:34:32 -04:00
Rakesh Roy 9cdd929342 SWDEV-353941 - Fix hipMemset latency issue for hipMallocManaged
- In case of HMM, use blit kernel instead of CPU memcpy for hipMemset

Change-Id: I89bfc96ff01a2375ed8df1b1c6bc05357dea84f7


[ROCm/clr commit: f097cda948]
2022-09-07 03:20:58 -04:00
Sourabh Betigeri bef723c63d SWDEV-326798 - Avoids waiting for the signal with a timeout and instead queries the current status
Change-Id: I8b4052d5439ca930ceb924da30cb0335f0826a95


[ROCm/clr commit: b15b3173f4]
2022-09-06 12:49:46 -04:00
Yifan Zhang 87847a38ba SWDEV-354850 - Enable gfx1103 on ROCm backend.
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Change-Id: Ia420444fd0cb703fcdca1ed7e3d2e262ffd7f4db


[ROCm/clr commit: d6c35273e3]
2022-09-01 18:58:00 +08:00
Ajay 1d84cdb2af SWDEV-352127 - Handle Raphael arch in palsettings create()
assert statement were hit silently in Release builds like SWDEV-353548.
Issue only seen in Debug builds

Change-Id: I9f7177806c854d64fcf986e9f6092076d8a05f23


[ROCm/clr commit: 040c416cb1]
2022-08-30 16:21:25 -04:00
Sarbojit Sarkar e6f0d30295 SWDEV-343921 - Updating default stack size for OpenCl tasks
Change-Id: I37cdd8808dddaa7ac0544b76d18de64b27e443bd


[ROCm/clr commit: c72a396c1f]
2022-08-26 04:57:00 -04:00
jie1zhan e668b22b11 SWDEV-352127 - Fix clinfo issue, add new asic id
Change-Id: Idc6ff6fe647878f32f8dbb0613cbb879ea21ecdf


[ROCm/clr commit: 2aa7e5819f]
2022-08-25 08:23:21 +08:00