SWDEV-3 - IR: Set TargetPrefix for some X86 and AArch64 intrinsics where it was missing
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274390 91177308-0d34-0410-b5e6-96231b3b80d8
GitHash: f0a4c116041f7c2aef7796c8b067f0947b69602d
Affected files ...
... //depot/stg/opencl/drivers/opencl/compiler/llvm.git/include/llvm/IR/IntrinsicsAArch64.td#2 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm.git/include/llvm/IR/IntrinsicsX86.td#2 edit
SWDEV-3 - Address two correctness issues in LoadStoreVectorizer
Summary:
GetBoundryInstruction returns the last instruction as the instruction which follows or end(). Otherwise the last instruction in the boundry set is not being tested by isVectorizable().
Partially solve reordering of instructions. More extensive solution to follow.
Reviewers: tstellarAMD, llvm-commits, jlebar
Subscribers: escha, arsenm, mzolotukhin
Differential Revision: http://reviews.llvm.org/D21934
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274389 91177308-0d34-0410-b5e6-96231b3b80d8
GitHash: 1e53a5fcec984e0f1cefe43dba3939e4b72a533f
Affected files ...
... //depot/stg/opencl/drivers/opencl/compiler/llvm.git/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp#11 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm.git/test/Transforms/LoadStoreVectorizer/AMDGPU/interleaved-mayalias-store.ll#2 edit
... //depot/stg/opencl/drivers/opencl/compiler/llvm.git/test/Transforms/LoadStoreVectorizer/X86/lit.local.cfg#1 add
... //depot/stg/opencl/drivers/opencl/compiler/llvm.git/test/Transforms/LoadStoreVectorizer/X86/preserve-order32.ll#1 add
... //depot/stg/opencl/drivers/opencl/compiler/llvm.git/test/Transforms/LoadStoreVectorizer/X86/preserve-order64.ll#1 add
SWDEV-3 - [PM] Preparatory cleanups to ArgumentPromotion.
This pulls some obvious changes out of http://reviews.llvm.org/D21921 to
minimize the diff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274445 91177308-0d34-0410-b5e6-96231b3b80d8
GitHash: 197a7516a32b69da7d1243308cb8eb6c5f29de0c
Affected files ...
... //depot/stg/opencl/drivers/opencl/compiler/llvm.git/lib/Transforms/IPO/ArgumentPromotion.cpp#2 edit
SWDEV-3 - [PM] Fix a small typo from when I ported JumpThreading
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274440 91177308-0d34-0410-b5e6-96231b3b80d8
GitHash: ea9886a5909183770b8d0baa9061150adf664b1a
Affected files ...
... //depot/stg/opencl/drivers/opencl/compiler/llvm.git/lib/Transforms/Scalar/JumpThreading.cpp#2 edit
SWDEV-3 - [Hexagon] Create global std::map lazily.
This could of course be a simple binary search with no global state
involved at all if someone cares enough. Just don't make everyone
linking the hexagon backend pay for it on process startup and shutdown.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274437 91177308-0d34-0410-b5e6-96231b3b80d8
GitHash: b4e53350f9349677e2a0178bde5b8b0c3b743b5e
Affected files ...
... //depot/stg/opencl/drivers/opencl/compiler/llvm.git/lib/Target/Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp#2 edit
SWDEV-3 - CodeGen: Use MachineInstr& in SlotIndexes.cpp, NFC
Avoid implicit conversions from iterator to pointer by preferring
MachineInstr& and using range-based for loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274354 91177308-0d34-0410-b5e6-96231b3b80d8
GitHash: effa4cc200078395a74decd1ae2d1e380c79a2f7
Affected files ...
... //depot/stg/opencl/drivers/opencl/compiler/llvm.git/lib/CodeGen/SlotIndexes.cpp#2 edit
SWDEV-3 - CodeGen: Use MachineInstr& in RegAllocFast, NFC
Use MachineInstr& instead of MachineInstr* in RegAllocFast to avoid
implicit conversions from MachineInstrBundleIterator. RAFast::spillAll
and RAFast::spillVirtReg still take iterators, since their argument may
be an end iterator from MachineBasicBlock::getFirstTerminator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274353 91177308-0d34-0410-b5e6-96231b3b80d8
GitHash: ce5fdc00e7ed9f05c643b056d0561a8133b5438b
Affected files ...
... //depot/stg/opencl/drivers/opencl/compiler/llvm.git/lib/CodeGen/RegAllocFast.cpp#2 edit
SWDEV-3 - [CMake] Add LLVM_BUILD_32_BITS to LLVMConfig.cmake
Previously out-of-tree passes could detect if LLVM was built with
LLVM_BUILD_32_BITS by looking for -m32 in LLVM_DEFINITIONS, but as of r271871
it no longer appears there. Resolve this by instead emitting LLVM_BUILD_32_BITS
in LLVMConfig so it can be checked for directly.
Differential Revision: http://reviews.llvm.org/D21434
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274351 91177308-0d34-0410-b5e6-96231b3b80d8
GitHash: e6124112ab41442b4df11207eaf004bb6066c021
Affected files ...
... //depot/stg/opencl/drivers/opencl/compiler/llvm.git/cmake/modules/LLVMConfig.cmake.in#6 edit
SWDEV-3 - [ARM] Refactor Thumb2 mul instruction descs
No functional changes. Just created wrapper classes around the 3
and 4 reg mult and mac instruction classes.
Differential Revision: http://reviews.llvm.org/D21549
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@274347 91177308-0d34-0410-b5e6-96231b3b80d8
GitHash: b5755a89959882b64dc9adc3a963b5ba920b392f
Affected files ...
... //depot/stg/opencl/drivers/opencl/compiler/llvm.git/lib/Target/ARM/ARMInstrThumb2.td#2 edit
foreman