This patch did not consider the dicussions in SWDEV-270908
> "we found that in GeekBench5, forcing Wave64 instead of the default
> Wave32 compute policy yields big gains in every subtest except one"
This reverts commit d6dc82b220.
Change-Id: Ice1728585b9d1b2c1b36a06cfa0b8c47cb2bfa49
Add a view bit to avoid original resource destruction when parent
dependency doesn't exist with the image view cache
Change-Id: I8277afd575af8f29951c5d1a9f7d94d784251657
Make sure parent_ field is cleared for the internal image views.
The internal image views don't require dependencies tracking.
The issue appeard only when Navi10 pitch workaround was enabled.
Change-Id: I376d212750085a9391f8c32fc2979dcb5d93c89c
- Enable CUs adjacent pairwise for WGP mode
- In HostQueue::terminate() do not segfault if virtual device hasn't been created
Change-Id: I94402ff333308af5824878086cc238b3993d534d
- Rename HIP_USE_SDMA_QUERY to DEBUG_CLR_USE_SDMA_QUERY as this is
supposed to be a temporary env var for debug purposes only.
Change-Id: If6ebd52ab87624375a3df24ceccdcc05c60a65af
Blit manager requires an image view to reduce the amount
of copy kernels. Creation/destruction of a view in ROCr is
an expensive operation. Thus, runtime can cache views for fast access.
Change-Id: Ia67d775b481cc8326d91215ca22d4a73c1dddb59
- Remove large bar memcpy path. Since we end up waiting for a barrier,
its defeating the true intent of the copy, Also memcpy over PCIE\XGMI is
introducing variability in perf for HPC apps like GROMACS
Change-Id: I3b5c9d9ce93333959c39023bf4f703e2ccb6e3af
let ROCr and addrlib decided whether a pitch is supported.
Then, check if we uses workaround.
Also improve image performance for Navi 1x in some cases.
Change-Id: If8bda46648b23c1dcfa26608ca3bb9cd89fef430
- disable deprecated function use warning
- disalbe size_t to .type' warning
- disable conversion from 'type1' to 'type2' warning
Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: I64161fd37cf56de3d132102103267ae8da40193a
Initial implementation for hipMemPoolExportToShareableHandle,
hipMemPoolImportFromShareableHandle,
hipMemPoolExportPointer and hipMemPoolImportPointer
Change-Id: I0ebdc48e9163b394ded560adca6c38bbc5aee7d1
This reverts commit a4c5c44008.
Reason for revert: Performance regressions and failures observed. Need to investigate those and before re-applying patch
Change-Id: I42ba0605797f9bdcfb5d5102927dd01405cf05e3
Relates to https://reviews.llvm.org/D150427,
Each printf call populates buffer with following data
1. Control DWord - contains info regarding stream, format string constness and size of data frame
(see http://gerrit-git.amd.com/c/lightning/ec/device-libs/+/857722 for more info)
2. Hash of the format string (if constant) else the format string itself
3. Printf arguments (each aligned to 8 byte boundary)
Change-Id: I7e320deb343921b4b4cfaf08a2be2883e0bc1f65
HIP_FORCE_DEV_KERNARG=1 will create a device allocation for kernel arg
segment. Flag is 0 by default.
Change-Id: Iaaf5a149f3be8596568878d5d272268baf067c60
Juan Manuel MARTINEZ CAAMAÑO
Todd tiantuo Li
victzhan
Jaydeep Patel
Alex Xie
Saleel Kudchadker
German
Ioannis Assiouras
Anusha GodavarthySurya
Lang Yu
kjayapra-amd
Rakesh Roy
ajay
Matt Arsenault
Sourabh Betigeri
sdashmiz
Jacob Lambert
Vikram