Grafico dei commit

103 Commit

Autore SHA1 Messaggio Data
jie1zhan e668b22b11 SWDEV-352127 - Fix clinfo issue, add new asic id
Change-Id: Idc6ff6fe647878f32f8dbb0613cbb879ea21ecdf


[ROCm/clr commit: 2aa7e5819f]
2022-08-25 08:23:21 +08:00
Sarbojit Sarkar a70f836779 SWDEV-344210 - Fixed page fault when mempool accessed from remote device
Change-Id: Ie41b0c0499f7733d4541ccd50b3d0d976c6431c9


[ROCm/clr commit: a28b22d9b4]
2022-08-09 23:26:27 -04:00
Ajay 9ea3a35e5c SWDEV-317716 - Win: hipDeviceGetUuid return default uuid for pal device
Change-Id: Id102b54c78f031a8e7cc5ab5223cef9a0914d4fd


[ROCm/clr commit: 8b89c05e2f]
2022-07-21 00:03:33 +00:00
sdashmiz 3389e6077a SWDEV-334233 - add support for p2p in windows
Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: I9109120b5444c400e65cfff869cb36e876ffd1fc


[ROCm/clr commit: e176e27bf7]
2022-07-14 15:07:33 -04:00
Tao Sang 664578080a SWDEV-286739 - Support hipDeviceAttributeWallClockRate
Part 1: Query constant frequence of wall clock from RocR

Change-Id: I52cbba6d67d11cde6d019c5ab530059f426a9bf2


[ROCm/clr commit: 1e26165cd0]
2022-07-12 17:53:11 -04:00
Christophe Paquot 65c8c0a722 SWDEV-322620 - Virtual Memory Management
Expose VM granularity

Change-Id: Ia6af99843ca957f1139fd369e46e09a6c346da46


[ROCm/clr commit: 4aecc29bf0]
2022-06-27 13:07:43 -07:00
German Andryeyev acf2856677 SWDEV-339296 - Delay hidden heap allocation till the usage
Move hidden heap creation to the kernel launch to make sure it's
allocated on the actual first usage.

Change-Id: I1b65a82fc06d9129ed45a69765bf14ea3d945b04


[ROCm/clr commit: 4975f69337]
2022-06-14 12:18:34 -04:00
German Andryeyev 2b3296a4ef SWDEV-259998 - Change the location of RGP init calls
Move StartLateDeviceInit() and FinishDeviceInit() calls in RGP
server to avoid a timeout

Change-Id: Ifd681859c7dc76259d7296aa8cc15305d563c9b2


[ROCm/clr commit: ecea224bcf]
2022-06-13 18:05:44 -04:00
Christophe Paquot dc2aab85b2 SWDEV-322620 - Virtual Memory Management
Introducing a VirtualMemObj map as it is needed to differentiate
between virtual address ranges and actual physical memory
This is because a whole VA range can have several physical memories
as chunks.

Change-Id: Ie2a972b4faf3f7d552cfa53e77898f80ad75740a


[ROCm/clr commit: 905088e4e7]
2022-06-06 11:32:22 -07:00
German Andryeyev df01016c97 SWDEV-336024 - Clear device heap to 0 in ROCr path
Change-Id: Id100ca6d6d5bd7fb16ca8c98ff0b12c9df1d69ab


[ROCm/clr commit: 830898753d]
2022-05-20 11:51:08 -04:00
German Andryeyev 0ecf22bb53 SWDEV-336024 - Clear device heap to 0
This reverts commit 8624574866.

Reason for revert: Fix regressions

Change-Id: I7d883e1c3cbd27bb64b581ec800243ad7dfe24fd


[ROCm/clr commit: 07c1b9a998]
2022-05-19 09:10:08 -04:00
German Andryeyev 43ef8bb204 SWDEV-331660 - Switch PAL interface to 734
Update clientApiId field in PlatformCreateInfo

Change-Id: I445b9712a4c0da9f32e86df8b4a1b8dd7365b11b


[ROCm/clr commit: 893b719181]
2022-05-16 22:58:50 -04:00
German Andryeyev 8624574866 SWDEV-336024 - Clear device heap to 0
The heap must be cleared once per device, but ROCclr doesn't
create a queue per device in HIP. Hence, the clear operation will
be performed during the first queue creation.

Change-Id: I52ceb06d67d11cde6d019c5ab510059f426a9bfb


[ROCm/clr commit: 04bfd93569]
2022-05-11 11:03:56 -04:00
Christophe Paquot 2c3faaa3a0 SWDEV-322620 - Virtual Memory Management
Add a virtualMemoryManagement_ flag to device.info.

Change-Id: Iabd039010d83fc51b4bcef600c609f5c65e7b1ae


[ROCm/clr commit: b4645c7d4e]
2022-05-09 22:54:42 -07:00
Christophe Paquot 5f42bfd145 SWDEV-322620 - Virtual Memory Management
Implement map/unmap for PAL backend
Create commands since PAL uses the IQueue to map/unmap

Change-Id: I97e26a7d28ae5e10774c9ca65307153100945621


[ROCm/clr commit: 67657d6099]
2022-04-22 18:09:26 -04:00
Christophe Paquot 0c5bc58a57 SWDEV-322620 - Virtual Memory Management
Implement virtualFree for PAL

Change-Id: I4482777fa52c979d42a7c57103862e2e02279024


[ROCm/clr commit: 4c3a20a16e]
2022-04-21 14:45:11 -04:00
Christophe Paquot 1024cb58a7 SWDEV-322620 - Virtual Memory Management
Adding virtual memory management APIs to rocclr.
The HIP layer will handle virtual allocs on devices.

Change-Id: Ia978f105c2c3fed3959c77580ba228e845105754


[ROCm/clr commit: b5f555f9ec]
2022-04-15 00:10:02 -04:00
German Andryeyev b813a78c80 SWDEV-307185 - Move memory allocation under device layer
It can be too early to allocate memory at the begining of
Device::create() under PAL

Change-Id: I4bd76db7be3f6fb246243ea68022d8b0f860471d


[ROCm/clr commit: 3af3fe10de]
2022-03-21 16:17:22 -04:00
German Andryeyev 7d5ed33e8f SWDEV-307185 - Create heap for device memory allocator
Pass the allocated heap with the kernel arguments

Change-Id: Icdec09b7f937845c39e21cbca7071dc3ba791af9


[ROCm/clr commit: 7b114a2b8b]
2022-03-04 00:44:41 -05:00
Saleel Kudchadker ebcc5f9388 SWDEV-301947 - Rename device Info element
Rename maxBoostComputeUnits to maxPhysicalComputeUnits_.

Change-Id: I5941515ac4f1f4348b3b10478bf4e01444f0a864


[ROCm/clr commit: e888c9e491]
2022-02-25 16:48:15 -08:00
German Andryeyev 3c4f97f66c SWDEV-286150 - Remove GSL backend
Change-Id: Iba9a997ee7d5ff6ac00d5888ff189a4514958fe9


[ROCm/clr commit: 525a1bbf1a]
2022-02-09 17:16:39 -05:00
German Andryeyev 0bfb898038 SWDEV-286150 - Don't report OCL2.2 support
OCL2.2 requires SPIR-V and runtime doesn't support it.
Make sure PAL backend doesn't report any SPIR-V support.

Change-Id: I8d179069674205b54f7d20d149bcb675bee5cdb0


[ROCm/clr commit: 0bf395af39]
2022-02-07 17:34:39 -05:00
Todd tiantuo Li 1f9f598d92 SWDEV-297292 - add gfx90c:xnack+ support as gfx90d
Change-Id: I90e28981a7cbc0f9a0105c16e9dda3ad8ac57f51


[ROCm/clr commit: fbbae8055f]
2022-02-02 14:24:19 -08:00
Saleel Kudchadker d0e8d72bfa SWDEV-301947 - Use new enum for CU count
Use HSA_AMD_AGENT_INFO_COOPERATIVE_COMPUTE_UNIT_COUNT to get compute
units. This is needed to work around assymentric CU harvesting bug on
gfx90a. Add a new device property to get the max available CUs on the
device.

Change-Id: I878f38f14f16c1af01fc0a77157aea1e816a63b8


[ROCm/clr commit: 33aca5a4a6]
2022-01-31 12:57:50 -05:00
German Andryeyev ea28025939 SWDEV-318505 - Update HSAIL xnack path
Report proper target id for xnack in HSAIL path. Runtime
will use ISA table and report hsailName().
Fix offline compilation path for PAL.

Change-Id: Ic0250bf6b9c193d867aec9800a319da1bf00c3ee


[ROCm/clr commit: a543d4a860]
2022-01-24 09:27:32 -05:00
Satyanvesh Dittakavi 85c2cac111 SWDEV-306939 - Fix vdi errors/warnings by CppCheck
Change-Id: I56d910f8363787f1050d5d7e8064ed553c5827fd


[ROCm/clr commit: e20dd61932]
2022-01-12 00:22:16 -05:00
German Andryeyev b8ab281765 SWDEV-317061 - Fix 32-bit HSAIL complib load
Use __stdcall decl to match the library defines

Change-Id: Id4178443d5a9bb4e5401d80b3b5d15c7bbea0330


[ROCm/clr commit: e0a4e0df0e]
2022-01-04 16:48:18 -05:00
German Andryeyev c759986e28 SWDEV-300515 - Apply CU granularity on the CU count
Report granularity for possible app query

Change-Id: I98857c6f4cc7ae590927ea35ce57d181abe7860b


[ROCm/clr commit: f613831471]
2021-12-10 10:47:28 -05:00
Julia Jiang 41eef3076e SWDEV-308644 - reorganize extra blit kernel in PAL stack
Change-Id: I9d853e8d417ef75b522184d83646ec4b9fa8669b


[ROCm/clr commit: 376ea1e293]
2021-12-07 14:55:20 -05:00
Satyanvesh Dittakavi b219bf8292 SWDEV-309286 - save the max system mem size in device info
Change-Id: I9955625aca6ceda059aef6354d909de636b610ba


[ROCm/clr commit: 9dabdcdc3e]
2021-12-02 10:59:07 -05:00
Julia Jiang ea2741f631 SWDEV-308644 - merge roc blit kernels
Change-Id: I378e511959fe17c03fa45066022e9670a4d181f0


[ROCm/clr commit: f5c9ad5b1d]
2021-11-25 10:07:51 -05:00
German Andryeyev 0b03dde692 SWDEV-286150 - Add detailed thread trace support in RGP
- Create hash values for binaries
- Add the binaries into RGP trace
- Add corresponding hash value for every dispatch

Change-Id: I2c3ce004d69f37d0d46bc4744e12f24273517f5e


[ROCm/clr commit: 2a298f2ec3]
2021-11-10 14:46:02 -05:00
jujiang 7efd69cecd SWDEV-306207 - clean up CL definition in ROCclr
Change-Id: I92e2c7c63ebddd119df390784e372ab2f42f3b0d


[ROCm/clr commit: 90b0e8430a]
2021-10-07 11:45:43 -04:00
German Andryeyev c99468853f SWDEV-292408 - Don't force high clock for HIP
Change-Id: I501f4e5272124025068b1d3cb637ee8061b06467


[ROCm/clr commit: 51556711dc]
2021-09-20 18:44:11 -04:00
Todd tiantuo Li 9458b7ea4d SWDEV-1 - Rembrandt support
Change-Id: Id5c37e130fb2c0bdc01b84997c85324121ec4df9


[ROCm/clr commit: ec411737aa]
2021-08-22 23:56:08 -07:00
Vladislav Sytchenko 48cbefdacf SWDEV-292408 - [PAL] Always force high clocks for HIP
Redshift sees around a 3x performance uplift this change.

Turning this on for OpenCL might cause unwanted behaviour, due to
apps like RSX running in the background all the time.

Change-Id: I9f32d5f2e05b6697a8aaa9ddf74474b5531bb7e1


[ROCm/clr commit: 2f00782829]
2021-08-22 23:56:08 -07:00
Vladislav Sytchenko 4a2da6ea45 SWDEV-293519 - [PAL] Limit mgpu SVM logic only to mgpu cases
Below logic allocates the host buffer whenever a subbuffer is created
from a SVM allocation. This is only needed for multi-device contexts.

HIP does not support multi-device contexts, hence this logic just ends
up performing unnecessary system allocations.

Change-Id: I8eae635f7c5289c52ef73434218c1658b788a456


[ROCm/clr commit: ffbf368f4c]
2021-08-22 23:56:08 -07:00
agunashe 49f0546637 SWDEV-293742 - Update copyright end year VDI repo
Change-Id: I69d2fea4a7a43adf96ccea794270e4af991c5261


[ROCm/clr commit: d96481fb36]
2021-08-22 23:56:07 -07:00
Vladislav Sytchenko 6c612d8ce7 SWDEV-274815 - [PAL] Navi24 support
Change-Id: I934797bda471618c3f69484a1552b37345ae638b


[ROCm/clr commit: f6c00765e7]
2021-08-22 23:56:07 -07:00
Vladislav Sytchenko de280603a7 SWDEV-289548 - [PAL] Revive Raven 2 support
Revert back to using the Raven (gfx902) target ID for Raven 2 (gfx909).
This is due to the HSAIL compiler not supporting gfx909.

In theory there should be no issue with running Raven isa on Raven 2.

Change-Id: I425edebc99075799eda5522fad231b8fb3184873


[ROCm/clr commit: 0b1481d4f1]
2021-08-22 23:56:07 -07:00
Brian Sumner 567d9cc617 SWDEV-285332 - move common context into parent
Change-Id: I99ceb62ad948e1fa9d1dcaa5ede98626cc95bea7


[ROCm/clr commit: 6d09a83b2d]
2021-05-09 09:18:39 -07:00
pghafari b6e62f99d0 SWDEV-245532 - HIP - Vulkan interop semaphores
linuxpro syntax update

Change-Id: Id77e0d82c504fb7a1bd8edfac7dc962e428c87b4


[ROCm/clr commit: 89168d4812]
2021-04-28 13:48:25 -04:00
pghafari 45a930465e SWDEV-245532 - HIP - Vulkan interop semaphores
linuxpro syntax update

Change-Id: I947f24f67ed59c15fe5047348b0c005e19e93544


[ROCm/clr commit: 6e69bcef9e]
2021-04-28 07:44:22 -04:00
pghafari 4eca2cb891 SWDEV-245532 - HIP - Vulkan interop semaphores
linuxpro syntax update

Change-Id: I184e1293ff4b046c5f8376d06f1d8e9509cd7ba2


[ROCm/clr commit: 6e69864a0c]
2021-04-27 13:28:49 -04:00
pghafari d620f9ea84 SWDEV-245532 - HIP - Vulkan interop semaphores
syntax update

Change-Id: I1eefb8048adbe18c84276092520c1e0b01164e82


[ROCm/clr commit: fe9dbf1ded]
2021-04-27 07:11:58 -04:00
pghafari dbb9c74540 SWDEV-245532 - HIP - Vulkan interop semaphores
Change-Id: Ib79328ce4ec2f8ac3aade59fde4fd30e2d6e5cba


[ROCm/clr commit: 582d12b32f]
2021-04-26 13:20:58 -04:00
German Andryeyev 8cea0215fb SWDEV-282397 - Alloc scratch memory on the current queue
Device enqueue has an option to execute scheduler on the current
queue and it's enabled by default. Make sure scratch is allocated
on the current queue for that case. Add max vgpr tracking per
program to adjust scratch size accordingly.

Change-Id: I2a6d796913a4551a1e7f343a2465d589eec60d8a


[ROCm/clr commit: e553b2763a]
2021-04-20 12:59:44 -04:00
Vladislav Sytchenko c585ae92a7 SWDEV-280473 - Support HSAIL shared library build
This change makes HSAIL usage similar to that of Comgr. By default, the
runtime will statically link against it, however if HSAIL_DYN_DLL is
defined, then the runtime will try to dynamically load HSAIL.

Currently stick to statically linking to HSAIL. In a feature patch the
dynamic loading behaviour will be enabled.

Change-Id: I6a78a4375975cf847f236b200404c8cf941d012b


[ROCm/clr commit: c7b50bb890]
2021-04-14 12:25:54 -04:00
Vladislav Sytchenko 7b3014ec69 SWDEV-280473 - Remove HSAIL support from the ROCm backend
In adition to removing the HSAIL logic from the ROCm backend, guard all
of the HSAIL includes in the common layer behind the WITH_COMPILER_LIB
define. This is to avoid including HSAIL headers when building with
no support for it.

In common logic replace the use of the aclType enum with the new
Program::file_type_t enum. This is essentially a local copy of the HSAIL
enum to avoid including any HSAIL headers.

Change-Id: Ica0651d1b29dfccc255cc584eb82a5cb35e1b520


[ROCm/clr commit: cbeb372e46]
2021-04-12 14:55:06 -04:00
Jason Tang 636bdbd0fa SWDEV-277559 - Remove AMDIL
The rest of AMDIL support will be removed along with orca backend.

Change-Id: I0462501e7147dc4b99870fd02034d0a4a0496e55


[ROCm/clr commit: 1a38be8972]
2021-04-09 14:15:15 -04:00