نمودار کامیت

33 کامیت‌ها

مولف SHA1 پیام تاریخ
haoyuan2 6ed700cca8 SWDEV-333187 - Support IPC in HIP runtime on Windows
enable shared memory based IPC

Change-Id: Ic1ad8d426863c2137747a3d468fe02d073f5d248


[ROCm/clr commit: 424c4ce5c4]
2022-04-27 23:05:56 -04:00
Maxime Chambonnet 38928e85c1 SWDEV-1 - ROC CLR typos
This is cherry-picked from this github issue:
https://github.com/ROCm-Developer-Tools/ROCclr/issues/28

Change-Id: I236f4f25a2dabe05883159af0fab0bad06ab0fd0


[ROCm/clr commit: d45794e985]
2022-04-11 14:24:39 -04:00
Jeremy Newton 2e2f21df24 SWDEV-323669 - Improve arch detection
- Clean up detection by using visual studio macros to detect arch; I
  didn't list all possible ARM platforms (can be done later if desired)
- Fixed two incorrect uses of !defined(ATI_ARCH_ARM) to instead use
  defined(ATI_ARCH_X86), as they contain X86 specific code
- Fixed one use of __ARM_ARCH_7A__ to use ATI_ARCH_ARM instead

This is an improvement to the fixes in the last patch for SWDEV-323669

Signed-off-by: Jeremy Newton <Jeremy.Newton@amd.com>
Change-Id: I8568167293c34ad5331902105877f3ab6e25acb3


[ROCm/clr commit: 00efdc1cd6]
2022-04-08 12:21:58 -04:00
Saleel Kudchadker f99304adcd SWDEV-322225 - Use numa_allocate_bitmask
- Fix a crash with AMD_CPU_AFFINITY=1 as numa_bitmask_alloc isnt the
right api to allocate bitmask
- Do not set affinity for ROCr thread. It worsens performance rather
than any improvement.
- Fix regression from my previous change for event handler.

Change-Id: I3ea75adc2a6333f29752283eddd5b555e9b58cc5


[ROCm/clr commit: 802c2c8a9f]
2022-03-26 13:24:51 -04:00
Satyanvesh Dittakavi 85c2cac111 SWDEV-306939 - Fix vdi errors/warnings by CppCheck
Change-Id: I56d910f8363787f1050d5d7e8064ed553c5827fd


[ROCm/clr commit: e20dd61932]
2022-01-12 00:22:16 -05:00
Saleel Kudchadker dc7a87fad8 SWDEV-299893 - Fix PAL/lnx build
Change-Id: If4408a81d2dc8686c8e805a7697a7d9b2589c864


[ROCm/clr commit: 1e6cc5a2fa]
2021-11-23 08:09:33 -08:00
Saleel Kudchadker 04a391004a SWDEV-299893 - Set preferred node affinity
Set affinity to the closest node of the current GPU. This reduces
the latency to fetch kernel args since device would query the CPU cache
of core which did the dispatch. This behavior is controlled with
AMD_CPU_AFFINITY env var(disabled by default)

Change-Id: I65afba62cb818ea25a311b88d1c0dd5c51330292


[ROCm/clr commit: b192beea52]
2021-11-19 04:42:42 -05:00
vpykhtin f6946fb86d SWDEV-1 - fix line endings for .asm files
Change-Id: I8cf23829184618e41789220e43c00acc0e408fa5


[ROCm/clr commit: 4be447ab8d]
2021-08-22 23:56:08 -07:00
agunashe 49f0546637 SWDEV-293742 - Update copyright end year VDI repo
Change-Id: I69d2fea4a7a43adf96ccea794270e4af991c5261


[ROCm/clr commit: d96481fb36]
2021-08-22 23:56:07 -07:00
Saleel Kudchadker ce26a73ca9 SWDEV-260448 - Honor NUMACTL for Direct Dispatch
Setting AMD_CPU_AFFINITY=1 will keep Async Handler thread within the
bounds set by numactl.

Change-Id: Id01b30df5127d65c29ac072bf74a04986b7128de


[ROCm/clr commit: cd21af757e]
2021-08-22 23:56:07 -07:00
Saleel Kudchadker f42ed0672d SWDEV-280773 - Log affinity reset
Change-Id: I101c14174097d262d5d5b924cb31a69483a49c04


[ROCm/clr commit: df5b6cf202]
2021-05-11 15:52:55 -07:00
Saleel Kudchadker 4b03f02a61 SWDEV-280773 - Honor CPU affinity with env var
Setting AMD_CPU_AFFINITY = 1 will make runtime honor core affinity that
the process may set. This is disabled by default as it can prevent
worker thread or any thread that runtime creates from getting scheduled
thus affecting performance.

Change-Id: Ibe4cc95e7b99caee5ce750b7bf66e09e999cc9a3


[ROCm/clr commit: 1398719b0d]
2021-05-11 18:21:56 -04:00
Jason Tang 64f4e4c01c SWDEV-3 - Backport M0 changes
Change-Id: I36f676713442479ede142b7e887656f0b658bc7b


[ROCm/clr commit: 8d01cbddbe]
2021-03-10 10:25:42 -05:00
Jason Tang 318c9e1080 SWDEV-1 - Fix warnings when building with clang++
Change-Id: Idebd2b618b9a3360147984a0e33852dbe2e65818


[ROCm/clr commit: 0d47b06928]
2021-02-18 10:02:46 -05:00
German Andryeyev d43cf72481 SWDEV-271888 - Remove an explanation link
Change-Id: I157adac7a248d50ee8db677c19be20c00fcd5ecc


[ROCm/clr commit: 47f8d55313]
2021-02-05 17:28:28 -05:00
kjayapra-amd 552218f005 SWDEV-261215 - Updating file handle APIs with file sharing option to accomodate back to back hipModuleLoad calls.
Change-Id: I8fd833b678ca38c60e2d7d02295fd01df0af5592


[ROCm/clr commit: e8208de6c1]
2021-01-28 09:47:41 -05:00
Rahul Garg 22fb358b02 Add MemoryMapFileTruncated function
Change-Id: I26d2a9fbac668cbac284bdfad0d7912db521dc70


[ROCm/clr commit: 5ff3010e1b]
2020-10-20 20:25:27 -04:00
Jason Tang 091f1e8e85 Change file mode 755 back to 644
Change-Id: I4ba5d66997ffd3331c56674d4bf805160dcdf049


[ROCm/clr commit: 25cc965c76]
2020-10-19 15:09:32 -04:00
Vladislav Sytchenko f092eeb18e Fix Windows legacy LLVM build
The os.hpp header gets added to the include path of legacy llvm via the compiler lib. Having "windows.h" included causes a lot conflicts with LLVM headers, as they forward declare many Windows types. Best to not include it here.

Change-Id: I60c44a8d28660368f1a4a95741e1053ef3528fa1


[ROCm/clr commit: e1b916260a]
2020-09-21 11:52:01 -04:00
kjayapra-amd b3e8c5cdb0 SWDEV-252542 - Fixing Win Compilation on SWDEV-241902.
Change-Id: If76f79002b265dccf6da4acef1ff9372d8b0a2ff


[ROCm/clr commit: 7462e39954]
2020-09-18 12:11:56 -04:00
kjayapra-amd 3e6cf63a83 SWDEV-241902 - Changes to pass file descriptor and offset to load code object.
Change-Id: I0243cccdeaa533b2a56fde42f12d5424c3b63a3b


[ROCm/clr commit: a66c56d641]
2020-09-15 07:54:24 -04:00
Laurent Morichetti c863b2074b Use std::atomic
Replace amd::Atomic with std::atomic. Remove make_atomic uses by
converting the variable to std::atomic and making sure the memory
order is relaxed when synchronizes-with is not needed.

Delete utils/atomic.hpp.

Change-Id: I0b36db8d604a8510ac6e36b32885fd16a1b8ccfa


[ROCm/clr commit: 5d4b6f74d3]
2020-09-09 14:55:29 -04:00
Tao Sang f3b85497ae Replace private libelf with elfio
Change-Id: I4c630d78f7bf23dda85ec8480bb2790864405657


[ROCm/clr commit: e986f5c820]
2020-08-26 12:32:13 -04:00
Tao Sang 44eb207f8d Apply constexpr on global constant varaibles
When HIP_ENABLE_DEFERRED_LOADING=0, many global variables will be
referenced but they are not initialized in that early time. The patch
will use constexpr to initialze global constant varables in compile
time.

Change-Id: I9d538b7abc6a0ce700ec3332b97fc144db5fc1ef


[ROCm/clr commit: fdef6f722f]
2020-07-22 22:14:13 -04:00
Payam a1d94580ca clean up warnings
Change-Id: I5421ab90234278920e6080599bb40ffcb3eaa04d


[ROCm/clr commit: 94e623181b]
2020-07-16 09:36:26 -04:00
Payam 4e766cc4b2 Reset each thread's affinity to all avilable cpus
reset happens at the start of the thread  SWDEV-240685

Change-Id: I6c35473bab67d02f76a8013ab9394f293c6f2b07


[ROCm/clr commit: 55b5f5f06c]
2020-07-15 09:41:50 -04:00
kjayapra-amd 08036e1ffe SWDEV-232464 - Use Fstat to retrieve file size.
Change-Id: I4051645cd322c2afaf89e014452657db1a1fdc2c


[ROCm/clr commit: c97ef9f84a]
2020-05-12 08:53:51 -04:00
Michael LIAO b785d25506 Clear executable permission.
Change-Id: Ia0d363b1ba89d7947e5b5a55cb67edba86f0515e


[ROCm/clr commit: 503ef06555]
2020-05-07 10:38:58 -04:00
kjayapra-amd 6c270f2292 SWDEV-232464 - Memory Map modules loaded via file from hipModuleLoad
Change-Id: I0e644a161c8000abe1b07fbec72de09f1c0a4b18


[ROCm/clr commit: 347e36e31b]
2020-05-04 12:40:16 -04:00
Matt Arsenault d535b24691 Fix several instances of -Wsizeof-array-div
e.g.:
 warning: expression does not compute the number of elements in this
 array; element type is '__cpu_mask' (aka 'unsigned long'), not
 'uint32_t' (aka 'unsigned int') [-Wsizeof-array-div]

for (uint i = 0; i < sizeof(mask_.__bits) / sizeof(uint32_t); ++i) {

__bits is a __cpu_mask, which is a 64-bit type. These were accessed
through uint32_t pointers so the loop bound should have been
correct. These operations can be done directly on the 64-bit type so
we can leave the array size pattern, and eliminate the casts.

The case in getNextSet should probably be rephrased in terms of
__cpu_mask to avoid the pointer casting, but this is tricker than the
other cases so I used the easy option to quiet the warning.

Change-Id: I1332584fad58439ccd9d369589519a9918e1678e


[ROCm/clr commit: 72c435ea35]
2020-04-17 15:24:33 -04:00
Payam bb8a9ee6e6 updating copyrights
Change-Id: I592a84b64c85ac07ee7db7bb43c73ce623662246


[ROCm/clr commit: ddea39382b]
2020-04-10 14:45:28 -04:00
Laurent Morichetti e284923583 Update copyright info
Change-Id: Ia4f9ff0f5f873b4223a8cca154188bb0d2f1abba


[ROCm/clr commit: b4c6143a2f]
2020-02-04 09:26:14 -08:00
Laurent Morichetti 011f3e945b Merge branch 'origin/pghafari/vdi-prototype' into lmoriche/amd-master
Change-Id: Id3b833d405596735becb3346f3b08c6da57033fe


[ROCm/clr commit: 20c7173849]
2020-01-30 20:12:13 -08:00