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4578 Commits

Author SHA1 Message Date
sdashmiz 3389e6077a SWDEV-334233 - add support for p2p in windows 
Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: I9109120b5444c400e65cfff869cb36e876ffd1fc


[ROCm/clr commit: e176e27bf7]
 2022-07-14 15:07:33 -04:00
Chauncey Hui f69b6922bb SWDEV-2 - Change OpenCL version number from 3484 to 3485 
[ROCm/clr commit: 782e0f2a8d]
 2022-07-14 03:00:05 -04:00
Maneesh Gupta f34161f293 SWDEV-286739 - VDI needs ROCr 1.6+ 
Change-Id: I5774563edf001eed2994e92713630adbfb75c489


[ROCm/clr commit: 959ba793db]
 2022-07-13 04:15:32 -04:00
Chauncey Hui b6e570ce10 SWDEV-2 - Change OpenCL version number from 3483 to 3484 
[ROCm/clr commit: 39fa4aae1f]
 2022-07-13 03:00:06 -04:00
Saleel Kudchadker 5ba419ac66 SWDEV-301667 - Increase kern arg pool 
Change-Id: Ie4b087ae4aec08fccaaa7958cdf545e4e27ac5c1


[ROCm/clr commit: 6a77f73050]
 2022-07-12 18:42:29 -04:00
Tao Sang 664578080a SWDEV-286739 - Support hipDeviceAttributeWallClockRate 
Part 1: Query constant frequence of wall clock from RocR

Change-Id: I52cbba6d67d11cde6d019c5ab530059f426a9bf2


[ROCm/clr commit: 1e26165cd0]
 2022-07-12 17:53:11 -04:00
Saleel Kudchadker b2b8545eb6 SWDEV-260345 - Manage constant buffer for blit 
- Leverage managed buffer that would use chunks for fill pattern. Use a
different chunk for the next fill to avoid wait

Change-Id: I254483c867e112f66564ffd8f55e0a605d8896c9


[ROCm/clr commit: 175ad024d3]
 2022-07-12 12:41:02 -04:00
Chauncey Hui cca9d223ae SWDEV-2 - Change OpenCL version number from 3482 to 3483 
[ROCm/clr commit: 46b9430a4e]
 2022-07-12 03:00:04 -04:00
Rakesh Roy f908a695fd SWDEV-344168 - Fix hipMemsetAsync API crash 
- Make sure head_size is not crossing fill_size
- Head size, aligned size & tail size together cannot cross fill size

Change-Id: Ie7845d748e3698b245876b43c9e626d7ea7154f7


[ROCm/clr commit: 13ede1a17e]
 2022-07-11 00:10:17 -04:00
Chauncey Hui 88d711861f SWDEV-2 - Change OpenCL version number from 3481 to 3482 
[ROCm/clr commit: 66dfe5b37a]
 2022-07-09 03:00:06 -04:00
Saleel Kudchadker 7fd80925cd SWDEV-335626 - Use ROCr copy for IPC 
Detect IPC buffer and use ROCr copy api instead of blit

Change-Id: Ie6bdd6fc45dbd7457611011d81570b53d5fd5276


[ROCm/clr commit: faaa41aab8]
 2022-07-08 13:32:19 -04:00
Chauncey Hui f58725904c SWDEV-2 - Change OpenCL version number from 3480 to 3481 
[ROCm/clr commit: a3d1645080]
 2022-07-08 03:00:06 -04:00
German Andryeyev 685104cefc SWDEV-329789 - Avoid a race condition with the last command 
Runtime can reset the last command only if it didn't change
since the query at the beginning of finish()

Change-Id: I629f2d788e9bbaa17ca4e96b1a753f8131e32463


[ROCm/clr commit: 9e74f1c7f8]
 2022-07-07 10:17:07 -04:00
Chauncey Hui dd6af4295c SWDEV-2 - Change OpenCL version number from 3479 to 3480 
[ROCm/clr commit: a4206feda3]
 2022-07-07 03:00:05 -04:00
kjayapra-amd dafc544279 SWDEV-344950 - Enable gfx1100 and gfx1102 on ROCm backend. 
Change-Id: Ic559a804e6d504b73a7cea4aba086790956ee018


[ROCm/clr commit: e2b49690f2]
 2022-07-05 20:25:42 -07:00
Chauncey Hui 102f8d46ed SWDEV-2 - Change OpenCL version number from 3478 to 3479 
[ROCm/clr commit: 0e461935ac]
 2022-07-01 03:00:07 -04:00
German Andryeyev 110e3e68a0 SWDEV-340703 - Use different status value for the callback event 
Change-Id: Ida725df53abfbf348b18e24c19edf011dc9192dd


[ROCm/clr commit: 6844b8c7e0]
 2022-06-30 11:03:02 -04:00
German Andryeyev 34ed734a66 SWDEV-344280 - Use coarse grain sysmem for kernel arg on MI200 
Change-Id: I9596f0e8b88699538ec271b3a4345e5f75b968e3


[ROCm/clr commit: d8e4a289b3]
 2022-06-29 13:04:46 -04:00
Chauncey Hui f08c370915 SWDEV-2 - Change OpenCL version number from 3477 to 3478 
[ROCm/clr commit: 942c4b3547]
 2022-06-28 03:00:05 -04:00
Christophe Paquot 65c8c0a722 SWDEV-322620 - Virtual Memory Management 
Expose VM granularity

Change-Id: Ia6af99843ca957f1139fd369e46e09a6c346da46


[ROCm/clr commit: 4aecc29bf0]
 2022-06-27 13:07:43 -07:00
Chauncey Hui 3bd48513f1 SWDEV-2 - Change OpenCL version number from 3476 to 3477 
[ROCm/clr commit: 774c05eeb1]
 2022-06-25 03:00:06 -04:00
haoyuan2 1499630fb7 SWDEV-343162 - fix OCL test regression 
For OCL, keep original control logic
FOr HIP, keep the fix for SWDEV-338781

Change-Id: I89de8d1e73cd103b3b4f62206eed72d45695dd6e


[ROCm/clr commit: 0a43f6bff3]
 2022-06-24 13:23:10 -04:00
Chauncey Hui 6c00bd5eeb SWDEV-2 - Change OpenCL version number from 3475 to 3476 
[ROCm/clr commit: 9504e95184]
 2022-06-24 03:00:07 -04:00
Ajay 6596275caf SWDEV-337331 - command queue logs for debugging option 
Change-Id: I198aecc5fd12369d87d4acc9910acc9435c1967a


[ROCm/clr commit: 236178d0d4]
 2022-06-22 19:41:38 +00:00
Chauncey Hui 8517632ad8 SWDEV-2 - Change OpenCL version number from 3474 to 3475 
[ROCm/clr commit: 4fe8038b7c]
 2022-06-18 03:00:06 -04:00
Jaydeep e146b7812e SWDEV-332607 - If pitch returned from hipMallocPitch is equal to pitch passed to hipMemset2D then height passed to hipMemset2D must be less than or equal to height passed to hipMallocPitch. 
Change-Id: I8d9b0938fb592170008aaec9cedd519bf40c6201


[ROCm/clr commit: ea0590d1fe]
 2022-06-17 10:35:22 -04:00
Rakesh Roy 813128436d SWDEV-330455 - Avoid creating different HSA signals for ROCr 
- In ROCr, there is supposed to be exactly one HSA signal ever whose pointer is stored in every hostcall buffer so that device code can find it
- But, hostcallListener->initDevice creates a new HSA signal everytime enableHostcalls() gets called

Change-Id: I100595ec37442bcdb73da5991062f0a474de2935


[ROCm/clr commit: 42da508815]
 2022-06-17 05:30:57 -04:00
Chauncey Hui 784539891c SWDEV-2 - Change OpenCL version number from 3473 to 3474 
[ROCm/clr commit: 3223c1b56a]
 2022-06-17 03:00:08 -04:00
Sarbojit Sarkar 8f863abe02 SWDEV-325379 - Fix for remote copy crash 
Change-Id: I22152c0b3538cf7cfc80f82505bc255c01d98f7b


[ROCm/clr commit: 356e22f910]
 2022-06-16 23:59:11 -04:00
German Andryeyev 14f03b4571 SWDEV-341316 - Copy image SRD only if it's valid 
Change-Id: I971a21fe99fd07b21cfd3dbe4e7ed33c0ea322f4


[ROCm/clr commit: 73ec7bada6]
 2022-06-16 09:18:04 -04:00
kjayapra-amd 8e43fcc5df SWDEV-339913 - Move SingleFPDenorm under ASIC Revision from GFXIP switch case. 
Change-Id: I7826f81bdf7cf1479882f261d495c2c287725b3c


[ROCm/clr commit: 3a78a1edcd]
 2022-06-16 08:31:37 -04:00
Chauncey Hui 07a15d664e SWDEV-2 - Change OpenCL version number from 3472 to 3473 
[ROCm/clr commit: 0cd8e18cb3]
 2022-06-16 03:00:06 -04:00
haoyuan2 8126f235e2 SWDEV-338781 - fix blender crash issue on Navi1x 
remove incorrect control logic which caused seg fault on Navi1x

Change-Id: Ic56e8a73c53062bd86adcf57d0b66e00e21734ec


[ROCm/clr commit: 6937fcae3a]
 2022-06-15 10:54:57 -04:00
Chauncey Hui 67fea7365d SWDEV-2 - Change OpenCL version number from 3471 to 3472 
[ROCm/clr commit: f897a01278]
 2022-06-15 03:00:08 -04:00
Saleel Kudchadker b3ad41f6e4 SWDEV-335780 - Indicate if handler is queued 
Maintain status of handler callback. For event records we no longer
submit callbacks to reduce the load on the async handler thread. However
without a callback we leak command memory/decrement refcounts. Indicate
status of the handler which we can use to queue a callback when
finish is called.

Change-Id: I89fd02f3d047a0e8162664ee17581a14795f1928


[ROCm/clr commit: 5df34a2f7a]
 2022-06-14 20:55:06 -04:00
German Andryeyev acf2856677 SWDEV-339296 - Delay hidden heap allocation till the usage 
Move hidden heap creation to the kernel launch to make sure it's
allocated on the actual first usage.

Change-Id: I1b65a82fc06d9129ed45a69765bf14ea3d945b04


[ROCm/clr commit: 4975f69337]
 2022-06-14 12:18:34 -04:00
German Andryeyev 2b3296a4ef SWDEV-259998 - Change the location of RGP init calls 
Move StartLateDeviceInit() and FinishDeviceInit() calls in RGP
server to avoid a timeout

Change-Id: Ifd681859c7dc76259d7296aa8cc15305d563c9b2


[ROCm/clr commit: ecea224bcf]
 2022-06-13 18:05:44 -04:00
Chauncey Hui c07ca3d681 SWDEV-2 - Change OpenCL version number from 3470 to 3471 
[ROCm/clr commit: ad9300b47b]
 2022-06-11 03:00:05 -04:00
Christophe Paquot dc2aab85b2 SWDEV-322620 - Virtual Memory Management 
Introducing a VirtualMemObj map as it is needed to differentiate
between virtual address ranges and actual physical memory
This is because a whole VA range can have several physical memories
as chunks.

Change-Id: Ie2a972b4faf3f7d552cfa53e77898f80ad75740a


[ROCm/clr commit: 905088e4e7]
 2022-06-06 11:32:22 -07:00
Chauncey Hui d08bc8107c SWDEV-2 - Change OpenCL version number from 3469 to 3470 
[ROCm/clr commit: 58aaa8472e]
 2022-06-01 03:00:07 -04:00
neqochan 996e8ea2b3 SWDEV-1 - Fix illegal atomic initialization 
See https://stackoverflow.com/a/21710850 for an extensive discussion.

This is a cherry-pick from a github pull request:
https://github.com/ROCm-Developer-Tools/ROCclr/pull/29

Change-Id: I87a58548d2995ab51a7cd6e684b5442e5b300923


[ROCm/clr commit: ebfa343827]
 2022-05-31 09:51:44 -04:00
Chauncey Hui 2f46f23b66 SWDEV-2 - Change OpenCL version number from 3468 to 3469 
[ROCm/clr commit: 5f0b129e26]
 2022-05-21 03:00:05 -04:00
German Andryeyev df01016c97 SWDEV-336024 - Clear device heap to 0 in ROCr path 
Change-Id: Id100ca6d6d5bd7fb16ca8c98ff0b12c9df1d69ab


[ROCm/clr commit: 830898753d]
 2022-05-20 11:51:08 -04:00
Chauncey Hui d9722102c0 SWDEV-2 - Change OpenCL version number from 3467 to 3468 
[ROCm/clr commit: 4aee5e21fb]
 2022-05-20 03:00:10 -04:00
German Andryeyev 0ecf22bb53 SWDEV-336024 - Clear device heap to 0 
This reverts commit 8624574866.

Reason for revert: Fix regressions

Change-Id: I7d883e1c3cbd27bb64b581ec800243ad7dfe24fd


[ROCm/clr commit: 07c1b9a998]
 2022-05-19 09:10:08 -04:00
Jason Tang c5495a181c SWDEV-1 - Remove unused code. 
To fix Linux hsail build error.

Change-Id: I4cab060e0e8cefb4215cefa61b840a94d51748a4


[ROCm/clr commit: c7000b4f6f]
 2022-05-19 08:54:15 -04:00
Chauncey Hui 826e3ad08d SWDEV-2 - Change OpenCL version number from 3466 to 3467 
[ROCm/clr commit: 0ed1a369fe]
 2022-05-19 03:00:05 -04:00
Sarbojit Sarkar ee5bcf6444 SWDEV-331066 - support for LimitStackSize 
Change-Id: Ie6ae74f008b4f72de83663194aafb0ebdddfc8b6


[ROCm/clr commit: 51a00aeefe]
 2022-05-19 00:24:06 -04:00
Chauncey Hui 11335d2146 SWDEV-2 - Change OpenCL version number from 3465 to 3466 
[ROCm/clr commit: ef041e81b1]
 2022-05-18 03:00:06 -04:00
German Andryeyev fd78a0d797 SWDEV-334315 - Correct instruction timing API info 
Change-Id: I9d291adac076d36776dc7316b411bd093230ca01


[ROCm/clr commit: f0309be0de]
 2022-05-17 10:17:07 -04:00