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Автор SHA1 Сообщение Дата
Laurent Morichetti b2cb6bca96 Include <errno.h> for EBUSY
Change-Id: I9fa3417445866f3ce37af2169f623afa8e92e873


[ROCm/ROCR-Runtime commit: 0f05ef73ac]
2017-08-31 07:32:51 -07:00
Chris Freehill af02d06972 Async mem. copy test with NUMA awareness
Change-Id: If655ac4c087be2d379e868aad83812f2437d78b9


[ROCm/ROCR-Runtime commit: 92e46584f8]
2017-08-30 21:35:37 -04:00
Amber Lin 2506a31248 Revert "Set guard page as disabled as default"
This reverts commit 4d839c4dc6.

Change-Id: I09b7e7915ec4759cab57d5863089a2c4a44dfacd
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: a74f6896ea]
2017-08-30 10:48:23 -04:00
Amber Lin 13282b9115 Fix mmap when the count reaches the max
Applications may try to allocate lots host memory and reaches the mmap
limit (/proc/sys/vm/max_map_count). When Applications fails to allocate
memory and calls hsaKmtFreeMemory to release the memory, Thunk fails to
reduce the maps count so the following hsaKmtAllocMemory calls continue
to fail, which doesn't make sense to the application. This patch checks
the mmap to NORESERVE return value. If it fails and the error number is
ENOMEM, reduce the map count by munmap and map it again immediately.



Change-Id: I127cb479dfd86b199172eef269d59426f23859ea
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: a81b29890c]
2017-08-29 11:47:29 -04:00
Felix Kuehling 7e59d7d5de Generalize size-dependent virtual address alignment
Support all fragment sizes up to 2MB by aligning buffers according
to their size.

Change-Id: I82b7ef8be6f1507d941e5c97edb6618adf8c66de
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 52598cf37e]
2017-08-28 15:01:33 -04:00
Ramesh Errabolu 39f0c3e821 Add Iommu Perf Cntrs
Change-Id: I1cf3f00a959a923462634a62263707a267ae18af


[ROCm/ROCR-Runtime commit: 3980b4268b]
2017-08-28 12:57:11 -05:00
Amber Lin 4d839c4dc6 Set guard page as disabled as default
Due to max_mmap_count issue, set default of guard page as disabled.


Change-Id: Ic9dfe69b621733e9fac86831b008a122994a67e7
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: 65d680c035]
2017-08-24 16:27:52 -04:00
Felix Kuehling cec34b9c10 Fix two more device ID array bugs
Use the mapped_device_id_array size when allocating temp_node_id_array
for unmapping queues in fmm_map_to_gpu_nodes. registered_device_id_array
size may be 0. Also, this temporary array is small enough to allocate it
on the stack. Malloc and free are overkill here.

Fix potential memory leak when registering the same device ID array
multiple times.

Change-Id: I83f09fd0925d9de7cf11bf72ba0ebb77273f587d
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 395ecaa985]
2017-08-24 13:31:25 -04:00
Evgeny e18c7098a3 aqlprofile api: adding gfx8 mc counters
Change-Id: I84dc06c24b7961dfe665cf7e2ae6cc9ae3b7326b


[ROCm/ROCR-Runtime commit: 09c732c2f9]
2017-08-23 15:23:05 -05:00
Amber Lin 9ab8250fbc IOMMU path in sysfs is renamed
IOMMU path in sysfs was amd_iommu. After implementing multiple devices
support, the path is replaced with amd_iommu_<index>. Current Thunk spec
is not clear about how to support multiple instances in one block. There
is no products having multiple IOMMUs yet at this point. This patch
changes the path to support both amd_iommu and amd_iommu_0 for Carizo.

Change-Id: I3beea2fc78d96296232226191501a02ccf20d6b1
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: 369902bf5b]
2017-08-23 14:00:49 -04:00
Amber Lin a885ad3724 Add debugging message on memory
Add pr_debug to all memory APIs and pr_err to some failure cases.

Change-Id: I8b519a1228cc19e6c04118fd87432e7f48f3cbf9
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: 73707766ef]
2017-08-22 09:55:20 -04:00
Sean Keely 4ff7a53721 Correct vm_fault signal cleanup.
Change-Id: Id2f14b911e3991a76771425bc09f38a613280e6b


[ROCm/ROCR-Runtime commit: 0cb1e8cb35]
2017-08-18 22:12:38 -04:00
Harish Kasiviswanathan 7f7eebab6d Fix hsaKmtQueryPointerInfo for scratch memory
Change-Id: I35a0f1a81f8b0ac6e99c2e1572829eb32d3bc95b
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: 00250f7686]
2017-08-18 17:01:31 -04:00
Chris Freehill 90b3fee7f5 Remove dependency on hsa-runtime-tools
Change-Id: Ic4ce2bcbf1176e7eb859db39f21e7185691837e1


[ROCm/ROCR-Runtime commit: c85322d93d]
2017-08-17 15:39:35 -04:00
Amber Lin 951796c73d Simplify memory maps
Simplify fmm_map_to_gpu_nodes code. Also fix a memory leak in this change.

Change-Id: I3487338b78c915de44588d0206bac4c53e728c60
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: f1a5248cf2]
2017-08-15 17:34:30 -04:00
Evgeny 1fcbd14d89 AqlProfile API, commenting out hanging GFX9 blocks, ATC, GCEA, RPB
Change-Id: I411fb33f77c9538ca236b9b6b09c7dfe75220c02


[ROCm/ROCR-Runtime commit: fb4afca8c3]
2017-08-15 12:44:00 -05:00
Sean Keely 468313f9b5 Simplify pointer info version check.
Change-Id: I0ed363f1261ffc041547f313970ca67298ace56c


[ROCm/ROCR-Runtime commit: dec5c52e07]
2017-08-12 03:14:39 -04:00
Sean Keely 546c179cfc Initial IPC signal support.
Added an API for creating signals with attributes.
Added two APIs for IPC operations on signals.
Initial use of exceptions for error handling.

Add ref counting to signals.
Removed spin loops from signal destructors.
Signals are no longer to be destroyed with delete, use DeleteSignal instead.
Added delete safety to doorbells.
Added secondary hsa_signal_t -> Signal* translation path for IPC enabled signals.

Change-Id: Id59065d002f0c2566b0a9425694da2ed27cb7d7f


[ROCm/ROCR-Runtime commit: c9642cf7af]
2017-08-11 18:41:34 -05:00
Sean Keely 550547f404 Initial exception support for signals.
Also separate signal ABI block allocations from the runtime interface object.

Change-Id: If16763338db664f29163a1348f8f4c38cf0597b2


[ROCm/ROCR-Runtime commit: 2732b18092]
2017-08-11 18:41:34 -05:00
Sean Keely 76e67099b3 Update ipc test to use IPC signals.
Change-Id: Id5984093de45b08261d3196cc6fc3d597324edf4


[ROCm/ROCR-Runtime commit: d6acd0edfc]
2017-08-11 17:29:55 -04:00
Evgeny ce72ce0c92 adding aqlprofile member to HsaApiTable
Change-Id: Id674186dfa2e83295a51f770ccc0400f1cb51a98


[ROCm/ROCR-Runtime commit: 287afd3a52]
2017-08-09 16:09:39 -05:00
Felix Kuehling 3f12312b4f Changes to run on old kernels
Fall back to older apertures API and old events page size if the new APIs
fail. This allows running on current upstream kernels (with only minor
fixes) on gfx801 and enables testing of further changes during upstreaming.

Change-Id: I9d86d4f576e52fcbb5bc158d80f1bf41261e4e87
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 78e683acf4]
2017-08-09 16:12:54 -04:00
Evgeny 200067f1be Adding HSA_API macro to the API method declarations to be consistent with other HSA header files, TCS removing
Change-Id: Ic217d3b2bdbb22d3600c5ecaacb7ab53bf26096a


[ROCm/ROCR-Runtime commit: 4824a2db0b]
2017-08-08 10:46:12 -04:00
Chris Freehill e16e5fb048 Remove build of non-existent project
Change-Id: I6b2c59e67c2d2a320e705b725f8c779b9913759a


[ROCm/ROCR-Runtime commit: 783a28b68c]
2017-08-08 10:03:36 -04:00
Evgeny c0c32288ac aqlprofile block list, explicit numbers assigned, IA removed
Change-Id: I9f9358f8e03e13eb81845de2e33dd5f3da27811a


[ROCm/ROCR-Runtime commit: 47322942b3]
2017-08-03 11:39:21 -04:00
Yong Zhao 40cdf91bad Add gfx902 support
Change-Id: Iefc6d1bea0d1d2ea8768867c53f16cdf1279d38f
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>


[ROCm/ROCR-Runtime commit: d0e2872011]
2017-08-03 10:27:56 -04:00
Evgeny d224dc274f aql-profile api: reducing blocks list to compute only and new gfx9 blocks
Change-Id: Ib506b82ea407afec4f5d4bcad755d4d57b92e34b


[ROCm/ROCR-Runtime commit: c66f68041c]
2017-08-02 12:21:24 -04:00
ozeng 2b80ccdd65 CMakeLists changes to make thunk buildable on CentOS 6.9
Removed Werror CFLAGS for lower version of gcc. there
will be some warning message on lower gcc version but build
is ok.

Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>

Change-Id: Icf556625cb870c4ad73e1d89f3d4ade3a96e821f


[ROCm/ROCR-Runtime commit: 8176830577]
2017-08-01 12:06:05 -04:00
Chris Freehill aca0282c61 Clearer/more concise variable names
Change-Id: Ib92211977066b728f19b2a7fe40639160a8262b3


[ROCm/ROCR-Runtime commit: ab2248132a]
2017-08-01 10:38:26 -05:00
Chris Freehill 9aae431f6d Added max. single mem. allocation test.
Change-Id: Ie81c6af0502fde56225b1e197801cf04b474feb2


[ROCm/ROCR-Runtime commit: cf24f7bb78]
2017-07-31 12:04:55 -05:00
James Edwards 21f920f6f4 Add back GNU Makefiles.
Change-Id: I4a367655a905a85d4c29980aa2da8ac28db73d10


[ROCm/ROCR-Runtime commit: 2c2de075a9]
2017-07-30 08:21:35 -05:00
Chris Freehill b39089e54c Reorganize tests
Change-Id: I45f92d61070b325bcb57bd72e4a68e7d6495463c


[ROCm/ROCR-Runtime commit: bddc89e703]
2017-07-28 11:32:20 -04:00
hthangir ea88523fc7 Fix compilation issue reported with GLIBC 2.12 (RHEL 6.9)
Change-Id: I770b72ba1d61475a76aa72d0c52ebfb380db6019


[ROCm/ROCR-Runtime commit: 9ee0108e58]
2017-07-28 11:11:01 -04:00
Chris Freehill 9443b47a53 Update tests to use rocm-smi
Change-Id: Ia4692019460f4ba42a12ecba1f9e59576561c73e


[ROCm/ROCR-Runtime commit: a055531eb4]
2017-07-28 08:34:27 -04:00
Harish Kasiviswanathan faa5102340 Support IPC sharing of non paged system memory
Non paged system memory is allocated with node id 0. However, since a
gpu node is required for allocating system memory via KFD, the first
dgpu is used. In hsaKmtShareMemory() if system memory use the same
(first) dgpu.

Change-Id: I85789a89a4e4f7888e3826826401ea89ce4d1718
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: 186527d0b7]
2017-07-26 10:17:07 -04:00
Harish Kasiviswanathan 8581bb285d Fix inconsistent calling of validate_nodeid
Change-Id: I3e8e65a5629059abdde89832b619cd8bf1f2b36c
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: 20f0de71df]
2017-07-26 10:17:07 -04:00
Chris Freehill 3e458ed991 Add rocm-smi c++ utility classes
Change-Id: I4362151abf84f89942bf2895b45fca498a28dfc9


[ROCm/ROCR-Runtime commit: 8424fd6f23]
2017-07-25 00:42:34 -04:00
Amber Lin 391d9ee403 Workaround cpuid issue under Valgrind
Topology uses cpuid to get CPU cache information. However when running
under Valgrind, data returned from cpuid are not from the processor we set
affinity to. Instead they are all from one specific processor. For a quick
workaround so other teams can continue their work, this patch will report
CPU cache from that specific processor and ignore others.

Change-Id: I5cfac2329dac277f3dbde1be92fa26e085465401
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: e46743b1dd]
2017-07-24 12:04:17 -04:00
Felix Kuehling 4a241a9d5f Update image alignment to 256KB
Needed for some tiling formats.

Change-Id: Icd460edaa77ccbeb3c98bc74b574ca5517db22af
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: d563e2cb1d]
2017-07-20 21:03:31 -04:00
James Edwards 40efa7d948 Update README.md to include new build instructions.
Change-Id: I72ca67d3016c99682cfe745bfd74c722ea181a61


[ROCm/ROCR-Runtime commit: ee22d80760]
2017-07-20 09:17:54 -05:00
James Edwards c310a3c99b Final changes to roct CMakeLists.txt file for devel package.
Change-Id: Ie0ce0c5cd8e7811f67e92439d1df1612eabefdfa


[ROCm/ROCR-Runtime commit: e93d3de0a1]
2017-07-19 17:16:17 -05:00
James Edwards 954975f452 Update the ROCt CMakeList.txt files to build both runtime and devel packages.
Change-Id: I01b6e4e5db91dd5f56ffea54c548e10f1f4aae5d


[ROCm/ROCR-Runtime commit: a1353acd85]
2017-07-19 01:16:13 -04:00
Felix Kuehling 0d145b951a Make HSA_DISABLE_CACHE work on gfx900
Change-Id: I624390bfa70b2ff4cefd1bbdf8d960b7121f22bb
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: c48ff6b482]
2017-07-17 15:13:52 -04:00
Felix Kuehling 0c811652ff Align large buffers to BigK or huge-page boundary
This should allow us to take advantage of BigK fragments and huge pages
and improve TLB efficiency for VRAM allocations. Huge pages only work
with 4-level page tables (gfx900 and up). BigK fragments work on older
GPUs.

Change-Id: I02e1fbf74de554e16fdaf44e44d03b47df45c3b0
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: c7bd7733e5]
2017-07-17 12:04:05 -04:00
Chris Freehill bcd0bd4e38 Added dispatch time, async copy and test template rocrtst tests
Change-Id: I57a844ee65c36bd61616ee6d60d358303f51db56


[ROCm/ROCR-Runtime commit: a12c5628ea]
2017-07-17 10:30:26 -05:00
Felix Kuehling 838f639b73 Align imported graphics buffers
Imported graphics buffers are most likely images. Align them for
tiled image access. 64KB seems to do the trick.

This fixes VM faults with OpenCL graphics interop.

Change-Id: I7f60e205d93fff9407e0d00d3dbb02cc4990b863
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: dc2c52be78]
2017-07-17 11:19:08 -04:00
Evgeny 4648eb66fd moving hsa-amd-aqlprofile to ssh://gerritgit/hsa/ec/aqlprofile
Change-Id: Ic42752ca41f877db02aa5a5d8d617cd67cce8956


[ROCm/ROCR-Runtime commit: 08d5efe29d]
2017-07-14 14:59:42 -05:00
Evgeny b6d71a8fe6 hsa_ven_amd_aqlprofile.h: include <hsa.h> fix
Change-Id: Idfd2fdde112d502d4b4a3365512ec601f7e56a5b


[ROCm/ROCR-Runtime commit: ab67b8511b]
2017-07-12 15:43:58 -05:00
Sean Keely dd8804d7ad Remove use of anonymous member in C builds.
Tools/CodeXL will retain older versions of structs if them need them.

Change-Id: I568d7b445778dd575ef71000b4b839300572288e


[ROCm/ROCR-Runtime commit: a0a3587345]
2017-07-12 16:40:00 -04:00
Sean Keely 41ab59b1e7 Fix queue interception in tools.
1. Correct amd::AqlQueue::ExecutePM4 to support interception.
2. Minor fixes to AqlPacket and SoftCP.
3. Minimal change to disable interception of runtime internal queues.

Change-Id: I103fece2ebf9a188d27f01e61221c737405d7253


[ROCm/ROCR-Runtime commit: bc0bd00746]
2017-07-12 16:39:43 -04:00