Graphe des révisions

9 Révisions

Auteur SHA1 Message Date
foreman 239faab75e P4 to Git Change 1079952 by yaxunl@yaxunl_stg_win50 on 2014/09/23 12:31:16
ECR #377625 - Workaround for Blender performance issue. Lower available VGPRs to improve waves per CU.

	Added BuildOptsAppend to OCL app profile.
	Read BuildOptsAppend and append to build options.
	Added specific wave optimization option for Blender.

Affected files ...

... //depot/stg/opencl/drivers/opencl/appprofiles/oclappprofile.xml#7 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/backends/gpu/scwrapper/SI/scCompileSI.cpp#45 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/OPTIONS.def#116 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/appprofile.cpp#10 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/appprofile.hpp#8 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/device.cpp#170 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/device.hpp#230 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpuappprofile.cpp#10 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpuappprofile.hpp#6 edit
... //depot/stg/opencl/drivers/opencl/runtime/platform/program.cpp#63 edit


[ROCm/clr commit: 16f8ca9aae]
2014-09-23 12:44:50 -04:00
foreman 10a5371f59 P4 to Git Change 1078026 by yaxunl@yaxunl_stg_win50 on 2014/09/17 21:51:23
EPR #402000 - Add option to control SC reg alloc strategy.

	[CQE OCL][Perf][QR] ~6-7% perf drop in CompuCL Benchmark (Graphics: T-Rex subtest).

Affected files ...

... //depot/stg/opencl/drivers/opencl/compiler/lib/backends/gpu/scwrapper/SI/scStateSI.cpp#25 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/OPTIONS.def#115 edit


[ROCm/clr commit: 478f10bc24]
2014-09-17 21:58:55 -04:00
foreman b3a2e596d3 P4 to Git Change 1077642 by yaxunl@yaxunl_stg_win50 on 2014/09/16 23:00:53
EPR #402000 - [CQE OCL][Perf][QR] ~6-7% perf drop in CompuCL Benchmark (Graphics: T-Rex subtest).

	Add option to disable SC merge memory loads and stores. By default it is disabled. Will decide whether to enable it by default after performance runs.
	cherrypick 1076590 and CL#1077419 from sc stg for adding option in sc.

Affected files ...

... //depot/stg/opencl/drivers/opencl/compiler/lib/backends/gpu/sc/Interface/SCCommon.h#42 integrate
... //depot/stg/opencl/drivers/opencl/compiler/lib/backends/gpu/sc/Src/CompilerBase.cpp#51 integrate
... //depot/stg/opencl/drivers/opencl/compiler/lib/backends/gpu/sc/Src/CompilerBase.hpp#35 integrate
... //depot/stg/opencl/drivers/opencl/compiler/lib/backends/gpu/sc/Src/HwUtils.cpp#36 integrate
... //depot/stg/opencl/drivers/opencl/compiler/lib/backends/gpu/scwrapper/scState.cpp#32 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/OPTIONS.def#114 edit


[ROCm/clr commit: a49ebf6f6e]
2014-09-16 23:14:51 -04:00
foreman 7cafd57a3f P4 to Git Change 1075489 by marsenau@marsenau_ma on 2014/09/10 15:05:23
EPR #405194 - Change unroll threshold to LLVM default to partially work around Linpack performance problem.

	Prior to CL 1058428, which increased the unroll threshold to 200, this was only 100 which is lower than the LLVM default. Linpack's new ISA has increased register usage, but decreasing the unroll threshold to the previous level does not reduce the register count to its previous level. The increased register usage is probably a new SC problem, so this should probably be increased again in the future. There is no change in register usage with 100 vs. 150 on Linpack.

Affected files ...

... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/OPTIONS.def#113 edit


[ROCm/clr commit: d5f7502ca8]
2014-09-10 15:52:30 -04:00
foreman 7c5ee80511 P4 to Git Change 1075322 by smekhano@rampitec-HSA on 2014/09/10 11:07:04
ECR #333756 - HSA Finalizer: added runtime option to force buffer instructions for global access
	This can be used under ORCA RT.

	Testing: smoke, smoke_clang, precheckin, clbas dgemm
	Reviewed by Nikolay Haustov

Affected files ...

... //depot/stg/opencl/drivers/opencl/compiler/lib/backends/gpu/scwrapper/SI/scStateSI.cpp#24 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/OPTIONS.def#112 edit


[ROCm/clr commit: d35be99f01]
2014-09-10 11:25:14 -04:00
foreman 649664914e P4 to Git Change 1058428 by marsenau@marsenau_cl on 2014/07/23 14:39:25
ECR #304775 - Bug 10112 - Raise default unroll threshold. The current default is 100, which is even lower than the LLVM default of 150. Increasing to 200 is a modest increase, and this should probably be even higher.

Affected files ...

... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/OPTIONS.def#111 edit


[ROCm/clr commit: 2c5424663c]
2014-07-23 15:19:00 -04:00
foreman a17dac4537 P4 to Git Change 1055410 by emankov@em-hsa-amd on 2014/07/15 14:22:48
ECR #333753 - Compiler Lib: -print-compile-phases option is added

	Testing: smoke, smoke_clang, pre check-in

	Reviewers: Brian Sumner, Leonid Lobachev

Affected files ...

... //depot/stg/opencl/drivers/opencl/compiler/lib/backends/common/v0_8/if_acl.cpp#37 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/OPTIONS.def#110 edit


[ROCm/clr commit: b555ae7f64]
2014-07-15 15:00:01 -04:00
foreman 0d2632da70 P4 to Git Change 1055292 by yaxunl@yaxunl_stg_win50 on 2014/07/15 10:23:56
EPR #389586 - Add workaround for VI SPI SGPR initialization hardware bug for HSAIL path.

	There is a hardware bug in VI (UBTS502672) which requires a workaround. Compute shaders need to tell shader compiler the available sGPR is 78 and set sGPUR usage in the compiled ISA to be 94. It has been done in AMDIL path but not done in HSAIL path. This change will apply the workaround to HSAIL path.

Affected files ...

... //depot/stg/opencl/drivers/opencl/compiler/lib/backends/gpu/scwrapper/SI/devStateSI.cpp#16 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/backends/gpu/scwrapper/SI/devStateSI.h#11 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/backends/gpu/scwrapper/SI/scCompileSI.cpp#41 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/OPTIONS.def#109 edit


[ROCm/clr commit: 1abfb8b305]
2014-07-15 10:29:49 -04:00
foreman f80f2f233c initial commit
[ROCm/clr commit: 3694ab2ce8]
2014-07-04 16:17:05 -04:00