Use HSA_AMD_SVM_ATTRIB_AGENT_ACCESSIBLE flag for the initial
allocation instead of HSA_AMD_SVM_ATTRIB_AGENT_ACCESSIBLE_IN_PLACE.
Change-Id: Ia52fe205563df1ea916dc2dc81e749e11c16f83d
[ROCm/clr commit: 9b3072ae12]
This fixes an issue in hostcall when processing printf of a C string.
The calculation to round-up the string size to the next data chunk
didn't include the extra byte for the null terminating character.
Change-Id: I4cf0c250fa4fda253b0db15be461819ffce76d32
[ROCm/clr commit: 8341fd31d1]
This addresses the rocprof hang seen with direct dispatch. The
workaround queues the handler back if any of the signal value in the batch
is not decremented. To rememmber the last position in the list, we save
the parsed command in the current timestamp struct.
Change-Id: I02959e463cfe3cee83c54808ffd6e6f48f43b4e8
[ROCm/clr commit: e5e635f9bf]
HIP should be built with HSAIL support disabled.
Currently HSAILProgram::info() and VirtualGPU::buildKernelInfo() expose
ACL interfaces directly. This should not be allowed.
Change-Id: Iae15d4f19be16806826f2f6cb600752c11f97fc1
[ROCm/clr commit: bbe6246f19]
hipIpcOpenMemHandle should return the device pointer which is
similar to the base ptr of the original allocation even if the offset
to the original pointer is passed to hipIpcGetMemHandle
Change-Id: I99c0553e8c67c15b5fed880b6a4c74bce39c3aee
[ROCm/clr commit: 88fca7bf9e]
Device enqueue has an option to execute scheduler on the current
queue and it's enabled by default. Make sure scratch is allocated
on the current queue for that case. Add max vgpr tracking per
program to adjust scratch size accordingly.
Change-Id: I2a6d796913a4551a1e7f343a2465d589eec60d8a
[ROCm/clr commit: e553b2763a]
MT doesn't use GPU waits, but CPU for sync between engines.
Change the threshold values for CPU waits for direct dispatch.
That will bring behavior closer to MT.
Change-Id: Ia41c3cb812614962aff2746b6cf858f1bf77dda2
[ROCm/clr commit: ca2ea70a6c]
Enabling both LC and HSAIL will cause the DYN macro to be redefined.
Rename it for each compiler to avoid name clashing.
Change-Id: I607f022f37c4d05bef4e3a8070d19bd3659d7bc2
[ROCm/clr commit: b771377665]
This change makes HSAIL usage similar to that of Comgr. By default, the
runtime will statically link against it, however if HSAIL_DYN_DLL is
defined, then the runtime will try to dynamically load HSAIL.
Currently stick to statically linking to HSAIL. In a feature patch the
dynamic loading behaviour will be enabled.
Change-Id: I6a78a4375975cf847f236b200404c8cf941d012b
[ROCm/clr commit: c7b50bb890]
In adition to removing the HSAIL logic from the ROCm backend, guard all
of the HSAIL includes in the common layer behind the WITH_COMPILER_LIB
define. This is to avoid including HSAIL headers when building with
no support for it.
In common logic replace the use of the aclType enum with the new
Program::file_type_t enum. This is essentially a local copy of the HSAIL
enum to avoid including any HSAIL headers.
Change-Id: Ica0651d1b29dfccc255cc584eb82a5cb35e1b520
[ROCm/clr commit: cbeb372e46]
- Add HSAIL ID for Hawaii as gfx702
- Add HSAIL ID for Renoir without xnack as gfx90c
Fixes: SWDEV-271289, SWDEV-272761
Change-Id: I92cf4619cdfd550462ff8ec3740443ef1e5a5f96
[ROCm/clr commit: 3010cf0a58]
ROC_BARRIER_SYNC will not work with direct dispatch.
Remove and cleanup.
Change-Id: I81368b2e65039477bd0343bb92708dab48867db6
[ROCm/clr commit: aa38af8c96]
The check has to be performed inside the signal loop, because
active signals need to be processed to avoid a stale timestamp
class.
Change-Id: I26af8287aae18eb19c096d9358cd0b86cfd1c561
[ROCm/clr commit: 2d41031aec]
- With direct disaptch profiling state is enabled to trigger the
callback on HSA signal. However ROCr has very low peformance on
the first call to get the profiling info. That impacts some tiny
performance tests.
Change-Id: Idacd1b10a473fcfb5feef3074b7191d35743f769
[ROCm/clr commit: a71f7f931e]
This is part 2 of the change. This is for PAL backend.
The parent buffer sometimes has newer data than the sub buffer or image.
We always need to copy the data into copybuffer in pitch workaround.
Tests:
clinfo
Conformance tests: all images test, info, API, basic.
Internal runtime tests
Change-Id: I97d876ac75b240e69b48244be4c9e522db24f8ac
[ROCm/clr commit: 0de4b2962c]
This is part 2 of the code change for PAL.
The copy image workaround could be recursively used by ROCclr blit kernel.
Avoid such situation by using stack variable.
Tests:
clinfo.
Conformance tests - basic, API, info, and all images tests.
Internal runtime tests - all passed.
Change-Id: I3c822e55398cdf35c2c4a46ed9fc20fbee7cc908
[ROCm/clr commit: 090cf6c6d3]
The copy image workaround could be recursively used by ROCclr blit kernel.
Avoid such situation by using stack variable.
Change-Id: Iadaa8cad9216220194760dd461a9533bb236aea0
[ROCm/clr commit: 2bd1836049]
Ravi C Akkenapally
kjayapra-amd
Jason Tang
German Andryeyev
Siu Chi Chan
Vladislav Sytchenko
Saleel Kudchadker
Brian Sumner
pghafari
Satyanvesh Dittakavi
Sourabh Betigeri
Julia Jiang
Konstantin Zhuravlyov
Sarbojit Sarkar
Todd tiantuo Li
Alex Xie