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13505 커밋

작성자 SHA1 메시지 날짜
systems-assistant[bot] 58d2a016ce Format source code to PEP8 using Ruff (#36)
* added ruff docs

* style: Run ruff and black before yapf pass

* yapf -r -i (23 fixes)

* fixed conf.py and ran ruff format .

* fixed conf.py 2

* formatted argparser.py

* formatted src/rocprof_compute_analyze

* formatted src/rocprof_compute_profile

* formatted soc_base.py

* formatted rocprof_compute_tui

* formatted gui_components

* formatted src/utils

* formatted tests/

* format extra files

* cleanup

* fix test_utils.py

* fixed typos

* Update pyproject.toml

* Update README.md

* Update test_utils.py

---------

Signed-off-by: jamessiddeley-amd <James.Siddeley@amd.com>
Co-authored-by: James Siddeley <James.Siddeley@amd.com>
Co-authored-by: systems-assistant[bot] <systems-assistant[bot]@users.noreply.github.com>
2025-08-08 15:32:30 -04:00
systems-assistant[bot] d3f9ab25eb Use own counter definition (#91)
* Use own counter definition
  * Do not depend on rocprofiler-sdk counter definition

* Add missing counter definitions for MI100, MI200, MI300, MI350 series
  * Counters added based on register specification
  * This prevents some missing metrics

* Enable SQC_DCACHE_INFLIGHT_LEVEL counter and associated metrics

* Enable TCP_TCP_LATENCY counter and associated counter for all GPUs
  except MI300

* Update TCC_EA_* counters for MI100 to TCC_EA0_*
  * Update MI100 metrics which depend on TCC_EA0_* counters

* Enable accumulation counters for MI100

* Improve rocprof list avail usage to get a better idea of supported
  counters

* Update CHANGELOG

* Move accumulation counters to counter definition

---------

Co-authored-by: Vignesh Edithal <Vignesh.Edithal@amd.com>
2025-08-08 14:39:10 -04:00
vedithal-amd 97d9f35033 Fix ctest and docker to work with monorepo (#181)
* Remove .git folder and git command check in cmake

* Update docker container to work in monorepo
    * Update docker container to mount the top level folder in monorepo
2025-08-08 10:26:57 -04:00
Gopesh Bhardwaj 891b07aa5a README update (#120) 2025-08-08 13:27:08 +05:30
systems-assistant[bot] e56ff3716d Fix rocpd memory trace csv output (#166)
Co-authored-by: Srihari Uttanur <srihari.u@amd.com>
Co-authored-by: systems-assistant[bot] <systems-assistant[bot]@users.noreply.github.com>
2025-08-08 13:22:40 +05:30
Ammar ELWazir 8b08c62fd2 Update rocprofiler-sdk-continuous_integration.yml (#191) 2025-08-07 23:11:28 -05:00
Ammar ELWazir 906030caf4 Changing CDash Project (#188)
* Changing CDash Project

* Fixing CI

* Fixing AQLProfile CDash

* Fixing CI

* Fixing CI

* Fixing CI

* Fixing CI

* Fixing CI

* Fixing CI

* Fixing CI

* Fixing CI

* Fixing CI

* Fixing CI

* Fixing CI

* Fixing CI

* Fixing CI

* Fixing CI

* Fixing CI

* Fixing CI

* Fixing CI

* Fixing CI

* Fixing CI
2025-08-07 23:01:25 -05:00
Joseph Macaranas 115a31da70 Migration status update Aug 7 2025-08-07 20:07:46 -04:00
Ammar ELWazir 7b8e1aff89 Runners Update for ROCProfiler SDK (#182) 2025-08-07 16:43:38 -05:00
Ameya Keshava Mallya d1d756a95f Merge remote-tracking branch 'origin/develop' into preserved/aqlprofile 2025-08-07 20:13:24 +00:00
Ameya Keshava Mallya 8aaf146284 Merge remote-tracking branch 'origin/develop' into preserved/rocprofiler-sdk 2025-08-07 20:10:13 +00:00
systems-assistant[bot] 4d21b819ec Merge commit 'def9a3c92d304b1debc20ba3ea0c40524a1b7420' into develop 2025-08-07 18:02:25 +00:00
systems-assistant[bot] 81e7540ddf Merge commit 'e3eb0f71b1542caa1b390d513e372ad76d521391' into develop 2025-08-07 18:02:23 +00:00
systems-assistant[bot] 84ed74e8db Merge commit '926ec4a56f9800637f652a8674c73ae6e3adfdac' into develop 2025-08-07 18:02:22 +00:00
Baraldi, Giovanni 0542860ef8 Adding timestamp marker into SQTT buffer for gfx9 GPUs (#200)
* Adding TS Marker

* Apply suggestions from code review

Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com>

* Add option to enable/disable RT

---------

Co-authored-by: Giovanni Baraldi <gbaraldi@amd.com>
Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com>

[ROCm/aqlprofile commit: 926ec4a56f]
2025-08-07 19:55:04 +02:00
Baraldi, Giovanni 926ec4a56f Adding timestamp marker into SQTT buffer for gfx9 GPUs (#200)
* Adding TS Marker

* Apply suggestions from code review

Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com>

* Add option to enable/disable RT

---------

Co-authored-by: Giovanni Baraldi <gbaraldi@amd.com>
Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com>
2025-08-07 19:55:04 +02:00
cfallows-amd d8d739f57c Re-add rhel8 roofline binaries (#122)
RHEL8 now being supported until EOS, rebuilding rhel8 bins for rocm7 (previously built for rocm7 rhel9).

Remove roofline-rhel9-rocm7, replace with new roofline-rhel8-rocm7.
Update check for roof bin.
Update any doc mentions of rhel min support version back to rhel8.

---------

Signed-off-by: Carrie Fallows <Carrie.Fallows@amd.com>
2025-08-07 12:24:02 -04:00
vedithal-amd 2444c20172 Fix cmake to skip textual_fspicker check (#121) 2025-08-07 11:43:22 -04:00
vedithal-amd 448e5dfbcb Backport ROCm 7.0 changelog (#116)
* Backport changelog from ROCm 7.0 RC3 cherry-pick PR
    * https://github.com/ROCm/rocm-systems/pull/93
2025-08-07 00:13:04 -04:00
systems-assistant[bot] 7ca8a4dac2 Merge commit '48c3ba36ec02c694529b3af00588c76e75e2f509' into develop 2025-08-06 23:01:54 +00:00
systems-assistant[bot] 89c74ac3d3 Update Unit of Bandwidth metrics to Gbps (#96)
* Add Utilization to metric name for Bandwidth related metrics whose Unit
  is Percent

* Update Unit of Bandwidth metrics to Gbps
    * Update metric Formula to use total duration as denominator instead of normalization unit.
    * Update metric Description
    * Update metric Unit

* Update CHANGELOG
2025-08-06 18:39:50 -04:00
Joseph Macaranas a10d897a69 Migration status update Aug 6 2025-08-06 18:37:55 -04:00
Ameya Keshava Mallya dc6450327a Merge remote-tracking branch 'origin/develop' into preserved/rocprofiler-systemsnew1 2025-08-06 21:59:14 +00:00
Ameya Keshava Mallya 90bb0d7f01 Align submodule 'papi' with subrepo at commit 3ce9001d 2025-08-06 21:50:53 +00:00
Vaddireddy, Sushma 223c86076d Fix TCC_EA0_RDREQ_DRAM event ID and enable TCC_BUBBLE counter (#567)
* Event ID fix for TCC_EA0_RDREQ_DRAM

* Adding TCC_BUBBLE

* Adding TCC_BUBBLE Counter

---------

Co-authored-by: Sushma Vaddireddy <svaddire@amd.com>

[ROCm/rocprofiler-sdk commit: 48c3ba36ec]
2025-08-06 14:27:24 -07:00
Vaddireddy, Sushma 48c3ba36ec Fix TCC_EA0_RDREQ_DRAM event ID and enable TCC_BUBBLE counter (#567)
* Event ID fix for TCC_EA0_RDREQ_DRAM

* Adding TCC_BUBBLE

* Adding TCC_BUBBLE Counter

---------

Co-authored-by: Sushma Vaddireddy <svaddire@amd.com>
2025-08-06 14:27:24 -07:00
Sivasuntharampillai, Haresh 31c4559bb0 Fix Workflows 2025-08-06 17:17:28 -04:00
ammallya 87ca69baed Migration of rocprofiler-systems complete 2025-08-06 13:21:15 -07:00
Joseph Macaranas 2148e683e5 Preserve file-path commit histories 2025-08-06 15:36:33 -04:00
amd-hsivasun a399b47760 Update rocprofiler-systems-containers.yml 2025-08-06 15:24:23 -04:00
Daniel Su 9e8c182be5 [Ex CI] create component trigger files (#29) 2025-08-06 13:45:38 -04:00
GabrPham def9a3c92d Applied Copilot suggestions 2025-08-06 12:42:44 -05:00
GabrPham 3bea40dfd0 Adjusted logic for reading pp_od_clk_voltage
Signed-off-by: GabrPham <gabrpham_amdeng@amd.com>
2025-08-06 12:42:44 -05:00
GabrPham 25aec994a0 Updated Tool and Lib Version
Signed-off-by: GabrPham <gabrpham_amdeng@amd.com>
2025-08-06 12:38:08 -05:00
systems-assistant[bot] b989ce05f5 Merge commit '874b920edd15be9809f0d3d6468b5930d5213c94' into develop 2025-08-06 15:02:49 +00:00
vedithal-amd 96f6abbc03 Remove marker for test autoconfig (#857)
[ROCm/rocprofiler-compute commit: 874b920edd]
2025-08-06 10:46:04 -04:00
vedithal-amd 874b920edd Remove marker for test autoconfig (#857) 2025-08-06 10:46:04 -04:00
xuchen-amd 34dd26fb07 Enable single pass counter collection (#833)
[ROCm/rocprofiler-compute commit: 6a77d241ed]
2025-08-06 10:35:05 -04:00
xuchen-amd 6a77d241ed Enable single pass counter collection (#833) 2025-08-06 10:35:05 -04:00
systems-assistant[bot] 0406493ae0 Merge commit 'b5e1645a1476ea48ceeb601076ccb0714cc2948b' into develop 2025-08-06 01:30:06 +00:00
srawat e3eb0f71b1 Update conf.py 2025-08-05 20:08:07 -05:00
Galantsev, Dmitrii 394c634e42 Update changelog for 7.0 release
Co-authored-by: Rawat, Swati <Swati.Rawat@amd.com>
2025-08-05 20:07:23 -05:00
Galantsev, Dmitrii 543543ff1b Bump version to 1.2.0
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
2025-08-05 20:06:12 -05:00
Welton, Benjamin ea4e6dc572 Fix hsa_code_object_app test deadlock with profiler serialization (#577)
Problem with original test:
- Created circular dependencies between queues:
  * Queue1: Kernel A → Barrier(waits for signal_2) → Kernel C
  * Queue2: Barrier(waits for signal_1) → Kernel B → sets signal_2
- With strict "one kernel at a time" serialization, this created deadlock:
  * Queue1 executed Kernel A, then blocked on barrier waiting for signal_2
  * Serializer switched to Queue2, but Queue2 was blocked waiting for signal_1
  * Neither queue could proceed: Queue1 needed Queue2's Kernel B to complete,
    but Queue2 couldn't start until Queue1 finished completely
- Test would hang indefinitely at hsa_signal_wait_relaxed() for signal_2

Solution implemented:
- Reordered packet submission to eliminate circular dependencies
- Ensured signal producers execute before consumers need them:
  * Kernel A produces signal_1 before Queue2's barrier needs it
  * Kernel B produces signal_2 before Queue1's continuation needs it
- Dependencies now flow forward without cycles, allowing serializer progress

Refactoring changes:
- Extract common functionality into helper functions:
  * create_completion_signal() for signal creation
  * create_queue() for queue creation
  * submit_kernel_packet() for kernel dispatch packets
  * submit_barrier_packet() for barrier packets
- Add comprehensive documentation explaining expected execution pattern
- Simplify main() function making the dependency flow more readable

Co-authored-by: Benjamin Welton <bewelton@amd.com>

[ROCm/rocprofiler-sdk commit: b5e1645a14]
2025-08-05 17:29:07 -07:00
Welton, Benjamin b5e1645a14 Fix hsa_code_object_app test deadlock with profiler serialization (#577)
Problem with original test:
- Created circular dependencies between queues:
  * Queue1: Kernel A → Barrier(waits for signal_2) → Kernel C
  * Queue2: Barrier(waits for signal_1) → Kernel B → sets signal_2
- With strict "one kernel at a time" serialization, this created deadlock:
  * Queue1 executed Kernel A, then blocked on barrier waiting for signal_2
  * Serializer switched to Queue2, but Queue2 was blocked waiting for signal_1
  * Neither queue could proceed: Queue1 needed Queue2's Kernel B to complete,
    but Queue2 couldn't start until Queue1 finished completely
- Test would hang indefinitely at hsa_signal_wait_relaxed() for signal_2

Solution implemented:
- Reordered packet submission to eliminate circular dependencies
- Ensured signal producers execute before consumers need them:
  * Kernel A produces signal_1 before Queue2's barrier needs it
  * Kernel B produces signal_2 before Queue1's continuation needs it
- Dependencies now flow forward without cycles, allowing serializer progress

Refactoring changes:
- Extract common functionality into helper functions:
  * create_completion_signal() for signal creation
  * create_queue() for queue creation
  * submit_kernel_packet() for kernel dispatch packets
  * submit_barrier_packet() for barrier packets
- Add comprehensive documentation explaining expected execution pattern
- Simplify main() function making the dependency flow more readable

Co-authored-by: Benjamin Welton <bewelton@amd.com>
2025-08-05 17:29:07 -07:00
systems-assistant[bot] cdacbdc758 Merge commit '6918af0dd60df64fa445256480dd27be33979c07' into develop 2025-08-05 23:01:31 +00:00
Joseph Macaranas 00a09fbf21 Aug 5 Migration Updates 2025-08-05 17:42:06 -04:00
Joseph Macaranas ad660b7bd8 Source of truth updates for Aug 5 2025-08-05 17:10:23 -04:00
Joseph Macaranas 792cf209a7 Updating migration status from Aug 5th 2025-08-05 17:06:50 -04:00
Joseph Macaranas edf4735b3e Preserve file-path commit histories 2025-08-05 16:59:19 -04:00