Commit Graph

64192 Commits

Author SHA1 Message Date
Rambabu Swargam 0c242e09cb SWDEV-493285 - [catch2][dtest] Additional testcases for hipGraphInstantiateWithFlags
Change-Id: I5c5261cb908cf4dfa66f4e36312da6befe9fabc0


[ROCm/hip-tests commit: 95167b9d96]
2025-01-13 13:48:39 -05:00
Rambabu Swargam 95167b9d96 SWDEV-493285 - [catch2][dtest] Additional testcases for hipGraphInstantiateWithFlags
Change-Id: I5c5261cb908cf4dfa66f4e36312da6befe9fabc0
2025-01-13 13:48:39 -05:00
Rahul Manocha 17ad1834d4 SWDEV-492165 - Add support for 16 bit atomicAdd and atomicCAS
Change-Id: I7f1e4876fe2960dff1775d27cb6443a89e146c86


[ROCm/clr commit: 93cff75928]
2025-01-13 13:35:40 -05:00
Rahul Manocha 93cff75928 SWDEV-492165 - Add support for 16 bit atomicAdd and atomicCAS
Change-Id: I7f1e4876fe2960dff1775d27cb6443a89e146c86
2025-01-13 13:35:40 -05:00
Jacob Lambert aa918756e8 SWDEV-477039 - Fix spelling typos
Change-Id: Ia46e07ec0a001b7e19bec999597028acd4ee7077


[ROCm/clr commit: 805462a77b]
2025-01-13 12:17:46 -05:00
Jacob Lambert 805462a77b SWDEV-477039 - Fix spelling typos
Change-Id: Ia46e07ec0a001b7e19bec999597028acd4ee7077
2025-01-13 12:17:46 -05:00
Marko Arandjelovic 33f65a30e8 SWDEV-475382 - Add unit test for hipGetTextureAlignmentOffset
Change-Id: I6ec65522038ffc3761970542df4570cead3026fe


[ROCm/hip-tests commit: d9162f9abe]
2025-01-13 11:35:02 -05:00
Marko Arandjelovic d9162f9abe SWDEV-475382 - Add unit test for hipGetTextureAlignmentOffset
Change-Id: I6ec65522038ffc3761970542df4570cead3026fe
2025-01-13 11:35:02 -05:00
Jaydeep Patel 62c5a23f78 SWDEV-497532 - Pass correct stream to MemcpyDeviceToDeviceShell to sync.
Change-Id: I7fe2b39e49725d01e7d9ec5b4ab9927a96dc951c


[ROCm/hip-tests commit: eb894a8b8d]
2025-01-13 10:40:23 -05:00
Jaydeep Patel eb894a8b8d SWDEV-497532 - Pass correct stream to MemcpyDeviceToDeviceShell to sync.
Change-Id: I7fe2b39e49725d01e7d9ec5b4ab9927a96dc951c
2025-01-13 10:40:23 -05:00
Aidan Belton-Schure dc2fa93f37 SWDEV-482851 - Do not release last suballocator chunk
Change-Id: Ib28dc9df68e454ee0c0c699c1ff17588fd55f802


[ROCm/clr commit: 451b0ce768]
2025-01-13 10:14:40 -05:00
Aidan Belton-Schure 451b0ce768 SWDEV-482851 - Do not release last suballocator chunk
Change-Id: Ib28dc9df68e454ee0c0c699c1ff17588fd55f802
2025-01-13 10:14:40 -05:00
Aidan Belton e403f56351 SWDEV-475380 - fix perftests on cuda
Change-Id: Iae6fc6cfdc4c2e6cb07562a03ff4e055601ed463


[ROCm/hip-tests commit: 2053abc3b1]
2025-01-13 09:22:51 -05:00
Aidan Belton 2053abc3b1 SWDEV-475380 - fix perftests on cuda
Change-Id: Iae6fc6cfdc4c2e6cb07562a03ff4e055601ed463
2025-01-13 09:22:51 -05:00
Chris Freehill b1d6cacf79 rocr: Remove RuntimeCleanup and use of loaded()
The recent static initialization changes cause this clean up to
happen when it previously never did. The result of ~RuntimeCleanup()
being executed is that the static global "loaded_" is set to false,
which in turn prevents hsa_init() from executing again. Clean up
already happens when hsa_shut_down() occurs.

Change-Id: Ib5cefb80d82880c1945e04eb6ec246bc2c7d2324
2025-01-13 09:18:13 -05:00
Chris Freehill abd81afb9c rocr: Remove RuntimeCleanup and use of loaded()
The recent static initialization changes cause this clean up to
happen when it previously never did. The result of ~RuntimeCleanup()
being executed is that the static global "loaded_" is set to false,
which in turn prevents hsa_init() from executing again. Clean up
already happens when hsa_shut_down() occurs.

Change-Id: Ib5cefb80d82880c1945e04eb6ec246bc2c7d2324


[ROCm/ROCR-Runtime commit: b1d6cacf79]
2025-01-13 09:18:13 -05:00
Lang Yu fe5f12342d kfdtest: consolidate LoopIsa
1, Initialize the registers before using them is the best practice.
Though the use case here doesn't care whether the registers are
initialized or not, some emulators complain the "read_before_write"
behavior. Initialize the registers used to silence these complaints.

2, Update s_wait stuff for gfx12.

Change-Id: I462b2b0b5017dd2876a5954169d3b6b2f1c2a75b
Signed-off-by: Lang Yu <lang.yu@amd.com>
2025-01-10 21:27:23 -05:00
Lang Yu 6c18e6188d kfdtest: consolidate LoopIsa
1, Initialize the registers before using them is the best practice.
Though the use case here doesn't care whether the registers are
initialized or not, some emulators complain the "read_before_write"
behavior. Initialize the registers used to silence these complaints.

2, Update s_wait stuff for gfx12.

Change-Id: I462b2b0b5017dd2876a5954169d3b6b2f1c2a75b
Signed-off-by: Lang Yu <lang.yu@amd.com>


[ROCm/ROCR-Runtime commit: fe5f12342d]
2025-01-10 21:27:23 -05:00
Baraldi, Giovanni 8abb65b166 Adding source snapshot and partial serialization (#99)
* Adding source snapshot

* Adding option to serialize only on target kernel

* Fix for tidy

* Formatting

* Testing the new flag

---------

Co-authored-by: Giovanni Baraldi <gbaraldi@amd.com>

[ROCm/rocprofiler-sdk commit: a2fa188e14]
2025-01-10 15:43:06 -08:00
Baraldi, Giovanni a2fa188e14 Adding source snapshot and partial serialization (#99)
* Adding source snapshot

* Adding option to serialize only on target kernel

* Fix for tidy

* Formatting

* Testing the new flag

---------

Co-authored-by: Giovanni Baraldi <gbaraldi@amd.com>
2025-01-10 15:43:06 -08:00
Chris Freehill 425d206003 Support for generic ISAs in rocm_agent_enumerator
Change-Id: Ie6cf2f1930e27afd6564250e108af1f10864946e


[ROCm/rocminfo commit: 7f417dc598]
2025-01-10 10:46:15 -06:00
Chris Freehill 7f417dc598 Support for generic ISAs in rocm_agent_enumerator
Change-Id: Ie6cf2f1930e27afd6564250e108af1f10864946e
2025-01-10 10:46:15 -06:00
Galantsev, Dmitrii 83f36f1673 Include assert.h during C compilation (#4)
Fix for https://github.com/ROCm/ROCm/issues/3997. When compiling a C program that includes rdc/rdc.h, multiple assertion errors are thrown without this header included.

Change-Id: Ie5b5c1a1a17c8207cf9b1be23b31193e260d5c1a

Co-authored-by: harkgill-amd <harkgill@amd.com>
2025-01-10 11:29:15 -05:00
Galantsev, Dmitrii 78f37c1784 Include assert.h during C compilation (#4)
Fix for https://github.com/ROCm/ROCm/issues/3997. When compiling a C program that includes rdc/rdc.h, multiple assertion errors are thrown without this header included.

Change-Id: Ie5b5c1a1a17c8207cf9b1be23b31193e260d5c1a

Co-authored-by: harkgill-amd <harkgill@amd.com>

[ROCm/rdc commit: 83f36f1673]
2025-01-10 11:29:15 -05:00
Daniel Livingston 50387f6eb5 SWDEV-489003 - [Ubertrace] OCL/HIP profiles are missing event instrumentation
Adds UberTrace support for pre-dispatch markers and barrier begin/end markers.

Moves shared definitions out of palgpuopen.hpp into shared header
palcapturemgr.hpp.

Change-Id: I9f464c689e7ff12c54eca043fc1ad65e1836a64f


[ROCm/clr commit: 541c449ce2]
2025-01-10 11:28:52 -05:00
Daniel Livingston 541c449ce2 SWDEV-489003 - [Ubertrace] OCL/HIP profiles are missing event instrumentation
Adds UberTrace support for pre-dispatch markers and barrier begin/end markers.

Moves shared definitions out of palgpuopen.hpp into shared header
palcapturemgr.hpp.

Change-Id: I9f464c689e7ff12c54eca043fc1ad65e1836a64f
2025-01-10 11:28:52 -05:00
Julia Jiang 60f9ab6fcd SWDEV-507699 - Update CLR license date
Change-Id: I51b641c58b1e9b8c84637af2d22f905bcdab8f56


[ROCm/clr commit: c6e25b2be7]
2025-01-10 11:17:19 -05:00
Julia Jiang c6e25b2be7 SWDEV-507699 - Update CLR license date
Change-Id: I51b641c58b1e9b8c84637af2d22f905bcdab8f56
2025-01-10 11:17:19 -05:00
Julia Jiang 8c070f11f9 SWDEV-497634 - Update change log for hipMalloc allocation fix on Windows
Change-Id: If4351cb4f75141661538e1d26c96e600df3d0b39


[ROCm/clr commit: bdf48bdbf9]
2025-01-10 10:12:39 -05:00
Julia Jiang bdf48bdbf9 SWDEV-497634 - Update change log for hipMalloc allocation fix on Windows
Change-Id: If4351cb4f75141661538e1d26c96e600df3d0b39
2025-01-10 10:12:39 -05:00
Anusha GodavarthySurya 08c92f4793 SWDEV-480209 - Make internal callbacks non-blocking
Change-Id: Ic918d08f341abfd9a7c167d09f9c723cdc43157f


[ROCm/clr commit: 683a942364]
2025-01-10 02:16:11 -05:00
Anusha GodavarthySurya 683a942364 SWDEV-480209 - Make internal callbacks non-blocking
Change-Id: Ic918d08f341abfd9a7c167d09f9c723cdc43157f
2025-01-10 02:16:11 -05:00
Saleel Kudchadker 16f14e4b00 SWDEV-504494 - Use system scope for D2H
- When using shader copy, make sure to use release scope for the AQL
  packet. This is a potential bug but is hidden as hipMemcpyAsync always
needs synchronization(which inserts a barrier with release scope). For
hipMemcpy we use a barrier packet to make sure its blocking. Eitherways
a barrier gets always used and hides in some ways a potential bug.

Change-Id: I57fb7f769c3179e76d712471c0905104c801d7ba


[ROCm/clr commit: c9dd95bf6c]
2025-01-10 00:34:08 -05:00
Saleel Kudchadker c9dd95bf6c SWDEV-504494 - Use system scope for D2H
- When using shader copy, make sure to use release scope for the AQL
  packet. This is a potential bug but is hidden as hipMemcpyAsync always
needs synchronization(which inserts a barrier with release scope). For
hipMemcpy we use a barrier packet to make sure its blocking. Eitherways
a barrier gets always used and hides in some ways a potential bug.

Change-Id: I57fb7f769c3179e76d712471c0905104c801d7ba
2025-01-10 00:34:08 -05:00
Saleel Kudchadker 6a416008aa SWDEV-508004 - Improve hipEventRecord
- Resolve stream once for event record. We should avoid calling
  getStream again in addMarker

Change-Id: I78448c4f151ae10a5c8e8c248b2f4078b84191cb


[ROCm/clr commit: a22c45d635]
2025-01-09 16:47:46 -05:00
Saleel Kudchadker a22c45d635 SWDEV-508004 - Improve hipEventRecord
- Resolve stream once for event record. We should avoid calling
  getStream again in addMarker

Change-Id: I78448c4f151ae10a5c8e8c248b2f4078b84191cb
2025-01-09 16:47:46 -05:00
Baraldi, Giovanni e226e2a11a SWDEV-508485: Adding MFMA F8 metric (#112)
Co-authored-by: Giovanni Baraldi <gbaraldi@amd.com>

[ROCm/rocprofiler-sdk commit: 27266eb242]
2025-01-09 15:27:16 -06:00
Baraldi, Giovanni 27266eb242 SWDEV-508485: Adding MFMA F8 metric (#112)
Co-authored-by: Giovanni Baraldi <gbaraldi@amd.com>
2025-01-09 15:27:16 -06:00
srawat 0e53160bee Update LICENSE 2025-01-09 13:12:24 -06:00
srawat 8a698a7e23 Update LICENSE
[ROCm/rdc commit: 0e53160bee]
2025-01-09 13:12:24 -06:00
Giovanni Baraldi f19bed4c8c SWDEV-508485: Adding MFMA F8 metric
Change-Id: I947d2645e8dc1544d198a4e0a02500feee10d89d
2025-01-09 12:18:02 -06:00
Giovanni Baraldi d63f98bd00 SWDEV-508485: Adding MFMA F8 metric
Change-Id: I947d2645e8dc1544d198a4e0a02500feee10d89d


[ROCm/rocprofiler commit: f19bed4c8c]
2025-01-09 12:18:02 -06:00
German Andryeyev 5a76761960 SWDEV-507019 - Change the function lock to the module lock
Multiple functions can be located in the same module.

Change-Id: Ia4ca3db64fe5b0822584059d3770c91103665c63


[ROCm/clr commit: 45a12208b6]
2025-01-09 12:35:29 -05:00
German Andryeyev 45a12208b6 SWDEV-507019 - Change the function lock to the module lock
Multiple functions can be located in the same module.

Change-Id: Ia4ca3db64fe5b0822584059d3770c91103665c63
2025-01-09 12:35:29 -05:00
Julia Jiang f43f10830b SWDEV-507714 - Update description for hip API hipDriverGetVersion
Change-Id: Icec9d8b8beed2745a7344734b2449d4a2b4f494f


[ROCm/hip commit: 808274984d]
2025-01-09 12:02:45 -05:00
Julia Jiang 808274984d SWDEV-507714 - Update description for hip API hipDriverGetVersion
Change-Id: Icec9d8b8beed2745a7344734b2449d4a2b4f494f
2025-01-09 12:02:45 -05:00
Kent Russell cc7ff73e7f kfdtest: Can't initialize variable-sized objects
Do a memset, since we can't initialize variable-sized objects

Change-Id: I57faf4a0581a29f9d30391aa387812c2b7bb5011
Signed-off-by: Kent Russell <kent.russell@amd.com>
2025-01-09 10:36:06 -05:00
Kent Russell f256811bab kfdtest: Can't initialize variable-sized objects
Do a memset, since we can't initialize variable-sized objects

Change-Id: I57faf4a0581a29f9d30391aa387812c2b7bb5011
Signed-off-by: Kent Russell <kent.russell@amd.com>


[ROCm/ROCR-Runtime commit: cc7ff73e7f]
2025-01-09 10:36:06 -05:00
Rambabu Swargam 80903662fc SWDEV-491360 - [catch2][dtest] hipGraphLaunch parallelism Tests
Tests for Alloc node detection optimization changes

Change-Id: I780553110b33887c65b7989490c9a72e796f1a62


[ROCm/hip-tests commit: 351ffa8378]
2025-01-09 00:02:07 -05:00
Rambabu Swargam 351ffa8378 SWDEV-491360 - [catch2][dtest] hipGraphLaunch parallelism Tests
Tests for Alloc node detection optimization changes

Change-Id: I780553110b33887c65b7989490c9a72e796f1a62
2025-01-09 00:02:07 -05:00