This reverts commit 75e8fe383f.
SVM is not ready yet. This was merged by accident.
Change-Id: I372f7d293fd38429ec570bc0e0add7e612871594
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
This reverts commit 3f45f602d4.
SVM is not ready yet. This was merged by accident.
Change-Id: I7c0d835a0d3a448f2ac1094f818601e5d6363045
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Set the KFD_IOC_ALLOC_MEM_FLAGS_COHERENT flag and
KFD_IOC_ALLOC_MEM_FLAGS_UNCACHED flag to allocate
uncached coherent memory when HSA_DISABLE_CACHE
environment variable is set. At KFD driver,
Single KFD_IOC_ALLOC_MEM_FLAGS_UNCACHED flag is
not sufficient to allocate uncached memory. We
have to use both two flags to allocate uncached
memory.
Change-Id: Ie490f37b2e696314e60048f5b1b57442431696e9
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Before gfx90a, coherent memory is uncached. So it was reasonable
when environment variable HSA_DISABLE_CACHE is set, memory is mapped
as coherent. On gfx90a, coherent memory can be cached, so mapping
memory as coherent can't guarantee memory is uncached. When
HSA_DISABLE_CACHE is set, we have to map memory as uncached.
Change-Id: Ia5ed4cf0ad6aef5644dc8c9e6632b52d606f06f4
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
This change might be redundant if ROCr takes care of it
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: I7b67143a8ad21baa61b7eda7b8e5fe0ac1e33830
This change is for the A+A bring-up branch as it needs to made more
generic to handle all ASICs.
For A+A all the system buffers are mapped as NC (non coherent) unless
explicitly marked as UC (uncached). The coherency is then expected to be
handled by shader by explicitly using acquire/release instructions.
However, CP doesn't have same feature. The buffers used by CP thus have
to UC. For now queue buffer and Signal handler memory is marked as UC.
This change shouldn't affect other ASICs since Uncached flag is not used
in those. However, this change still need to be made more generic.
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: I56c37a809913f7f08c94d01b0572d0f4864939aa
On gfx9, the maximum number of wavefronts per queue is the minimum of
40 waves per compute units, or 512 waves per shader engine. On gfx10,
there can only be 32 waves per compute units.
Signed-off-by: Laurent Morichetti <laurent.morichetti@amd.com>
Change-Id: I148d1a4fe6c07cdbfaa1f77939eb29311c81c008
Reserve some space in the context save area for the debugger's
use. There should be 32 bytes per wave for a given queue.
Change-Id: I65ddb6123d0f6afd3149844617ad19023009101d
XNACK API for GPUs that support this mode. This API
makes calls to amdgpu driver to configure xnack mode.
It supports set xnack mode and query the current mode used.
Change-Id: If865fd0e3f900f008243dc49504e1a0694e1791a
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
strlen(src) should not be used as the length in strncpy. Use memcpy
since we know the length of the string, and ensure that we
NULL-terminate regardless of length
Signed-off-by: Kent Russell <kent.russell@amd.com>
Change-Id: I21cc6d106510c69464e7ac9d3fc7da3a1e6d1a68
It is to provide an option to map specific memory as
uncached on A+A HW platform.
Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>
Change-Id: Ib665cb306a0e78aba3ea5ee2f0e46cb62ae139f8
The purpose of this patch is to add a missing device ID for gfx1030.
The missing ID "0x73A1" is now added to the "topology.c" file.
Signed-off-by: Ori Messinger <Ori.Messinger@amd.com>
Change-Id: I05a8a55e2c46f941a039fa72a6a5e76bf2a52736
Inside Docker, when limit GPU number to one, it may cause node
numIOLinks bigger than total node number.
Signed-off-by: Gang Ba <gaba@amd.com>
Change-Id: Ib84f2f05f8e0c70e48b9043b79aec02b5a214bbe
This patch is to add Cezanne/Lucienne support on thunk.
Change-Id: Icd9b9913fa87bbfe6c71b36a2892d6ddb73e3ddd
Signed-off-by: Prike.Liang <Prike.Liang@amd.com>
This patch make get_block_properties() function work on gfx1033 platform
Change-Id: Ie5be7dfb38575eec8b39b91f3ee5b3a31abe8bd1
Signed-off-by: Chen Gong <curry.gong@amd.com>
1. Create P2P links
2. Determine FRAMEBUFFER_PUBLIC/PRIVATE only based
host-accessibility, not peer-accesssibility
Signed-off-by: Gang Ba <gaba@amd.com>
Change-Id: I15fccdc60386b453e2a47849a16df15157324b21
This reverts commit 8f26c0c40c.
Reason for revert: This commit caused a regression rocrtst memory
subtest: Maximum Single Allocation in Memory Pools failed.
Change-Id: I15330625603f893200a08cd8b5b097f9bf95361f
While the ternary is nice to read, strlen in general is an expensive
call, so call it once and check if the value is greater than our maximum
allowable string length and adjust accordingly
Signed-off-by: Kent Russell <kent.russell@amd.com>
Change-Id: Id744f2ba0eb81bb2b3c52eb69f38a615398a655d
Don't update the vm_object if GPU mapping failed. Print an error message
to help diagnose underlying problems.
Change-Id: I801ab6fe6c155bd25e6c0358007c106a4a019480
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Use MAP_POPULATE when allocating anonymous system memory for later
GPU mapping as a userptr. This can speed up large allocations by
more than factor 2. I suspect populating pages in this way is more
efficient than the CPU page fault code path triggered by
get_user_pages in the kernel.
Change-Id: I188bbc1462ccb650d48cbfb1080dbb8eb7ada8b5
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
On gfx9, the maximum number of wavefronts per queue is the minimum of
40 waves per compute units, or 512 waves per shader engine. On gfx10,
there can only be 32 waves per compute units.
Signed-off-by: Laurent Morichetti <laurent.morichetti@amd.com>
Change-Id: I148d1a4fe6c07cdbfaa1f77939eb29311c81c008
Reserve some space in the context save area for the debugger's
use. There should be 32 bytes per wave for a given queue.
Change-Id: I65ddb6123d0f6afd3149844617ad19023009101d
The queue control stack size cannot exceed 0x7000 on ASICs
gfx1010 through gfx1031. The lower limit is not achievable
with AQL so this should have no practical effect.
Fixes control stack size overflow on large ASICs.
Change-Id: Ib78cf6e4c5f096044bf8de24debe211689891caa
Signed-off-by: Jay Cornwall <jay.cornwall@amd.com>
This patch is the hot fix to fix the param number checking after remove
dgpu input.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Change-Id: Ic980588f78616f99076de742af580afb4273fb2f
gfx90c should use GFX902 which is the same with gfx902.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Change-Id: Id24dc2c85c9f49f36b00889c3b8b1b19cce34e09
Whether use dgpu path will check the props which exposed from kernel.
We won't need hard code in the ASIC table.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Change-Id: I0c018a26b219914a41197ff36dbec7a75945d452
KFD already implemented the fallback path for APU. Thunk will use flag
which exposed by kfd to configure is_dgpu instead of hardcode before.
Signed-off-by: Huang Rui <ray.huang@amd.com>
Change-Id: I445f6cf668f9484dd06cd9ae1bb3cfe7428ec7eb
Gfx10 need 12bytes/wave control stack
Change-Id: I6c6f2819572e6b43aa3140d4dbe79d930e4c1c9c
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Signed-off-by: Jay Cornwall <Jay.Cornwall@amd.com>
This is needed to avoid additional references to mapped BOs in child
processes that can prevent freeing memory in the parent process and lead
to out-of-memory conditions.
Change-Id: I25c90510a14dde515cc23ea5dc1f68e8d7e37a66
Signed-off-by: Philip Cox <Philip.Cox@amd.com>
strlen(src) should not be used as the length in strncpy. Use memcpy
since we know the length of the string, and ensure that we
NULL-terminate regardless of length
Signed-off-by: Kent Russell <kent.russell@amd.com>
Change-Id: I21cc6d106510c69464e7ac9d3fc7da3a1e6d1a68
The option to use kfd_fd for cpu mapping is for very old broken KFD
version, it is not used in upstreaming process. This causes issue when
multiple process uses shared system memory because the GTT address is
over 40 bits.
Change to always use render node fd to create CPU mapping.
Change-Id: Id7e7b2a2e2f13c6e62c5de170589abfff4d456b0
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
This reverts commit d675d1cce1.
Reason for revert: Change was submitted by accident
Change-Id: If05c705e22296fd3ca789f269737d379a933361d
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Felix Kuehling
Kent Russell
Oak Zeng
Chengming Gui
Harish Kasiviswanathan
Laurent Morichetti
Alex Sierra
Eric Huang
Jonathan Kim
Amber Lin
Jay Cornwall
Ori Messinger
Gang Ba
Prike.Liang
Chen Gong
Huang Rui
Tianci.Yin
Philip Cox
Philip Yang
Yong Zhao