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12866 Commits

Author SHA1 Message Date
Dittakavi, Satyanvesh 60c19641d8 SWDEV-534857 - Fix the hip build failure on Windows (#409) 
[ROCm/clr commit: 93c6ffdec4]
 2025-05-28 13:41:31 +05:30
Lytovchenko, Danylo 694582d67a SWDEV-123456 - Only run keyword scan against amd-staging (#399) 
[ROCm/clr commit: 1bb0ea69b1]
 2025-05-28 10:09:35 +02:00
Belton-Schure, Aidan 8074e10ce6 Add operator[] to vec class (#402) 
Change-Id: I452cd5d1b258ccbc354a2f424d062f0fa91100ea

[ROCm/clr commit: 0f46bd5131]
 2025-05-28 13:38:38 +05:30
Manocha, Rahul b936e55e81 SWDEV-475482 - [6.4 Preview] Match hipTexObjectCreate with cuda (#408) 
Co-authored-by: Rahul Manocha <rmanocha@amd.com>

[ROCm/clr commit: b5e9bc55cb]
 2025-05-28 13:21:45 +05:30
Betigeri, Sourabh c54ec9a21a SWDEV-508969 - Fixes error code mismatch for hipBindTexture2D API (#406) 
[ROCm/clr commit: 988c42a6e1]
 2025-05-28 13:17:15 +05:30
Patel, Jaydeepkumar 341b17fe41 SWDEV-508982 - Handle hipMemPoolCreate, hipMemPoolDestory & hipDeviceSetMemPool during stream capture. (#398) 
[ROCm/clr commit: b751614cd8]
 2025-05-27 14:48:21 +05:30
Brzak, Branislav d17388cd6b SWDEV-518962 - Match hipCtxGetApiVersion signature with Cuda (#327) 
[ROCm/clr commit: ee2d4a0358]
 2025-05-26 20:28:22 +05:30
Lytovchenko, Danylo 436c25aa47 SWDEV-12345 Add PR title and commit message validation (#349) 
[ROCm/clr commit: 7f6020d599]
 2025-05-26 15:13:31 +02:00
Lytovchenko, Danylo e3a6d00822 SWDEV-123456 - Add PR description validation (#354) 
[ROCm/clr commit: e12c7200b9]
 2025-05-26 15:13:15 +02:00
Lytovchenko, Danylo 600f07f580 SWDEV-123456 - add keywords scan (#395) 
[ROCm/clr commit: d42622b4c0]
 2025-05-26 15:12:43 +02:00
Harrymanoharan, Jessey 1868e4e595 SWDEV-531711 - Enable skipping host side abort when GPU crashes. (#380) 
Co-authored-by: kjayapra-amd <karthik.jayaprakash@amd.com>

[ROCm/clr commit: 3930ae2524]
 2025-05-26 17:52:02 +05:30
Belton-Schure, Aidan 983a5925c6 SWDEV-508966 - hipGetTextureAlignmentOffset return hipErrorInvalidTexture (#389) 
[ROCm/clr commit: 7aae33951b]
 2025-05-22 23:19:45 +05:30
Belton-Schure, Aidan 5d4ae6346e SWDEV-508977 - return error in global capture mode for hipEventQuery (#388) 
[ROCm/clr commit: 51dd60a64f]
 2025-05-22 23:17:57 +05:30
Stojiljkovic, Vladana 1a36230bf2 Match hipStreamAddCallback capture behavior with nvidia (#386) 
Co-authored-by: Anusha GodavarthySurya <Anusha.GodavarthySurya@amd.com>

[ROCm/clr commit: a0e946c2cc]
 2025-05-22 20:54:04 +05:30
Stojiljkovic, Vladana 9af11abb42 Match hipLaunchCooperativeKernelMultiDevice behavior with nvidia (#385) 
Co-authored-by: Anusha GodavarthySurya <Anusha.GodavarthySurya@amd.com>

[ROCm/clr commit: 63c4020e49]
 2025-05-22 20:52:37 +05:30
Stojiljkovic, Vladana 25084759b8 Allow hipMemAdvise capturing only in relaxed mode (#384) 
Co-authored-by: Anusha GodavarthySurya <Anusha.GodavarthySurya@amd.com>

[ROCm/clr commit: 2ddfe40de0]
 2025-05-22 20:52:00 +05:30
Stojiljkovic, Vladana 3f415c28e0 Allow hipMallocManaged capturing only in relaxed mode (#383) 
Co-authored-by: Anusha GodavarthySurya <Anusha.GodavarthySurya@amd.com>

[ROCm/clr commit: 69112331ac]
 2025-05-22 20:51:30 +05:30
Arandjelovic, Marko b520edc6a4 Match cuda behaviour for VMM APIs (#382) 
[ROCm/clr commit: 9ef5602453]
 2025-05-22 20:49:08 +05:30
Kandula, Venkateshwar reddy 10d0ae9638 [CLR ABI] step runtime api version hip memset node params (#373) 
* increase hip api table version for HIP_MEMSET_NODE_PARAMS removed.

* update version in static_assert.

---------

Co-authored-by: Venkateshwar Reddy Kandula <vkandula@amd.com>

[ROCm/clr commit: ad44dd527f]
 2025-05-22 15:09:31 +05:30
Dittakavi, Satyanvesh e0a9266e50 SWDEV-433031 - Match the signature of HIPRTC APIs with NVRTC (#378) 
Change-Id: I5eb175b15a65a9f1c2db3ae30da6803179520dbe

[ROCm/clr commit: e5f7519e64]
 2025-05-22 13:30:33 +05:30
Dittakavi, Satyanvesh 26a927621b SWDEV-513341 - Remove datatypes from HIPRTC (#377) 
Defining int64_t, uint64_t, int32_t, uint32_t in HIPRTC
seem to result in conflicts with some apps as they use
their own definitions for these types. NVRTC also doesn't
define these. Hence remove them and replace their usage
with hip internal datatypes such as __hip_int64_t

Change-Id: Id314730bbd61c05f126f915c546052f956550a3f

[ROCm/clr commit: 946ea72c94]
 2025-05-22 13:28:31 +05:30
Dittakavi, Satyanvesh 4f6024c376 SWDEV-482125 - HIPRTC implementation of standard headers moved from std to __hip_internal namespace (#376) 
Change-Id: Ia359ed45e0916ad397401113a69a6b26a590d807

[ROCm/clr commit: b27e2abc41]
 2025-05-22 13:27:19 +05:30
Gupta, Maneesh b1b9972918 Create pull_request_template.md (#362) 
Initial draft of PR template

[ROCm/clr commit: 524c9537c3]
 2025-05-22 13:25:16 +05:30
Dittakavi, Satyanvesh 36539a2ca1 SWDEV-512756 - SWDEV-510954 - Add appropriate checks during active stream capture (#375) 
- hipStreamAddCallback is not permitted during stream capture for all modes
- hipModuleUnload is permitted only for relaxed mode during stream capture

Change-Id: I79ca5d2f6b61bd2e169fee7c13da4cd46e472a10

[ROCm/clr commit: 2c173c6da4]
 2025-05-22 13:24:49 +05:30
Andryeyev, German fc2f5aaf22 SWDEV-533074 - Expose hipDeviceAttributeNumberOfXccs attribute (#336) 
[ROCm/clr commit: 5cc172c99c]
 2025-05-21 22:35:42 +05:30
Dittakavi, Satyanvesh 1cc35da9be SWDEV-438790 - Remove DEBUG_HIP_7_PREVIEW env var keeping the hipGetLastError changes by default (#337) 
[ROCm/clr commit: 664bf232dd]
 2025-05-21 22:12:45 +05:30
Brzak, Branislav 834d770ca4 SWDEV-508964 - Match hip launch kernel retuns with cuda (#357) 
[ROCm/clr commit: 88f15877f6]
 2025-05-21 21:59:11 +05:30
Belton-Schure, Aidan 720660d552 SWDEV-527851 SWDEV-527890 SWDEV-529456 - Make HIP vector simple struct (#356) 
* Make HIP vector simple struct

Change-Id: I8442c2cc9af26b2a3c7d6719e3348df1593e83b3

* Update make_vector_type

Change-Id: Ic5060994a08baa4262c2a4b09fcbe6bc74276720

[ROCm/clr commit: 3cd3b3ffc5]
 2025-05-21 21:30:55 +05:30
Dittakavi, Satyanvesh 39b9a46025 SWDEV-418904 - Remove hiprtc symbols from hip library (#370) 
[ROCm/clr commit: e9dbd7c99d]
 2025-05-21 21:22:47 +05:30
Assiouras, Ioannis 6467351f4c SWDEV-508962 - [6.4 Preview] Update hipPointerGetAttributes to match CUDA > 11.0 behavior (#120) (#363) 
[ROCm/clr commit: 0b64eec921]
 2025-05-21 21:18:05 +05:30
Assiouras, Ioannis 3ea732b38a SWDEV-508965 - [6.4 Preview] Remove HIP_MEMSET_NODE_PARAMS struct (#121) (#364) 
[ROCm/clr commit: 968f5599a8]
 2025-05-21 21:16:42 +05:30
Andryeyev, German 22da169b86 SWDEV-532868 - Disable implicit wait in hipFree for async allocations (#323) 
* SWDEV-532868 - Disable implicit wait in hipFree for async allocations

* Fix compilation error

[ROCm/clr commit: 58df22546b]
 2025-05-21 21:14:38 +05:30
Brzak, Branislav 16aefe62f6 SWDEV-508979 - Match hipModuleLoad negative return with Cuda (#326) 
[ROCm/clr commit: 7a357800dd]
 2025-05-21 21:09:07 +05:30
Brzak, Branislav 10d97b4b3c SWDEV-508970 - Match hipBindTextureToArray negative return with Cuda (#325) 
[ROCm/clr commit: a46ed60e2e]
 2025-05-21 20:57:09 +05:30
Sang, Tao 12b43826dd SWDEV-519346 - Fix __clock64() compiling issue in SPIRV (#207) 
[ROCm/clr commit: 78f3caba0b]
 2025-05-20 16:57:17 -04:00
Jayaprakash, Karthik a17e22a78c SWDEV-529929 - hipMemGetHandleForAddressRange implementation. (#245) 
[ROCm/clr commit: 12131de4a9]
 2025-05-20 15:56:04 -04:00
Jayaprakash, Karthik b59859c52e SWDEV-457749 - Use size of handle for range instead of actual size for physmem. (#342) 
[ROCm/clr commit: bed454caa1]
 2025-05-20 15:24:49 -04:00
Kudchadker, Saleel ee7c5554db SWDEV-523279 - Use preferred engine mask for SDMA (#317) 
- ROCr now reports preferred engine for copy status. We can leverage
this for max bandwidth for inter-GPU copies
- Cleanup logging

[ROCm/clr commit: 1b0ea080e4]
 2025-05-19 16:04:51 -07:00
Kudchadker, Saleel 5fd5e846e2 SWDEV-531518 - Fix offset accumulation (#333) 
srcAddress/dstAddress accumulation was cumulative, which shouldnt be
done if we increment offset.

[ROCm/clr commit: 5712944c7c]
 2025-05-19 18:03:06 +05:30
Jayaprakash, Karthik f4c9056cdc Revert "SWDEV-522707 - Set phys_mem_handle type to sizeof(size_t) to avoid blocking address range. (#105)" (#348) 
This reverts commit 0071d33754.

[ROCm/clr commit: bb7750a946]
 2025-05-19 15:19:16 +05:30
Jayaprakash, Karthik 4ea2d9a5ee SWDEV-531711 - Report correct error code based on device failure. (#286) 
[ROCm/clr commit: f5b8db33f1]
 2025-05-17 06:33:13 -04:00
Brzak, Branislav dc39d67017 SWDEV-508742 - Make clCreatePipe spec compliant (#80) 
[ROCm/clr commit: 7698d799ce]
 2025-05-16 15:18:35 +05:30
Belton-Schure, Aidan c04355bbe3 Add __syncwarp operation (#160) 
Change-Id: I6a3783beafdbb9f11a3b37333f4ff3f5be27ea54

[ROCm/clr commit: c50610b44d]
 2025-05-15 14:20:13 +05:30
Patel, Jaydeepkumar 7b6e59cbea SWDEV-530803 - User current device id while cloning graph node. (#313) 
[ROCm/clr commit: 32eb6a5d89]
 2025-05-15 09:06:15 +05:30
Andryeyev, German b13eec7049 SWDEV-345024 - Retain the program on Fini kernel execution (#307) 
Fini kernel is executed during the invocation of amd::Program destructor,
but the dispatch logic can retain/release the reference counter and
cause double free. Avoid double free with an extra retain() call

[ROCm/clr commit: bddb8f14d1]
 2025-05-14 21:21:26 +05:30
Xie, Pengda d0b5bee680 SWDEV-527781 - Remove Stream Validation in HIP APIs 
[ROCm/clr commit: 0457b634f8]
 2025-05-13 13:45:27 -07:00
Assiouras, Ioannis 71f19d7017 SWDEV-529449 - Bug fix when retrieving a memobj from the IPC mem handle 
[ROCm/clr commit: f7482ef0a6]
 2025-05-13 19:18:22 +01:00
Hernandez, Gerardo f6e2ce709e SWDEV-491314 - Re-enable cross-lane sync builtins (#94) 
* Enables warp sync builtins by default

* Removes HIP_ENABLE_WARP_SYNC_BUILTINS; that macro will no longer have an effect. Instead, we will now be able to disable the builtins with the macro: HIP_DISABLE_WARP_SYNC_BUILTINS

[ROCm/clr commit: 5606debd8e]
 2025-05-13 16:35:58 +01:00
Hila, Nino 92b0f9d114 Update palamida.yml (#266) 
* Add palamida.yml - removing url

[ROCm/clr commit: 29df3ae6e9]
 2025-05-12 21:39:21 -07:00
Jayaprakash, Karthik a128beeeb5 SWDEV-506467 - Fixing compilation issue seen on clang compilation for ASAN. (#253) 
[ROCm/clr commit: 876de49b11]
 2025-05-12 17:16:56 -04:00