Commit Graph

37726 Commits

Author SHA1 Message Date
coleramos425 244ae98968 Comply to Python formatting
Signed-off-by: coleramos425 <colramos@amd.com>


[ROCm/rocprofiler-compute commit: 013bf218d0]
2024-08-09 09:46:42 -04:00
coleramos425 013bf218d0 Comply to Python formatting
Signed-off-by: coleramos425 <colramos@amd.com>
2024-08-09 09:46:42 -04:00
coleramos425 3f954de70d Add detail to Omniperf logs
Signed-off-by: coleramos425 <colramos@amd.com>


[ROCm/rocprofiler-compute commit: 3d5493a3ff]
2024-08-09 09:46:42 -04:00
coleramos425 3d5493a3ff Add detail to Omniperf logs
Signed-off-by: coleramos425 <colramos@amd.com>
2024-08-09 09:46:42 -04:00
coleramos425 7cc89dbeff Split rocprofv2 cmd args prior to subprocess call (#347)
Signed-off-by: coleramos425 <colramos@amd.com>


[ROCm/rocprofiler-compute commit: 19a229a9f2]
2024-08-09 09:46:42 -04:00
coleramos425 19a229a9f2 Split rocprofv2 cmd args prior to subprocess call (#347)
Signed-off-by: coleramos425 <colramos@amd.com>
2024-08-09 09:46:42 -04:00
coleramos425 7de6a2f997 Fix bug in abs diff calculation for analysis output
Signed-off-by: coleramos425 <colramos@amd.com>


[ROCm/rocprofiler-compute commit: fa90752d0c]
2024-08-09 09:46:42 -04:00
coleramos425 fa90752d0c Fix bug in abs diff calculation for analysis output
Signed-off-by: coleramos425 <colramos@amd.com>
2024-08-09 09:46:42 -04:00
Ben Richard 21b23a08d6 Work around crash when profiling multi-process/multi-GPU application (#376)
* Fix crash in multi-GPU scenario

Exclude -o option when invoking rocprof so that each rocprof process
writes to a different .csv file. Concatenate into a single .csv file
when finished.

Signed-off-by: benrichard-amd <ben.richard@amd.com>

* Only combine csv files when using rocprofv2

rocprofv1 does not have separate csv files

Signed-off-by: benrichard-amd <ben.richard@amd.com>

* Fix indices in combined CSV file

Use ignore_index flag to ensure there are no duplicate indices.

Signed-off-by: benrichard-amd <ben.richard@amd.com>

* Fix Dispatch_ID column and remove unnamed column

-Pandas was inserting an unnamed column (index column)
-Overwrite the Dispatch_ID column so that every row is unique, starting at 0
-Remove fixup_rocprofv2_dispatch_ids as no longer needed

Signed-off-by: benrichard-amd <ben.richard@amd.com>

* Fix code formatting

Signed-off-by: benrichard-amd <ben.richard@amd.com>

* Fix code formatting (for real this time)

Signed-off-by: benrichard-amd <ben.richard@amd.com>

---------

Signed-off-by: benrichard-amd <ben.richard@amd.com>

[ROCm/rocprofiler-compute commit: 69e5c32d52]
2024-08-09 09:46:42 -04:00
Ben Richard 69e5c32d52 Work around crash when profiling multi-process/multi-GPU application (#376)
* Fix crash in multi-GPU scenario

Exclude -o option when invoking rocprof so that each rocprof process
writes to a different .csv file. Concatenate into a single .csv file
when finished.

Signed-off-by: benrichard-amd <ben.richard@amd.com>

* Only combine csv files when using rocprofv2

rocprofv1 does not have separate csv files

Signed-off-by: benrichard-amd <ben.richard@amd.com>

* Fix indices in combined CSV file

Use ignore_index flag to ensure there are no duplicate indices.

Signed-off-by: benrichard-amd <ben.richard@amd.com>

* Fix Dispatch_ID column and remove unnamed column

-Pandas was inserting an unnamed column (index column)
-Overwrite the Dispatch_ID column so that every row is unique, starting at 0
-Remove fixup_rocprofv2_dispatch_ids as no longer needed

Signed-off-by: benrichard-amd <ben.richard@amd.com>

* Fix code formatting

Signed-off-by: benrichard-amd <ben.richard@amd.com>

* Fix code formatting (for real this time)

Signed-off-by: benrichard-amd <ben.richard@amd.com>

---------

Signed-off-by: benrichard-amd <ben.richard@amd.com>
2024-08-09 09:46:42 -04:00
Marko Arandjelovic cc4fdd8d97 SWDEV-476869 - build fix for cuda version < 12000
Change-Id: I9086ffc0e5e0c1e9748163c8433c9e78c83d8f72
2024-08-09 14:04:56 +02:00
Marko Arandjelovic b0b04e81be SWDEW-441411 - Add hipConfigureCall test
Change-Id: I90d9b778d3f53bed20777251f839063431141440
2024-08-09 07:41:15 -04:00
Galantsev, Dmitrii 4b21bb4b29 Merge amd-staging into amd-master 20240808
Change-Id: I15b180364b79de72a74ae52fbce7009122a01415
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>


[ROCm/rocm_smi_lib commit: ee3caa23ed]
2024-08-08 16:38:24 -05:00
Galantsev, Dmitrii ee3caa23ed Merge amd-staging into amd-master 20240808
Change-Id: I15b180364b79de72a74ae52fbce7009122a01415
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
2024-08-08 16:38:24 -05:00
Ioannis Assiouras 1bd8e9dcf4 SWDEV-472309 - Disable hipGetProcAddress tests for static build
Change-Id: I7018829557f9e7132b7e4a71b31de5e67ed29218
2024-08-08 16:44:12 -04:00
Rahul Manocha 90bafb8ae8 [SWDEV-454315] - Fix for Atomic bitwise ops testcases
Change-Id: Ib402c6499ad9218fba89e78c8f91a87ca3537b35
2024-08-08 14:44:23 -04:00
Sourabh Betigeri 787f7f8df1 SWDEV-435054 - Improves robustness of HIP test
Makes the test stronger by hiding
dispatch scheduling latency on MI300

Change-Id: Ic9724f4f1b16f1e707060129327248bbb353df45
2024-08-08 14:23:24 -04:00
Ioannis Assiouras 25af4dd1f4 SWDEV-432951 - Added C unit test
Change-Id: I65a1e5be1782fd325cf1cfb74fbd80b4564df9dc
2024-08-08 14:18:15 -04:00
Todd tiantuo Li 0ee0e4ab4a SWDEV-432490 - fix __HIP_NO_IMAGE_SUPPORT logic
1.Skip texture/image tests when __HIP_NO_IMAGE_SUPPORT is set to prevent inevitable silent failure
2.Simplify __HIP_NO_IMAGE_SUPPORT macros

Change-Id: I54ef12a239298c534a213edf39c05c2dad06a7f4
2024-08-08 14:15:38 -04:00
Maisam Arif 02d2ceddaf Bump version tool:2.3.1+hash
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
Change-Id: Ic67456d7484c2f5a0ce0e086e56b29e20d9d9745


[ROCm/rocm_smi_lib commit: 055b023d2e]
2024-08-08 01:40:55 -05:00
Maisam Arif 055b023d2e Bump version tool:2.3.1+hash
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
Change-Id: Ic67456d7484c2f5a0ce0e086e56b29e20d9d9745
2024-08-08 01:40:55 -05:00
Giovanni LB 00163488d7 Fixing perfetto tracks for multigpu
Change-Id: I0b18180218fc19c8a478112e9a374e863fd3741c
2024-08-08 00:59:48 -04:00
Giovanni LB a34d5dbc16 Fixing perfetto tracks for multigpu
Change-Id: I0b18180218fc19c8a478112e9a374e863fd3741c


[ROCm/rocprofiler commit: 00163488d7]
2024-08-08 00:59:48 -04:00
Rahul Manocha 39bbc0341d SWDEV-468039 - FP8 host only conversion support on mi200
Change-Id: I0891f42d1b7c0d94d099fe26df5db3eff64ba564
2024-08-07 20:51:00 -04:00
gobhardw 1a63cba43d issue 40 typos fix
Change-Id: I486301c42bc5691a4d8a852e0ce168f8ca7776a0
2024-08-07 16:09:31 -04:00
gobhardw b363586f82 issue 40 typos fix
Change-Id: I486301c42bc5691a4d8a852e0ce168f8ca7776a0


[ROCm/rocprofiler commit: 1a63cba43d]
2024-08-07 16:09:31 -04:00
David Galiffi b12bd4f522 Create ROCm 6.2 Installers (#369)
* Add ROCm 6.2 to CPACK workflow.

* Update APT-Get packages

  - hipcc is no longer included in hip-runtime-amd meta packages. This change standardizes the installs with the other OSes.

* Bump version to 1.11.4

---------

Signed-off-by: David Galiffi <David.Galiffi@amd.com>

[ROCm/rocprofiler-systems commit: 6b0627f5b7]
2024-08-07 15:10:30 -04:00
David Galiffi 6b0627f5b7 Create ROCm 6.2 Installers (#369)
* Add ROCm 6.2 to CPACK workflow.

* Update APT-Get packages

  - hipcc is no longer included in hip-runtime-amd meta packages. This change standardizes the installs with the other OSes.

* Bump version to 1.11.4

---------

Signed-off-by: David Galiffi <David.Galiffi@amd.com>
2024-08-07 15:10:30 -04:00
Jaydeep Patel 912de7ab44 SWDEV-474937 - Fix race condition between main and work thread on windows.
Change-Id: I4d6b9de41d0e5a39094eb3babe47dffde72e0587
2024-08-07 14:29:14 -04:00
Satyanvesh Dittakavi 42d383619c SWDEV-465195 - Fix disabled test Unit_hipDrvGetErrorString_Positive_Basic
Change-Id: Ifc05f3c5d09266b9eec9ac20a6a3301be00f91d8
2024-08-07 14:22:01 -04:00
Satyanvesh Dittakavi 08f9020343 SWDEV-465152 - Fix and enable the test Unit_hipMemAdvise_AccessedBy_All_Devices
Change-Id: I160d67898898251e3aad7f3b58fe4f60e4186ea8
2024-08-07 14:19:35 -04:00
Ian Trowbridge cd2ff0250e SWDEV-474739: Added flag to optionally remove serialization for counter collection mode
Change-Id: I2e91fd51287fe923ec6a97b491f84f0dd9d51f62
2024-08-07 11:36:16 -05:00
Ian Trowbridge f731ae7593 SWDEV-474739: Added flag to optionally remove serialization for counter collection mode
Change-Id: I2e91fd51287fe923ec6a97b491f84f0dd9d51f62


[ROCm/rocprofiler commit: cd2ff0250e]
2024-08-07 11:36:16 -05:00
Alex Xie 5f775b8b7f SWDEV-444098 remove "rocm-ocl-icd" package
This is the first step to remove rocm-ocl-icd.
We don't build amd icd after this commit.
We still need to remove header files usage in future steps.

Change-Id: Ic4ac5476180f9ef2ce87b62891c08b28d6c9bfd2
2024-08-07 11:29:41 -04:00
amd-jmacaran 48eab71214 SWDEV-458516 - External CI: Align with branch naming convention.
Change-Id: I1546a601b49f84bd24837e03f9350dc7d35af510
2024-08-07 03:41:39 -04:00
David Yat Sin 2853bf03f0 Add new system event for memory errors
Currently, the only error type is HSA_AMD_MEMORY_ERROR_MEMORY_IN_USE,
which happens when a user application incorrectly tries to free memory
that is currently being used by underlying device hardware.

Change-Id: I8ce352eb9719694135fba1fa56d62368036b2e5e
Signed-off-by: Chris Freehill <cfreehil@amd.com>
2024-08-07 02:59:00 +00:00
Saleel Kudchadker 26e105d9ab Initial external logging API
New API to accept a file stream for logging

Co-authored-by: David Yat Sin <David.YatSin@amd.com>

Change-Id: Ie09c35ae14ca86a97eb25f61251be287c55d7169
Signed-off-by: Chris Freehill <cfreehil@amd.com>
2024-08-07 02:59:00 +00:00
Jonathan R. Madsen 64af2d71ef Fix hsa_amd_vmem_address_reserve_align_fn addition
- https://gerrit-git.amd.com/c/hsa/ec/hsa-runtime/+/1058280 erroneously placed the new function pointer in the middle of the struct instead of the end

Change-Id: I49d1fa86a86764138250cd0471df1915a756d1ca
Signed-off-by: Chris Freehill <cfreehil@amd.com>
2024-08-07 02:59:00 +00:00
Chris Freehill c48b858093 Update documentation
Sync with the latest changes from upstream repo

Change-Id: I309880f5c7f77c58a8b186db320bbc0f0e634089
2024-08-07 02:58:34 +00:00
SrirakshaNag b57f5ccee1 fixing rocprofv3 doc (#1007)
[ROCm/rocprofiler-sdk commit: 403ab6efb1]
2024-08-06 12:39:09 -05:00
SrirakshaNag 403ab6efb1 fixing rocprofv3 doc (#1007) 2024-08-06 12:39:09 -05:00
Vladana Stojiljkovic 4f4b13e498 SWDEV-477711 - Add mapping for hipTexrefGetAddressMode
Change-Id: I8c721921760f0f09f2d93879eeeb97f457da6c58
2024-08-06 11:33:46 -04:00
Ranjith Ramakrishnan aa8a83815e Prevent the modification of interpreter directives
CPACK is converting /usr/bin/env python3 to /usr/libexec/platform-python in RHEL8.
Undefining __brp_mangle_shebangs will prevent the same

Change-Id: I0803d0a6cc1ddc991e8e9a8e6617436930ef013a
2024-08-06 10:54:27 -04:00
Vladana Stojiljkovic eb16d72255 SWDEV-432785 - Remove the mapping of __shfl* to __shfl*_sync functions on CUDA
Change-Id: I93d2ce360b834b3da01731cabc22841f7d0a092d
2024-08-06 04:38:05 -04:00
Jaydeep Patel 8e80429b87 SWDEV-457316 - Release graph exec before stream gets deleted.
Releasing graph exec after wait completes and before delete hip::stream obj
during stream destroy.

Change-Id: I1d68aa8d844f7d3af330c6d09c44af07f8553551
2024-08-06 00:39:37 -04:00
Jaydeep Patel b0047d690a SWDEV-465220 - Validate stream on which Kernel is planned to be launched.
Change-Id: I34c679bd888c275584c11ad3e8346d4d542976f9
2024-08-06 00:31:22 -04:00
Jaydeep Patel d954eb64db SWDEV-457316 - Multiple graph exec can be for given stream.
Change-Id: I0f1b184eb63e0432119d62f094637d375a3d4e55
2024-08-06 00:31:04 -04:00
Marko Arandjelovic ba9c7c3f21 SWDEV-476823 - Add mapping to cuTexRefGetAddress
Change-Id: I51fbcf704ae585d13a08537eaae30243b4c52d49
2024-08-05 14:46:19 -04:00
Marko Arandjelovic fe927012cb SWDEV-477086 - Add mapping to cuTexRefGetArray
Change-Id: I3a1b96a2a0c8d4281cdc934aa582a86f24d80b28
2024-08-05 14:46:10 -04:00
Ranjith Ramakrishnan 6908160870 SWDEV-476075 - Prevent the modification of interpreter directives
CPACK is converting /usr/bin/env python3 to /usr/libexec/platform-python in RHEL8.
Undefining __brp_mangle_shebangs will prevent the same

Change-Id: Id285e2cea1de583853cec17eccf0a3a794cca643


[ROCm/rocm_smi_lib commit: 1b828b735b]
2024-08-05 09:50:04 -07:00