Commit Graph

8 Commits

Author SHA1 Message Date
Giovanni Lenzi Baraldi 75eb06dc18 Add realtime clock agent info to ATT records (#319)
* Add agent info to ATT records

* Fix names

* Update projects/aqlprofile/src/pm4/sqtt_builder.h
2025-08-14 13:35:00 +02:00
Baraldi, Giovanni 0542860ef8 Adding timestamp marker into SQTT buffer for gfx9 GPUs (#200)
* Adding TS Marker

* Apply suggestions from code review

Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com>

* Add option to enable/disable RT

---------

Co-authored-by: Giovanni Baraldi <gbaraldi@amd.com>
Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com>

[ROCm/aqlprofile commit: 926ec4a56f]
2025-08-07 19:55:04 +02:00
Baraldi, Giovanni 4f8231fcc9 Adding high bits for ATT buffer size (#171)
* Adding high bits for ATT buffer size

* Copilot review comments

* Add buffer limits

* Update src/pm4/sqtt_builder.h

---------

Co-authored-by: Giovanni <gbaraldi@amd.com>

[ROCm/aqlprofile commit: 0bb1a61e82]
2025-07-22 18:53:55 -04:00
Ma, Bing a75174f855 [SPM] Clean up obsolete SPM logics and refine some SPM-related definition (#157)
* Clean up obsolete SPM logics
* Add PERFCOUNTER_SELECT1 to CounterRegInfo
* Add RLC_SPM_PERFMON_SAMPLE_DELAY_MAX

[ROCm/aqlprofile commit: 6f236ffb5f]
2025-07-18 15:26:44 -07:00
Ma, Bing 5b758bcdc4 [pmc_builder] Centralize the programming for GFX_INDEX and PERFMON_CNTL (#133)
Prepare multiple GC instances with different programming sequence for GFX_INDEX and PERFMON_CNTL.

[ROCm/aqlprofile commit: 7710e8bca3]
2025-07-01 09:22:46 -07:00
Bhardwaj, Gopesh 4117f4de75 Adding tests for code coverage (#82)
* Adding tests for code coverage

* integration tests

* Fixing gtest dependencies

* Removing gmock linkage

* build fixes

* Fixing Analyze job

* CMake updates

* Fixing PSDB

* Addressing feedback

* Adding licenses

* Addressing feedback

* updating dashboard

* more API tests

* Addressing feedback

* correcting Macro

* preloading libintercept

[ROCm/aqlprofile commit: eca6739e13]
2025-06-12 19:13:44 +05:30
Ma, Bing c50a8225ae [gfx12] Finalize support for gfx12 new counter blocks (#81)
1. Move all new gfx12 block enums to aql_profile_v2.h. hsa_ven_amd_aqlprofile.h will be left untouched.
2. Re-org counter info in gfx12_block_info.h to be purely alphabetic-ordered for easy comparison between different IP versions. Also use auto-gen block name from IP header files whenever possible to reduce manual editing.
3. Remove unused counter info from graphics blocks.
4. Added UTCL2 and VML2 support
5. Added all gfx12 blocks to ctrl test

[ROCm/aqlprofile commit: b20803e95d]
2025-05-29 15:14:09 -07:00
Evgeny 7c4369bde4 Initial Commit
Contributors:
Ammar ELWazir <aelwazir@amd.com>
AravindanC <aravindan.cheruvally@amd.com>
Benjamin Welton <bewelton@amd.com>
Ma, Bing <Bing.Ma@amd.com>
Chun Yang <chun.yang@amd.com>
Cole Nelson <cole.nelson@amd.com>
Ethan Stewart <ethan.stewart@amd.com>
Evgeny <evgeny.shcherbakov@amd.com>
Freddy Paul <Freddy.paul@amd.com>
Giovanni Baraldi <gbaraldi@amd.com>
Gopesh Bhardwaj <Gopesh.Bhardwaj@amd.com>
Icarus Sparry <icarus.sparry@amd.com>
itrowbri <Ian.Trowbridge@amd.com>
James Edwards <JamesAdrian.Edwards@amd.com>
jatang <jatang@amd.com>
Jeremy Newton <Jeremy.Newton@amd.com>
Jonathan Kim <jonathan.kim@amd.com>
Kent Russell <kent.russell@amd.com>
Kiumars Sabeti <kiumars.sabeti@amd.com>
Lang Yu <lang.yu@amd.com>
Laurent Morichetti <laurent.morichetti@amd.com>
Mallya, Ameya Keshava <AmeyaKeshava.Mallya@amd.com>
Manjunath Jakaraddi <manjunath.jakaraddi@amd.com>
Mark Laws <markdavid.laws@amd.com>
Mohan Kumar Mithur <Mohan.KumarMithur@amd.com>
Nicholas Curtis <nicurtis@amd.com>
Nirmal Unnikrishnan <Nirmal.Unnikrishnan@amd.com>
Parag Bhandari <parag.bhandari@amd.com>
Ranjith Ramakrishnan <Ranjith.Ramakrishnan@amd.com>
Robert Gregory <Robert.Gregory@amd.com>
Saravanan Solaiyappan <saravanan.solaiyappan@amd.com>
Saurabh Verma <saurabh.verma@amd.com>
Srihari Uttanur <srihari.u@amd.com>
Srinivasan Subramanian <srinivasan.subramanian@amd.com>
Sriraksha Nagaraj <Sriraksha.Nagaraj@amd.com>
Sushma Vaddireddy <svaddire@amd.com>
Xianwei Zhang <Xianwei.Zhang@amd.com>


[ROCm/aqlprofile commit: 1ed169e30c]
2025-05-28 10:10:47 -05:00