İşleme Grafiği

70 İşleme

Yazar SHA1 Mesaj Tarih
Felix Kuehling c3c36d0afd Cosmetic changes to kfd_ioctl.h
Make it more similar with upstream.

Change-Id: I982ccfd4045d96e3c30bc84d38d0e03db8de9b08
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 7495e74257]
2018-05-31 13:17:27 -04:00
Felix Kuehling 212b7f50dd Update KFD-Thunk ioctl ABI to match upstream
- Clean up and renumber scratch memory ioctl
- Renumber get_tile_config ioctl
- Renumber set_trap_handler ioctl
- Update KFD_IOC_ALLOC_MEM_FLAGS
- Renumber GPUVM memory management ioctls
- Remove unused SEP_PROCESS_DGPU_APERTURE ioctl
- Update memory management ioctls
    Replace device_ids_array_size (in bytes) with n_devices. Fix error
    handling and use n_success to update device_id arrays in objects.

This commit breaks the ABI and requires a corresponding KFD change.

Change-Id: Ibf0af5a5188e817c886eab388d1533130fc18293
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 571e2cf7e4]
2018-05-31 13:17:27 -04:00
Philip Yang 09aff7edc9 Export microcode version of sDMA
Change-Id: I86fa5da5e72af13a2e76e6e3be4667a7220923d5
Signed-off-by: Philip Yang <Philip.Yang@amd.com>


[ROCm/ROCR-Runtime commit: 1bf93d4e89]
2018-03-19 08:38:50 -04:00
Felix Kuehling ea79b3d1da Update kfd_ioctl.h from kernel
This adds new acquire_vm ioctl.

Change-Id: Ia6794bfd291706cecdb2d06f4902b324b48577df
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 19dacdecd3]
2018-03-09 16:36:52 -05:00
Laurent Morichetti 84945d39f8 Silence Valgrind warnings
Change-Id: I8803f3d310fccd69d0d04b2464b00dccc40270e3
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 056ddbbc82]
2018-01-25 16:48:17 -05:00
Oak Zeng e305dc9c82 Use drm render device to map kfd BOs
Previously kfd device is used to map memory for CPU access.
However this is not compatible with how TTM handles CPU mapping
on eviction - memory won't be unmapped and remapped on restore.
This fixes the issue by mmapping memory using DRM render device.

This patch requires a coordinated kernel driver change to work.
To make it compatible with old kernel driver, some temporary codes
are included. Once the coordinated kernel driver is checked in,
the temporary codes can be removed.



Change-Id: Ie7b304c4a82b7e8d5ab703acb81d66430af4f0bc
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>


[ROCm/ROCR-Runtime commit: 68a2d286ca]
2017-11-02 09:06:26 -04:00
Yong Zhao 1d23f94a9b Update kfd_ioctl.h
Kernel file has been changed recently, so we update the file in thunk.

Change-Id: I359a389fa9d91641114c7fb75f420ee6b16f467a
Signed-off-by: Yong Zhao <yong.zhao@amd.com>


[ROCm/ROCR-Runtime commit: 8126ddc77e]
2017-10-06 14:49:11 -04:00
Felix Kuehling fce3048015 Remove deprecated implementation of hsaKmtMapGraphicHandle
The KFD implementation has been removed and will not be upstreamed.
This API has been superseded by hsaKmtRegisterGraphicsHandleToNodes.

Change-Id: I5f2d8da3260974618cdb6ea3fdcd77d37b82c9cb
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: 374bd89d8c]
2017-06-02 13:52:19 -04:00
Amber Lin dd782c86c0 Implement hsaKmtGetQueueInfo interface
For items in HsaQueueInfo, control stack information comes from KFD, CU
mask information is maintained in Thunk, and others (queue detail error
and queue type extended) are ignored (value = 0) at this point.

Change-Id: Ib21370b0f52b2bb4ebe6a9b4b6ec6139cccb25ca
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: 683fc96325]
2017-06-01 14:15:54 -04:00
Felix Kuehling e5b910be20 Fix KFD ioctl ABI
This change breaks the ABI, and aligns it with the upstream ABI.
It also fixes some ioctl structures that are not 64-bit safe and
consolidates ioctl numbers.

Change-Id: Ib79944721534bd55a5299c5baf7bb5b3246cccd2
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 15764e2897]
2017-05-09 14:59:13 -04:00
Felix Kuehling 2cc06c88ff Switch to cleaned up memory management ioctls
Change-Id: Ib8971ef91138f2a051272b9b57f0ebd480e8e738
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 5eb31b2ebe]
2017-05-04 16:29:37 -04:00
Amber Lin edd6771ef1 Add more non-priv PMC blocks to gfx70x/GFX7
HSA Thunk Spec was updated to include more non-privileged blocks for
profiling. This patch adds those newly added non-privileged blocks for
gfx70x.

Signed-off-by: Amber Lin <Amber.Lin@amd.com>

Change-Id: Id745ac236c871e8e61a128a2460784f9c9c354b6


[ROCm/ROCR-Runtime commit: 9f19acbdb7]
2017-04-25 13:08:10 -04:00
Amber Lin 65f40a36cf Add TCA block to PMC support
Add TCA to PMC tables.

Change-Id: Ia4164ab4581ea3f539706f534f672e5c24f5362f


[ROCm/ROCR-Runtime commit: 73eff30d7d]
2017-03-20 10:22:21 -04:00
Felix Kuehling 3d88b3571b Update kfd_ioctl.h
Copied from kernel repository.

Change-Id: I9ed021cfb5b297d9a91dce93ed6355c95fb1127b
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com>


[ROCm/ROCR-Runtime commit: e5dd2f88c6]
2017-02-27 10:39:05 -05:00
Harish Kasiviswanathan b7f6ed08ee Add API entrypoints for Cross Memory Attach
Implement two new API for cross memory read and write operation.
 - hsaKmtProcessVMRead
 - hsaKmtProcessVMWrite

Add new ioclts necessary for the above APIs.

Change-Id: I0c153e3b4e1f32b7a8b102ad5c774d9ae9bfc2fa
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: e79521b556]
2017-02-17 16:59:51 -05:00
ozeng 6c1bd8034c libkmt: Misc fixes in thunk
1. Translate thunk queue priority to kfd priority
2. Initialize event SyncVar
3. Added HSAint32 data type


Change-Id: I7decc1be7cbe9c84cb670d9a7c99050b62ba98f3


[ROCm/ROCR-Runtime commit: cb0f851560]
2017-02-06 17:19:40 -05:00
Harish Kasiviswanathan 5d2336f1ca Add API entrypoints for IPC functionality
Implement three new APIs for IPC buffer sharing:
	-hsaKmtShareMemory()
	-hsaKmtRegisterSharedHandle()
	-hsaKmtRegisterSharedHandleToNodes()

Add new ioclts necessary for the above APIs.

Change-Id: Ia2b4d0dc91ec64bff959395d11c0536467404792
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: 559e31d6ff]
2016-11-28 16:19:22 -05:00
Harish Kasiviswanathan bd81b76c5a kfd ioctl. Remove unused definitions
Sync the file with Kernel header file

Change-Id: I52d52a38fb38bd4b37d8210ce79775b88c8a985d


[ROCm/ROCR-Runtime commit: 4838f6e740]
2016-11-22 09:44:22 -05:00
Felix Kuehling fee7a91fb9 Allocate and map doorbells in SVM for discrete GPUs
Allocate doorbells for dGPUs in the SVM aperture and map them for
GPU access. This is necessary to allow GPU-initiated submissions to
user mode queues.

Depends on new doorbell BO allocation flag in KFD.

Change-Id: I0737bef4a4764bb4a66c43846707ead2108f6601


[ROCm/ROCR-Runtime commit: 2e0a6eb371]
2016-09-16 16:04:27 -04:00
Amber Lin 8a1cef5fbb Add pointer attributes API
Add two pointer attributes APIs:
hsaKmtQueryPointerInfo - allow the user to query the memory information
    using a pointer. This pointer can point to any address inside the
    range known to HSA.
hsaKmtSetMemoryUserData - allow the user to attach data to a pointer to
    add memory tracking information. This pointer must match the start
    address of a memory allocation or registration.
TODO: This patch implements support on dGPU. Needs to add APU.

Change-Id: I4711809274248434901f0794f50ebfa13a7371a8


[ROCm/ROCR-Runtime commit: 51e4d27c37]
2016-09-07 17:24:46 -04:00
Yong Zhao cba37c251c Implement hsaKmtGetTileConfig in thunk
Change-Id: Iba8d8efa46e3c268a03442d3db568e1b19230e94


[ROCm/ROCR-Runtime commit: 8351b3d2e8]
2016-09-06 16:24:29 -04:00
Lan Xiao 742354161b libhsakmt: Add MarketingName and AMDName for all nodes - CPU & GPU
HSA thunk API is currently reporting engineering name to MarketingName
and returning NULL when querying for AMDName.

-Change current name reporting from MarketingName to AMDName.
-Use libpci to get MarketingName



Change-Id: I819a6de7b067a2e724a6695e7d800274b83a71f8
Signed-off-by: Lan Xiao <Lan.Xiao@amd.com>


[ROCm/ROCR-Runtime commit: 9cbbf30be7]
2016-08-23 10:49:27 -04:00
shaoyunl 0c6a45ca49 Add Imprecise flag for memory access fault
KFD may not be  able to provide the precise VM fault address and status.
This flag will indicate whether the event data has the fault details

Change-Id: I15ffd5c25f555003c6450cc0700efb769418f76b


[ROCm/ROCR-Runtime commit: 79077811f5]
2016-03-14 15:17:17 -04:00
Felix Kuehling a31106ee4c Report SVM heap in topology
The Runtime requested this information so they can tell easily
whether a pointer is part of HSA shared address space or not.


Change-Id: If2041ed34031636677d692bc2dc6625634027ed4


[ROCm/ROCR-Runtime commit: 0ed29f5191]
2016-03-14 11:52:36 -04:00
Harish Kasiviswanathan 2f015053b2 Sync IOLINK defines to thunk spec
Current thunk spec v1.07 dated Feb 1, 2016

Change-Id: Ie1821f7f1903ac48b76cb68d452a6073d3a3c8d9


[ROCm/ROCR-Runtime commit: 1c1bc32477]
2016-03-11 18:59:57 -05:00
Felix Kuehling 029002d073 Add support for hsaKmtRegisterGraphicsHandleToNodes
Change-Id: I6fd7154dea78188480d5cb89ac237bad572356c4


[ROCm/ROCR-Runtime commit: 61ec3df2f9]
2016-03-10 11:16:02 -05:00
Felix Kuehling e2d2d6bd32 Update kfd_ioctl.h from kernel
Change-Id: I9852ef2e33e1f3b24343747e3c1c09b0050ffdc1


[ROCm/ROCR-Runtime commit: cb0315d31d]
2016-03-09 10:55:12 -05:00
Yair Shachar 4c543389c7 name unnamed struct within HsaMemMapFlagd union
For aligning with RT definitions

Change-Id: I4dca0c5818fdcea6c596a48c7516835fc595a289
Signed-off-by: Yair Shachar <Yair.Shachar@amd.com>


[ROCm/ROCR-Runtime commit: c42ec0b82c]
2016-03-07 18:43:03 +02:00
Felix Kuehling 99325bf7c4 Add support for register/deregister memory for dGPU
Allocate SVM address space for the registered memory and use new
userptr support in KFD to create a system memory BO associated with
the given user pointer. Map this BO at the SVM address for CPU
access.

MapMemoryToGPU can be used with the registered user pointer and
will return the SVM address as alternate GPUVA.

Change-Id: I4886e193c51fb6870a567878870c36bf8b5c3748


[ROCm/ROCR-Runtime commit: 85f9efb1a0]
2016-02-16 18:12:05 -05:00
Ben Goz 18aab410cc Adding support to hsaKmtMapMemoryToGPUNodes
Change-Id: Iab6222402a43c3cd31b0efc5a316a6482986258e
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: 7070f7ec5e]
2016-02-09 17:34:29 +02:00
shaoyunl 4c5a3ca774 libhsakmt: Use GPU ID instead of Node ID in set_process_dgpu_aperture
Change-Id: I0e66ca4a018c15c009a3516d250f0044a4407878


[ROCm/ROCR-Runtime commit: 7e40877e81]
2016-02-04 10:32:23 -05:00
Ben Goz 07a0c70dd5 Adding HsaMemMapFlags struct
Change-Id: Ib0ee6dede1169582fd58bfca648347c3f8aa0b54
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: e37863d7f2]
2016-01-31 05:16:53 -05:00
Harish Kasiviswanathan add443f1ef Use new ioctl for getting process apertures
Change-Id: I73678744ad73942edec442ad9c6d38637f7e1235


[ROCm/ROCR-Runtime commit: e7e1361c3d]
2016-01-12 12:09:25 -05:00
Felix Kuehling c89d3124d9 Implement hsaKmtRegisterMemoryToNodes
Fix hsaKmtRegisterMemory to be a no-op for now and move the multi-GPU
implementation to hsaKmtRegisterMemoryToNodes. Make GPU memory mappings
of host memory visible to all GPUs by default. Device memory is still
visible to the allocating GPU only by default (but can be overridden
with hsaKmtRegisterMemoryToNodes for experimenting with P2P).

Change-Id: I73408afbe3b10c8dad2ab3a780f58413249692e6


[ROCm/ROCR-Runtime commit: 063ad3ad9e]
2016-01-08 16:00:23 -05:00
Ben Goz 2fa7eef572 Adding support for mGPU
Change-Id: I5ed184e6a58b38d9dde48867f14513d161cf41a9
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: ea0f9d2a0b]
2016-01-04 15:35:15 +02:00
Ben Goz a511b7c4f7 Adding support for new AQL Queue Memory allocation
Change-Id: If84fc4b961627dbdd0b77b1c509a3c9a4c709b9f
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: e61500c46e]
2015-10-22 13:13:54 +03:00
Felix Kuehling 8f0b7e6a76 Update HsaMemFlags.ui32.CoarseGrain comment
As advised by Paul Blinzer

Change-Id: Icabf4acd94866ddbbe53faf48a71e1113f0c76b6


[ROCm/ROCR-Runtime commit: b94ae66c62]
2015-10-05 16:48:50 -04:00
Felix Kuehling 048207626a Add CoarseGrain memory flag
Change-Id: If8ac0339ae8c809c6e6a4f56592a4061d110ea94


[ROCm/ROCR-Runtime commit: f2f45cc0e4]
2015-09-30 18:07:04 -04:00
shaoyunl d30daaba5d Initiali support for CWSR on thunk
1. Add IOCTL defines to set trap handler
2. Add control stack size information on create queue argument.
3. Increase the total save&restore area size for carrizo to include the control stack size.

Signed-off-by: Shaoyun Liu <Shaoyun.liu@amd.com>

Change-Id: Iccf15e073b7db2519e96e7f7b46a89d57ab9a4df


[ROCm/ROCR-Runtime commit: 2d63ee7b8f]
2015-09-25 15:12:25 -04:00
Amber Lin 2470a3e67b Sync up HSA_ENGINE_ID type with Windows/Perforce
HSA_ENGINE_ID in Perforce added ui32 to the typedef while in Git it doesn't.
This causes conflicts to RT applications. Decision being made is to change Git
to match Perforce.

Change-Id: I7e9c6437b023bb23ec9578737f8534e9453589b9


[ROCm/ROCR-Runtime commit: 082f8314c4]
2015-09-24 00:10:52 -04:00
Ben Goz 1b2fd315ac Adding new memory allocation IOCTL
Change-Id: I0eb1924811a2e1e436296ebe632d8f112a61637d
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: 692e004047]
2015-09-21 13:58:32 -04:00
Ben Goz 9db147f2d4 Support gfx802 dGPU
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: fb8378a18b]
2015-08-30 14:13:53 +03:00
Amber Lin 92e34fcda6 Enable version info via thunk interface
- Replace HSAuint32 with HSA_ENGINE_ID for EngineId type so it explicitely
  presents version information for ucode and GfxIP
- Created a GfxIP lookup table to pass the version information. This lookup
  searches for matching device ID.

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Acked-by: John Bridgman <John.Bridgman@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: a3925a3a19]
2015-07-31 14:56:33 -04:00
Flora Cui 0f0e28cbdb Add interface to set CU mask
Signed-off-by: Flora Cui <flora.cui@amd.com>
Acked-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: fc4e07daa3]
2015-07-23 15:44:01 +08:00
Moses Reuben 9faf7b957c adding support for scratch memory
Signed-off-by: Moses Reuben <moses.reuben@amd.com>


[ROCm/ROCR-Runtime commit: 29c083f695]
2015-07-21 16:43:23 +03:00
Oded Gabbay b7d9879a36 increase event limit to provide 4K events
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>


[ROCm/ROCR-Runtime commit: 2e76017278]
2015-05-18 11:01:42 +03:00
Oded Gabbay 703ffebb96 Increase limit of signal events to 4096
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
Reviewed-by: Ben Goz<ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: a70a98b30b]
2015-05-03 13:58:10 +03:00
Oded Gabbay 99b25b95c7 Add missing DoorbellType field to HSA_CAPABILITY
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>


[ROCm/ROCR-Runtime commit: eb2d3cfcdf]
2015-05-02 12:10:04 +03:00
Oded Gabbay b6c7551747 Revert "Add execution property in register memory for gfx801."
This reverts commit abf7770d46.


[ROCm/ROCR-Runtime commit: 4c4df38035]
2015-04-28 17:50:00 +03:00
Xihan Zhang abf7770d46 Add execution property in register memory for gfx801.
Signed-off-by: Xihan Zhang <xihan.zhang@amd.com>


[ROCm/ROCR-Runtime commit: 5ed05c99b3]
2015-04-10 22:26:44 +08:00