Commit Graph

19 Commits

Author SHA1 Message Date
Danylo Lytovchenko f7338717ae SWDEV-470698 - fix formatting, add format check workflow (#657) 2025-08-20 19:58:06 +05:30
Jatin Jaikishan Chaudhary 8b1d0cff83 Revert "SWDEV-505971 - change setArgument arg from uint32_t to uint64_t"
This reverts commit 0830d95f6d.

Reason for revert: There needs to be memcpy size change

Change-Id: If4f51769731e54743ac705b19b4f81b2d5925d5a


[ROCm/clr commit: 446ed661a0]
2025-01-06 18:03:23 -05:00
Jatin Chaudhary 0830d95f6d SWDEV-505971 - change setArgument arg from uint32_t to uint64_t
We are passing this arg as an address, and memcpy complains about
overreading (8 bytes instead of 4).

Change-Id: Ica9207f6c5f6056a4bfc968280c76e779ded13ae


[ROCm/clr commit: a6f2a2c2af]
2025-01-06 08:16:59 -05:00
Sourabh Betigeri 7261404002 SWDEV-440866 - [hip-roclr] Adds support to batch memory operations APIs
Change-Id: I5ac63a6626af8c2b4ac382c52dfe1aaf0b3716b8


[ROCm/clr commit: 03dbcd8ca7]
2024-12-12 19:29:24 -05:00
Sourabh Betigeri 1712acdd2e Revert "SWDEV-440866 - [hip-roclr] Adds support to batch memory operations APIs"
This reverts commit ab0ff9163d.

Reason for revert: hipInfo fails on windows. Updating llvm amd-mainline-closed

Change-Id: I57e1fa1945188b0bc0a799c4f3d540f2b7713003


[ROCm/clr commit: 2ca644cf22]
2024-12-02 16:46:12 -05:00
Sourabh Betigeri ab0ff9163d SWDEV-440866 - [hip-roclr] Adds support to batch memory operations APIs
Change-Id: I449ffca44bbb04d13348d112e896d603c70fd485


[ROCm/clr commit: bd5d8e9baf]
2024-11-30 17:54:32 -05:00
Ioannis Assiouras 407d1346f2 SWDEV-463865 - changed device,roc and pal namespaces to be nested under amd
Change-Id: Icad342843c039c634e249a13a7aa31400730b1dd


[ROCm/clr commit: 775dc204aa]
2024-06-07 12:23:06 -04:00
Anusha GodavarthySurya 379781ea65 SWDEV-364576 - initialize device malloc heap state using blit kernel
Change-Id: I5d0172aff7d2c04b322a4d828b8a2b438158b80f


[ROCm/clr commit: 274f2de391]
2023-01-07 06:53:53 +00:00
Ioannis Assiouras 733c8d1d1c SWDEV-369581 - Convey copy API metadata to ROCclr
Change-Id: I569462d6d268700d419510255e201bf7d80d6714


[ROCm/clr commit: 72b45e2a1f]
2022-12-09 00:27:15 -05:00
Ajay c2a7fe7bd6 SWDEV-347670 - GPU StreamWait and StreamWrite support in Windows PAL backend
Change-Id: Ic4881305b6332e217f3d3127dce7e9d9d0a7df11


[ROCm/clr commit: 373a7d1195]
2022-09-15 13:57:40 -04:00
kjayapra-amd 31c0525344 SWDEV-305527 - Changes to handle memset blit kernel that takes width, height and depth. This also fixes SWDEV-317261.
Change-Id: Ic85f63a95d9d8f48884fc8c7fd95cbb496dfbbca


[ROCm/clr commit: 7fb80a027a]
2022-03-31 09:02:33 -04:00
Saleel Kudchadker 36ec8c8871 SWDEV-297448 - Add 64bit and 16bit write support
For the fillBuffer shader, if there are two 32bit writes to a MMIO
register, it can get dropped. It has to be a single 64bit write.
Add optimization to fillBuffer to write 64bit and 16bit writes.

Change-Id: I3aa78e027898f8ae01e9c8f09004615673720c2b


[ROCm/clr commit: 21ba34d0fe]
2021-09-08 12:30:04 -04:00
agunashe 49f0546637 SWDEV-293742 - Update copyright end year VDI repo
Change-Id: I69d2fea4a7a43adf96ccea794270e4af991c5261


[ROCm/clr commit: d96481fb36]
2021-08-22 23:56:07 -07:00
Ravi C Akkenapally 6629930067 SWDEV-179105 - Stream Operations: Add support for Wait and Write
Change-Id: Ibffa1d6d573826b64763da280074a77271d66808


[ROCm/clr commit: 0a5f9a3b10]
2021-02-15 17:02:38 -08:00
Jason Tang 6778b6e4e2 SWDEV-263539 - More Target ID fix in GSL path
On behalf of Tony Tye. The bootleg passes CQE Baffin/Ellesmere test.

Change-Id: I4c21d21b3aaba360682ef15b8a4dda239f8af276


[ROCm/clr commit: d4316141b7]
2020-12-14 16:48:55 -05:00
Anusha Godavarthy Surya de10e7e1e6 SWDEV-244600 - HIP BLIT code object needs to have reserved symbol name
Change-Id: I8401fea5eab71c0f7414eec0666066d9553a6622


[ROCm/clr commit: 093f7fa3ca]
2020-08-06 01:14:06 -04:00
Tao Sang 44eb207f8d Apply constexpr on global constant varaibles
When HIP_ENABLE_DEFERRED_LOADING=0, many global variables will be
referenced but they are not initialized in that early time. The patch
will use constexpr to initialze global constant varables in compile
time.

Change-Id: I9d538b7abc6a0ce700ec3332b97fc144db5fc1ef


[ROCm/clr commit: fdef6f722f]
2020-07-22 22:14:13 -04:00
Laurent Morichetti e284923583 Update copyright info
Change-Id: Ia4f9ff0f5f873b4223a8cca154188bb0d2f1abba


[ROCm/clr commit: b4c6143a2f]
2020-02-04 09:26:14 -08:00
Laurent Morichetti 011f3e945b Merge branch 'origin/pghafari/vdi-prototype' into lmoriche/amd-master
Change-Id: Id3b833d405596735becb3346f3b08c6da57033fe


[ROCm/clr commit: 20c7173849]
2020-01-30 20:12:13 -08:00