In rocrtst helper_funcs.h, a function argument that gets
written to was previously incorrectly marked as const.
Change-Id: If8cc6555ebfa974b9665d9d5b93de01bb45fde2c
Since "libhsakmt: Prevent hsaKmtRegisterMemory* from registering non-userptr",
non-userptr is not allowed to be pinned any more.
Use hsa_amd_agents_allow_access to map host memory.
Change-Id: I898d2f83222907de58cafc1a2b18a636634d1b20
Signed-off-by: Lang Yu <lang.yu@amd.com>
Signed-off-by: Chris Freehill <cfreehil@amd.com>
This reverts commit b156e906d9c192bd487d10a8900e3eb6090ef547.
Reason for revert: Memory violation test causing a timeout in subsequent test.
Change-Id: If3a217575af545a47d6d67bebba4a2c640a43b81
Signed-off-by: Chris Freehill <cfreehil@amd.com>
Add target gfx1200 to several files.
Add cases for GFX12 in a few switch statements.
Signed-off-by: David Belanger <david.belanger@amd.com>
Change-Id: Ib90032f5b9d5a3306060f13a43d970108a1399df
Signed-off-by: Chris Freehill <cfreehil@amd.com>
Create a new top-level CMakeLists.txt file to control building thunk
and ROCr. kfdtest and rocrtest are built separately.
Most of the cmake code that existed for thunk, ROCr, rocrtst and kfdtest
still reside in their respective CMakeLists.txt files, except the
CPack packaging directives which have been moved to the top-level
CMakeLists.txt.
Change-Id: I1a537359029504af8b1abb324bc6f0d75d98471e
This test may fail when run on non-upstream versions of KFD as this
feature will not be upstreamed.
Change-Id: I7131e1f50984739c0df12e4c9afe790bd7e4cdfa
Add test to verify whether GPU shaders can read memory created using VMM
APIs.
Split VMM rocrtst to two separate groups: Basic and Access tests
Change-Id: Iead8d46125580c71ccd582e967c8e2e891e75c5e
Add tests to catch whether ROCr breaks ABI compatibility with the
hsa_amd_pointer_info API in case the hsa_amd_pointer_info struct is
extended.
Change-Id: I4e69bf30db9791e59f895b2798b87985c41242e5
The old max memory search algorithm is using Binary Search
algorithm to find last successful memory allocation. But each
successful memory allocation takes times. Since the unsuccessful
memory allocation returns very quick. Changing the search algorithm
to find first successful memory allocation starting from MAX, each
testing step with granularity interval will speed up this test.
Change-Id: Idada3c6f750c94f3bb223f4f3bff4e4ebd3e98f7
Signed-off-by: James Zhu <James.Zhu@amd.com>
Skip Extended-scope memory pool as allocation is very close to
fine-grain/coarse-grain but with just different PTE flags.
Only test coarse grain on CPU agent other than the first CPU agent.
Stop bisecting the max size once we are withing 5% to total size for
these pool to speed this test on large memory pools.
Change-Id: I77d1b45a1752ef092dda7c7f27723ea0a292a612
Remove override that forces ROCr image blit source and ROCr test to use
code object version 4 now that mainline has been updated to version 5.
Change-Id: I94681e86835c0e382475306ead4cd4132a2ee78f
Reverting this as current mainline compiler branch does not support
gfx1150/gfx1151 yet. Will bring back later.
This reverts commit e877840197.
Change-Id: I31ff4fb2d5817538094a7ffaeba96dd6a7d660c7
Compiler behavior is undefined if the right operand is negative,
or greater than or equal to the width of the promoted left operand.
For release builds with address sanitizer enabled, this compiler
optimization behavior leads to unsupported queue size value since
current method shifts till 128 bits on a 64 bit value.
Change-Id: Iddcc15b43d2331bc8bf5fc3aa4725f76844655ec
Signed-off-by: Sreekant Somasekharan <sreekant.somasekharan@amd.com>
Removing this definition as this should already be defined by compiler.
This is causing compile errors on newer versions of llvm because the
macro is being redefined.
Change-Id: Ica6a06f46a14e16d3f52e83b9b5ee8cfd7359510
A patch was made in gfx940 npi branch to move the kernel object file
loading to outside the rocrtstNeg.Queue_Validation_* main queue creation
and submission loops, and added a clear_code_object() after the loop.
Another patch was made to the non-npi branch which adds a
clear_code_object() inside the loop. When the npi branch patch was
merged, this was causing the code object to be cleared at the end of
the first loop. Remove these clear_code_object() calls.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Id4188e78411e81c5071bf715c1f02491f571ab79
Throw runtime error instead of returning empty string when open() fails
in LocateKernelFile()
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Iafa360fbc2d3c9b01b9fe7ea4c11d70bd254ccce
Adding support for gfx941 and gfx942 ISAs.
gfx940 ISA will use sc0:1 sc1:1 on load/store operations
gfx942 ISA will use default load/store operations
Change-Id: If1efbef86f59e2cf2d48fe359cd4166405a0a579
Negative queue validation tests were doing many redundant from-file
kernel object loads in a loop. This was creating many simulataneous open
file handles within many dynamically allocated CodeObject objects. While
the CodeObject class implements RAII on the file handles to cleanup on
destruction, clear_code_object() only gets called on the destruction of
the TestBase-derived test objects (these being a suite abstraction).
Due to this we were hitting file open() EMFILE errors (too many open
files) in gfx94x CPX mode. Move LoadKernelFromObjFile outside of the
test loops and clear_code_object() for each test on each agent.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I6f9d23fd122720c49a58c22698f097906d2fc97c
The function IDs used to be 0 on previous asics but on gfx94x and newer
asics, these bits are set. These bits are used by user applications to
uniquely identify the locations of GPU nodes. These exta bits break
hwloc and are not needed for rocrtst.
Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Signed-off-by: David Yat Sin <David.YatSin@amd.com>
Change-Id: I1202f504645b0662d009b9c0926eebb7ddc08d73
Copying memory from device to host with a CPU agent
would cause a poor performance due to the reading of
uncahced device memory by CPU.
Fix it by using a GPU agent.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Change-Id: Ia3b562758fe73ef9efaa284f47e67bf569cc7b7b
Temporarily force rocrtsts to use Code Object V4 while compiler team is
about to switch the default Code Object to V5. Will switch back to using
default compiler setting once everything is tested/fixed.
Change-Id: I18e5c6771fffd8c60792fc197501d373c7ec22f3
Update rocrtst packaging to add dependency on rocm-core so that rocrtst
gets uninstalled when rocm-core package is removed
Depends-On : I1e7ed52d7eed2c190d0b5651e7ded7192d7634b5
Change-Id: I7243dd29950b93a2665720a0062816c574f0f640
For APU asics, the default configuration size of video memory is
relatively small, while the reserved region becomes larger in recent
generation asics, ratio of max alloc size to the pool size may below
the expected value, so adjust it.
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Change-Id: I0e847c4c13e957cf6e811d3f379842619cf53370
Chris Freehill
Lang Yu
AravindanC
Yifan Zhang
Shweta Khatri
Sreekant Somasekharan
David Belanger
David Yat Sin
James Zhu
Jonathan Kim
Graham Sider
Mike Li
Ranjith Ramakrishnan
Nirmal Unnikrishnan