Commit Graph

32 Commits

Author SHA1 Message Date
Junhua Shen 9da1572c42 libhsakmt: Refactor for Multi-KFD Context Support (Multiple KFD FDs per Process) (#1701)
* Introduce HsaKFDContext structure and infrastructure for multiple KFD contexts, enabling
   independent contexts within a single process.
* Refactor core components (queue, event, FMM, topology) to be context-aware,
   using explicit HsaKFDContext parameters instead of global state.
* Replace global hsakmt_kfd_fd with context-specific file descriptors, ensuring full context isolation.
* Maintain backward compatibility by redirecting legacy APIs to use the primary context.

This refactoring establishes a foundation for multi-context support while preserving existing functionality.

Signed-off-by: Junhua Shen <Junhua.Shen@amd.com>
2025-11-10 11:19:58 +08:00
David Yat Sin e2f3bd2429 Changes for RDMA with VMM (#801)
* rocr: Add support for VMM and RDMA

Add extra CPU mapping so that kernel-mode drivers can look up the memory
mapping by virtual address.

* Update projects/rocr-runtime/runtime/hsa-runtime/core/runtime/runtime.cpp

Co-authored-by: Yiannis Papadopoulos <102817138+ypapadop-amd@users.noreply.github.com>

* Update projects/rocr-runtime/runtime/hsa-runtime/core/inc/runtime.h

Co-authored-by: Yiannis Papadopoulos <102817138+ypapadop-amd@users.noreply.github.com>

* rocr: Honor uncache flag in memory_lock_to_pool()

Also, combined several flag options used in apis into a
single integer.

Signed-off-by: Chris Freehill <cfreehil@amd.com>

* rocr: Fix hsa_amd_pointer_info on CPU agents

Fix hsa_amd_pointer_info query returning allowd on VMM pointers for CPU
agents when CPU mapping was mapped with PROT_NONE.

---------

Signed-off-by: Chris Freehill <cfreehil@amd.com>
Co-authored-by: Yiannis Papadopoulos <102817138+ypapadop-amd@users.noreply.github.com>
Co-authored-by: Chris Freehill <cfreehil@amd.com>
Co-authored-by: cfreeamd <166262151+cfreeamd@users.noreply.github.com>
2025-10-21 12:19:02 -04:00
Alysa Liu 4342579645 libhsakmt: Fix memory leak for events_page metadata (#807) 2025-10-15 14:52:40 -04:00
David Yat Sin cd48105282 rocr: Fix ext-fine-grain flag on host memory (#1067)
Fix for extended-fine-grain flag not set in thunk when
allocating host memory.
2025-09-25 11:10:43 -04:00
hkasivis 5e7210980e Users/hkasivis/add ais support v2.1 (#928)
* libhsakmt: Update hsakmt_fmm_get_handle to support address range

Currently, hsakmt_fmm_get_handle works only if the address is allocated
(staring) value. Update it so it can find the handle if address falls in
the valid allocated range. This is useful for AMD infinity storage
feature where data needs to be transferred to any memory within in the
allocated range

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>

* libhsakmt: Introduce AMD Infinity Storage (AIS) API

Add hsaKmtAisReadWriteFile() API to support AMD Infinity Storage. The
API moves data directly from GPU VRAM to a file.

v2: Add in/out ioctl arguments to provide more status information to
user space. Modify hsaKmt API also accordingly.

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>

* rocr: Initial implementation of AMD Infinity Storage (AIS)

Implement first two API: hsa_amd_ais_file_write and hsa_amd_ais_file_read

v2: Change API from hsa_amd_ to hsa_amd_ais_
    Change API to take in handle instead of fd for compatibility accross
     different platforms

Original Author: Chris Freehill <Chris.Freehill@amd.com>
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>

---------

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
2025-09-20 11:30:05 -04:00
hkasivis a5713c85bb Users/hkasivis/sync kfd ioctl header (#848)
* libhsakmt: Update ioctl version to 1.18

Sync with kernel ioctl version.

Also explicitly set the ioctl flag to KFD_PROC_FLAG_MFMA_HIGH_PRECISION

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>

* libhsakmt: Sync ioctl header by adding kfd_ioctl_profiler

Sync with kernel ioctl version. Add kfd_ioctl_profiler.

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>

---------

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
2025-09-07 20:04:31 -04:00
hkasivis 53ba025a2e libhsakmt: Don't use MADV_DONTFORK for paged memory (#356)
Also advice parameter of madvise() system call is not a bitmask. So fix
that also

v2: Use MAP_SHARED instead of MAP_PRIVATE. This avoids MMU notifiers and
    evictions.

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
2025-08-15 09:22:20 -04:00
Yiannis Papadopoulos b14bb0f942 libhsakmt: Use numa_node_size64 with long long
[ROCm/ROCR-Runtime commit: ea0a3e8da4]
2025-07-31 18:17:52 -05:00
Xiaogang Chen 9603606d80 hsakmt: Use udmabuf to allocate system memory
This patch uses udmabuf driver to allocate system memory instead of using amdgpu
driver for APU. With this function app can account its consumed system memory by
cgroup mechanism. This function is enabled by env variable HSA_USE_UDMABUF.

Signed-off-by: Xiaogang Chen<Xiaogang.Chen@amd.com>


[ROCm/ROCR-Runtime commit: 996e8bbfb7]
2025-07-28 14:11:17 -07:00
Honglei Huang b0866264b4 libhsakmt: modify is scratch memory helper
- Refactored scratch memory handling by introducing fmm_is_scratch_aperture to
replace repeated for-loops.
- Simplified code paths in hsakmt_fmm_release, hsakmt_fmm_map_to_gpu, and
hsakmt_fmm_unmap_from_gpu by using the new helper.

Signed-off-by: Honglei Huang <Honglei1.Huang@amd.com>


[ROCm/ROCR-Runtime commit: 72061a9024]
2025-07-18 14:25:55 +08:00
Honglei Huang a8e7d69b18 libhsakmt: use uint32_t for loop index variables
This patch changes the type of several loop index variables from int to
uint32_t in fmm.c. The affected functions are:
- __fmm_release
- _fmm_map_to_gpu
- _fmm_unmap_from_gpu

To fix compile warning:

warning: comparison of integer expressions of different signedness:
'int' and 'uint32_t' {aka 'unsigned int'} [-Wsign-compare]
 2009 |         for (i = 0; i < object->handle_num; i++) {

Signed-off-by: Honglei Huang <Honglei1.Huang@amd.com>


[ROCm/ROCR-Runtime commit: 45af009c5d]
2025-07-09 13:15:42 +08:00
Eric Huang 0d5e261f39 libhsakmt: optimize big system buffer allocation
To change biggest single buffer to be huge page aligned
and other optimization.

Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>


[ROCm/ROCR-Runtime commit: afe7965796]
2025-05-26 18:30:00 -04:00
Eric Huang 2c6f84b12c libhsakmt: add big system buffer allocation support
when allocating userptr buffer in system ram with size bigger
than or equal 512G, TTM has limit and returns error, to split one
big buffer into multiple small buffers in vm_object will solve
this issue.

Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>


[ROCm/ROCR-Runtime commit: 8887d25304]
2025-05-26 11:04:30 -04:00
Philip Yang 50886316e9 libhsakmt: unmap from GPU error handling
If unmap from GPU return failed, for example, unmap user queue buffer
while queue is active, we should not free obj->mapped_node_id_array,
otherwise, the following unmap user queue buffer after queue is
destroyed still return failed.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Change-Id: I32aeb18871c2e971d01900d92916c54680f5c9fa


[ROCm/ROCR-Runtime commit: 3e6f51b715]
2025-05-22 10:06:42 -04:00
jordans 938b34da24 hsakmt: Initial Commit for the HSA KMT Model
The over arching goal it so provide an API that pre-silicon models can latch into for software bring up.# Please enter the commit message for your changes. Lines starting


[ROCm/ROCR-Runtime commit: d4b85b6bf5]
2025-03-18 16:22:17 -04:00
Longlong Yao ef1740b88b libhsakmt: set node_id to 0 for OnlyAddress
Signed-off-by: Longlong Yao <Longlong.Yao@amd.com>


[ROCm/ROCR-Runtime commit: 5916467552]
2025-03-11 10:16:58 -04:00
Longlong Yao 082c6b7830 libhsakmt: allocate va in host path
Change-Id: I40a4395aca99ea8dfd8ff0ecde64eb2c3840d867
Signed-off-by: Longlong Yao <Longlong.Yao@amd.com>


[ROCm/ROCR-Runtime commit: 26f001d3cb]
2025-02-15 07:56:45 -05:00
Harish Kasiviswanathan 729f98b05f libhsakmt: gfx950: Add option to enable HIGH_PRECISION
Environment variable HSA_HIGH_PRECISION_MODE can be used to control MFMA
precision

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: Ib78dd9dd8867025e090a3cca96ab6db4f65dea12


[ROCm/ROCR-Runtime commit: 2a64fa5e06]
2025-02-10 16:05:25 -05:00
James Zhu 647b705679 libhsakmt: increase default svm.alignment_order
Since GFX950 can support page table fragment up to 18 without
performance loss. So set GFX950  default svm.alignment_order to 18.

Change-Id: Ibcdb7f041fb07a38e924c471beec261ea227ca1d
Signed-off-by: James Zhu <James.Zhu@amd.com>


[ROCm/ROCR-Runtime commit: 9509af4b98]
2025-01-28 08:27:19 -05:00
Shweta Khatri c5822cee5a Revert "Revert "hsakmt: Only set exec flag when requested""
This reverts commit 5a8092bccf.

Reason for revert: This will put back the change ID - Id1154f08f6ba21c633905fd46b06053994d6f3cc to ROCR repo, which will prevent memory allocations from being automatically granted the 'executable' flag, addressing previously -  incorrect and unsafe behavior in ROCm driver.

Change-Id: I3d45c45859929a80f7791681b411251e099a1901


[ROCm/ROCR-Runtime commit: 2d4a578020]
2025-01-23 09:08:25 -05:00
Apurv Mishra 55064cbb4c hsakmt: modified to free all_gpu_id_array in fmm.c
Add free() for 'all_gpu_id_array' in
hsakmt_fmm_destroy_process_apertures() and
removed it from 'hsakmt_fmm_clear_all_mem()'

Change-Id: I32d2d22e7152f62a3f2e7da4f601f0db7cebd534
Signed-off-by: Apurv Mishra <apurv.mishra@amd.com>


[ROCm/ROCR-Runtime commit: c066ec13dd]
2024-11-28 13:08:03 -05:00
David Yat Sin 5a8092bccf Revert "hsakmt: Only set exec flag when requested"
This reverts commit cfb1ab45ac.

Reason for revert: 
This is currently breaking some tools. Will put it back as soon as tools update their code.

Change-Id: I05c82d443f3a274a618d05e6dc5a87943f5dc7a4


[ROCm/ROCR-Runtime commit: 80da7d5ee4]
2024-10-16 20:31:27 -04:00
Shweta Khatri 42043a59ea hsakmt: fmm.c: Fix Coverity reported warnings
Fixed multiple issues related to memory management, atomicity,
and error handling across various functions: handle null checks,
use-after-free, unchecked returns, and memory leaks.

Change-Id: Ia7c76320cc20e24001052fbba2dd0600bd412140


[ROCm/ROCR-Runtime commit: c9454794b6]
2024-10-07 13:54:03 -04:00
Jonathan Kim 43ebf5b524 hsakmt: Enable graphics handle registration with a virtual address
Currently registering graphics memory without specifying a target
node will return a memory handle that's not a virtual address.

As a result, ROCr is forced to register with a target node for
IPC usage.

Mapping memory without specifying a target node afterwards will
result in mapping to the target node that was imported because the
previous import call flags this node targeting action to future mapping.

For ROCr IPC usage, ROCr wants to map to all GPU nodes if the target node
is not specified.

Allow the caller to register graphics handles that returns a virtual
address without having to specify the target node so that the caller
can make a subsequent map call to all GPUs.

Change-Id: I5a935092b885cc3568e4f3a5dd951c7ec6c84fca


[ROCm/ROCR-Runtime commit: 03463ed2c0]
2024-10-03 14:06:31 -04:00
Kent Russell 4901f1a528 hsakmt: Undo HSAKMT prefix for PAGE_SHIFT
We had skipped doing it for PAGE_SIZE, but it should be left as the
regular PAGE_SHIFT name, especially for users who are using different
headers. We want PAGE_SHIFT and PAGE_SIZE to be consistent with one
another, so set them both explicitly to the same value if either
of them is undefined

Change-Id: I121d81c48409dd77351b59a192d824e2419a2410
Signed-off-by: Kent Russell <kent.russell@amd.com>


[ROCm/ROCR-Runtime commit: daad183bf8]
2024-09-20 11:04:34 -04:00
Kent Russell 9d797771b5 libhsakmt: Prefix global symbols with hsakmt
To support fully-static library ROCm builds, ensure that all global
symbols are prefixed with something meaningful to avoid collisions with
other libraries

A script was made using" objdump -C -t" to get a list of symbols,
then checking if the global symbols have a meaningful prefix (for thunk:
hsakmt or kmt in various cases)

Change-Id: Ifd353f64a3344eb60d1f6c4e041aa20967b38a59
Signed-off-by: Kent Russell <kent.russell@amd.com>


[ROCm/ROCR-Runtime commit: 3da42a0847]
2024-09-06 09:56:07 -04:00
Xuanteng Huang b1b4d4af59 hsakmt: fix spelling error
This was pulled in from:
https://github.com/ROCm/ROCT-Thunk-Interface/pull/107

Change-Id: Ic30e4552a94a212a9cd138f9311b1c85b0c13867


[ROCm/ROCR-Runtime commit: 7a52a45824]
2024-09-04 10:46:39 -04:00
Joseph Greathouse cfb1ab45ac hsakmt: Only set exec flag when requested
Previous code would blindly set executable bit on all allocations.

Change-Id: Id1154f08f6ba21c633905fd46b06053994d6f3cc


[ROCm/ROCR-Runtime commit: 75143555fa]
2024-09-03 15:13:56 -04:00
Alex Sierra 006d1d4dc7 src/fmm.c: fallback to old userptr reg if SVM fails
Fallback to old userptr registration in case SVM method fails.

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Change-Id: I70c3ec74a8b4f762713e6a0619453642f3fca8e5
Signed-off-by: Chris Freehill <cfreehil@amd.com>


[ROCm/ROCR-Runtime commit: 626eb4bfaf]
2024-07-18 10:20:05 -05:00
David Yat Sin d141223daf libhsakmt: Add alignment for memory allocations
New API to support optional alignment parameter for memory allocations.
The alignment should be larger than or equal to page size and a power
of 2.

Change-Id: Ic3fec43b3c4281f74dd33a57ab4143dcf76e1186
Signed-off-by: Chris Freehill <cfreehil@amd.com>


[ROCm/ROCR-Runtime commit: a31e84eaef]
2024-06-24 14:26:21 -05:00
Lang Yu b8d1ddd431 libhsakmt: Prevent hsaKmtRegisterMemory* from registering non-userptr
hsaKmtRegisterMemory* can only register OS allocated userptr.

v2: Apply changes to all hsaKmtRegisterMemory* stuff.(Philip)

v3: Unlock aperture->fmm_mutex to aviod deadlock.

Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: I1045af7edb4da8206cb878f64c0176ba4fc59f60
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Chris Freehill <cfreehil@amd.com>


[ROCm/ROCR-Runtime commit: 4844a70d94]
2024-06-24 14:26:21 -05:00
Chris Freehill a8d049fa0d Prepare for integration into rocr
Change-Id: I6102b9910dbb9d09e09bb262a03c5c0ad4ce66f4


[ROCm/ROCR-Runtime commit: 11fd5c2562]
2024-04-30 09:01:09 -05:00