Commit Graph

58 Commits

Author SHA1 Message Date
Xiaogang Chen 682173c851 libhsakmt: allow gpu nodeid arrary is null and number of gpu is zero.
Allow hsaKmtRegisterGraphicsHandleToNodes parameters NodeArray be null
and NumberOfNodes be zero at same time. It is the case we want the imported
buffer not be registered by kfd. Set gpu_id_array = NULL explicitly to avoid
free uninitialized gpuid array.

Report: Yat Sin, David<David.YatSin@amd.com>
Signed-off-by: Xiaogang Chen<Xiaogang.Chen@amd.com>
Change-Id: I3babc1160c9573e38dd11d81965c8de2b70cae2e


[ROCm/ROCR-Runtime commit: f6183f937e]
2023-05-29 00:15:14 -04:00
Xiaogang Chen ebce4177ad libhsakmt: have hsaKmtMapMemoryToGPU return same value as fmm_map_to_gpu.
Have hsaKmtMapMemoryToGPU return same value as fmm_map_to_gpu to keep consistency.

Signed-off-by: Xiaogang Chen<Xiaogang.Chen@amd.com>
Change-Id: Ifabb72301e1d5a6c1310973bb1321714e12a1fa6


[ROCm/ROCR-Runtime commit: 7e4e57ae5f]
2023-05-29 00:15:14 -04:00
Xiaogang Chen dd8954e83e libhsakmt: query/use render node fds that libdrm uses.
Query render node fds that libdrm uses for current process and
use them at Thunk if available.

v2: avoid naming conflict with amdgpu_device_get_fd from amdgpu.h

Signed-off-by: Xiaogang Chen<Xiaogang.Chen@amd.com>
Change-Id: Id7288c03730f4a4c9c3644e37ca4725fec71a471


[ROCm/ROCR-Runtime commit: ac1db60fc2]
2023-05-29 00:15:14 -04:00
Xiaogang Chen b4b03aca20 libhsakmt: support vram-only and VA-only alloc/free.
Signed-off-by: Xiaogang.Chen <Xiaogang.Chen@amd.com>
Change-Id: I47cf53642d2ea197c08b20e84d7cae04b2d431e0


[ROCm/ROCR-Runtime commit: 0138487aa4]
2023-05-29 00:15:14 -04:00
Bing Ma a868d0972b libhsakmt: Add support functions for ASAN
Add support functions to remap the first page of device memory (GPU/GTT)
to share host ASAN logic.

Signed-off-by: David Yat Sin <David.YatSin@amd.com>
Change-Id: I4c27d5417ba80a172dccb0a079a597c5dc1c8f85


[ROCm/ROCR-Runtime commit: 1e6d728730]
2023-05-17 13:38:19 -04:00
Felix Kuehling caf8b70da7 libhsakmt: Implement dmabuf export for RDMA
Implement hsaKmtExportDMABufHandle, which can be used for a new
upstreamable RDMA solution. It exports a DMABuf handle for an arbitrary
virtual address along with the offset of the address within the
allocation. It also checks that the size of the intended export does
not exceed the allocation.

This uses the new AMDKFD_IOC_EXPORT_DMABUF, which requires KFD ioctl
API version 1.12.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: Ie5fdb1f73ab3c7fa36c315ce326b1fb89eacc8b6


[ROCm/ROCR-Runtime commit: 332f59eb2a]
2023-02-27 14:44:11 -05:00
Felix Kuehling c6a23a88ee libhsakmt: Remove CMA implementation
The CMA feature is deprecated and about to be removed from the DKMS
branch. It was never supported upstream. Leave dummy functions in
place for now.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: I9e51403d753cb91630553aff4f19e931af509740


[ROCm/ROCR-Runtime commit: 9b2b81e555]
2022-07-21 16:08:19 -04:00
Daniel Phillips 8a60a6037e libhsakmt: Add support for hsaKmtAvailableMemory
New API function to report available memory per GPU

Signed-off-by: Daniel Phillips <Daniel.Phillips@amd.com>
Change-Id: I63c1e4ca0020c657977ab3635947ab0ed0a81440


[ROCm/ROCR-Runtime commit: 6da6058d4a]
2022-06-13 09:37:32 -04:00
Graham Sider 1aa103c629 libhsakmt: Use node_id in topology_is_svm_needed()
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I7773ccb959e60e43b816477c5659f1fe835ecbbd


[ROCm/ROCR-Runtime commit: bc4aca039c]
2021-08-05 14:52:09 -04:00
Graham Sider eb66b1108c libhsakmt: Deprecate is_gfx700()
Condition generalized by
(get_gfxv_by_node_id(NodeId) == GFX_VERSION_KAVERI)

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Iff4f77043e3ce8e48a9e84fbf257ebf59abf5bbb


[ROCm/ROCR-Runtime commit: 2f261a8dab]
2021-08-05 14:50:07 -04:00
Sean Keely 80ffb43205 Add hsaKmtRegisterMemoryWithFlags.
API follows hsaKmtRegisterMemory but allows passing HsaMemFlags.

Change-Id: I66a230a87c8b085f27c769bdf2cb4d0d96a5d6dd


[ROCm/ROCR-Runtime commit: c7f1277013]
2019-03-28 17:17:40 -04:00
Yong Zhao 39ef88d37f libhsakmt: Introduce HSA_ZFB environment variable
This variable is 0 by default. When set to 1, it means there is no frame
buffer, so all memory allocation is routed to system memory. This mode
is mainly used during emulation.

Use CoarseGrain for VRAM under ZFB mode

Change-Id: I29e8e98be56935e3ceb94782d70771cc45700749
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>


[ROCm/ROCR-Runtime commit: 51ee5c324a]
2019-01-29 19:46:26 -05:00
Gang Ba 9147adc1d5 Add code to support packet capture and replay in the Thunk
This feature only support dgpu for now.

Change-Id: Ic766ec06892c955dd605ecc335a776335edc0df2
Signed-off-by: Gang Ba <gaba@amd.com>


[ROCm/ROCR-Runtime commit: c54c1dbdcb]
2018-10-31 16:53:46 -04:00
Yong Zhao 6086ae78bb Differentiate gfx700 and improve the logic by introducing is_gfx700()
Because gfx700 has local memory but other APUs don't, we should reflect
that in the code. Meanwhile, fix a bug that on gfx902 svm aperture is not
added when calling hsaKmtGetNodeMemoryProperties().

Change-Id: Id840f2db0b14fda9ee713b219a9474c15f8a9771
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>


[ROCm/ROCR-Runtime commit: 110e754f64]
2018-08-09 21:39:37 -04:00
Yong Zhao f55e9ffafb Simplify if else logic for hsaKmtAllocMemory()
The new logic is easier to follow.

Change-Id: I69759a45c5dedaefeff831a2367253d3a4486bd3
Signed-off-by: Yong Zhao <yong.zhao@amd.com>


[ROCm/ROCR-Runtime commit: 4eaaf9694d]
2018-06-29 14:39:52 -04:00
xinhui pan 78664b43e7 THUNK: fix deregister memory issues
__fmm_release actually fails to find the object if address is not
pagesize aligned.  And the caller did not notice this as __fmm_release
has no err code return.

So to fix this, move the object lookup in caller, and use vm-object
instead. Also fmm_release will pass up the error code.

Change-Id: Ib8ea1ea5ae844844fd20e8e01f0fdb841d218f2c
Signed-off-by: xinhui pan <xinhui.pan@amd.com>


[ROCm/ROCR-Runtime commit: 8ee5647814]
2018-06-25 14:12:26 -04:00
Harish Kasiviswanathan 1a9af8b82d CMA: Initialize SizeCopied return parameter
UCX test cases are reporting uninitialized values when CMA fails. The
application should ideally ignore SizeCopied when the function fails but
it doesn't. This is leading to wrong diagnosis.

v2: Fill in partial SizeCopied in case of failure

Change-Id: I6b7e1c19a8b702ec91ca64201a3dda27bd897877
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: 7de0199e99]
2018-02-08 12:46:40 -05:00
Laurent Morichetti 84945d39f8 Silence Valgrind warnings
Change-Id: I8803f3d310fccd69d0d04b2464b00dccc40270e3
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 056ddbbc82]
2018-01-25 16:48:17 -05:00
Amber Lin a885ad3724 Add debugging message on memory
Add pr_debug to all memory APIs and pr_err to some failure cases.

Change-Id: I8b519a1228cc19e6c04118fd87432e7f48f3cbf9
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: 73707766ef]
2017-08-22 09:55:20 -04:00
Amber Lin 951796c73d Simplify memory maps
Simplify fmm_map_to_gpu_nodes code. Also fix a memory leak in this change.

Change-Id: I3487338b78c915de44588d0206bac4c53e728c60
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: f1a5248cf2]
2017-08-15 17:34:30 -04:00
Amber Lin 75c3086af9 Replace printf/fprintf with pr_xxx
Libraries normally don't print messages. We use pr_err, pr_warn,
pr_info, and pr_debug to print messages to stderr when prints are
enabled for debugging.

Change-Id: I9caf719343aa618c88e7b500f9737a46702e424a
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: 897c4e2fff]
2017-06-28 10:47:35 -04:00
Felix Kuehling fce3048015 Remove deprecated implementation of hsaKmtMapGraphicHandle
The KFD implementation has been removed and will not be upstreamed.
This API has been superseded by hsaKmtRegisterGraphicsHandleToNodes.

Change-Id: I5f2d8da3260974618cdb6ea3fdcd77d37b82c9cb
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: 374bd89d8c]
2017-06-02 13:52:19 -04:00
Kent Russell c53049ce46 Clean up thunk code
Use checkpatch.pl to fix the majority of errors. Some that remain and
will be excluded:
Use of typedefs/externs/volatile/sscanf
Lines over 80 characters

Remaining errors are due to misunderstanding the * symbol with typedefs

Also use this opportunity to spell manageable properly

Change-Id: I0b335e9cb3e1eea38bee27eaa1f582b2c9b09b38


[ROCm/ROCR-Runtime commit: b78e0e152a]
2017-05-31 14:38:59 -04:00
Harish Kasiviswanathan b7f6ed08ee Add API entrypoints for Cross Memory Attach
Implement two new API for cross memory read and write operation.
 - hsaKmtProcessVMRead
 - hsaKmtProcessVMWrite

Add new ioclts necessary for the above APIs.

Change-Id: I0c153e3b4e1f32b7a8b102ad5c774d9ae9bfc2fa
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: e79521b556]
2017-02-17 16:59:51 -05:00
Harish Kasiviswanathan 5d2336f1ca Add API entrypoints for IPC functionality
Implement three new APIs for IPC buffer sharing:
	-hsaKmtShareMemory()
	-hsaKmtRegisterSharedHandle()
	-hsaKmtRegisterSharedHandleToNodes()

Add new ioclts necessary for the above APIs.

Change-Id: Ia2b4d0dc91ec64bff959395d11c0536467404792
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>


[ROCm/ROCR-Runtime commit: 559e31d6ff]
2016-11-28 16:19:22 -05:00
Yong Zhao 1a2ed0ec64 Making the code more robust by checking the NULL pointer
Change-Id: I36b9f73eadd7547c71fe3641ac131c7408b14816
Signed-off-by: Yong Zhao <yong.zhao@amd.com>


[ROCm/ROCR-Runtime commit: a1f417715b]
2016-11-16 11:35:26 -05:00
Amber Lin 8a1cef5fbb Add pointer attributes API
Add two pointer attributes APIs:
hsaKmtQueryPointerInfo - allow the user to query the memory information
    using a pointer. This pointer can point to any address inside the
    range known to HSA.
hsaKmtSetMemoryUserData - allow the user to attach data to a pointer to
    add memory tracking information. This pointer must match the start
    address of a memory allocation or registration.
TODO: This patch implements support on dGPU. Needs to add APU.

Change-Id: I4711809274248434901f0794f50ebfa13a7371a8


[ROCm/ROCR-Runtime commit: 51e4d27c37]
2016-09-07 17:24:46 -04:00
Yong Zhao cba37c251c Implement hsaKmtGetTileConfig in thunk
Change-Id: Iba8d8efa46e3c268a03442d3db568e1b19230e94


[ROCm/ROCR-Runtime commit: 8351b3d2e8]
2016-09-06 16:24:29 -04:00
Felix Kuehling 029002d073 Add support for hsaKmtRegisterGraphicsHandleToNodes
Change-Id: I6fd7154dea78188480d5cb89ac237bad572356c4


[ROCm/ROCR-Runtime commit: 61ec3df2f9]
2016-03-10 11:16:02 -05:00
Ben Goz c32a504b59 Support MapMemoryToGPUNodes on APU
Change-Id: Ie77a2eb23cd9fe6671ff9e0630977220218e55dd
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: b1393f8224]
2016-03-09 21:31:52 -05:00
Felix Kuehling f171fef754 Clean up GPUVM aperture management
Non-canonical GPUVM aperture doesn't exist on dGPUs. Remove comments
and code that say otherwise.

Fix alignment of GPUVM aperture for gfx801. Requires the same workaround
as gfx802. It's not used for anything on gfx801 yet, but will be soon.

Change-Id: I88607fe7b340081cc0715b85f28fdbf5f1bb0ad7


[ROCm/ROCR-Runtime commit: b837c3e7b0]
2016-03-09 10:55:12 -05:00
Ben Goz 8baf22651d Align hsaKmtMapMemoryToGPUNodes according thunk spec
Change-Id: I507ba5c6029ca5e7088c25930d46f5221679ace4
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: e2fb4bc312]
2016-03-02 16:12:03 +02:00
Felix Kuehling d56931260a Fix address space leak in __fmm_release
Use the object size when freeing address space, instead of the
parameter passed in by the caller. The parameter may be incorrect
due to app or runtime bugs, or when the buffers is an AQL ring
buffer with double mapping workaround.


Change-Id: I00bb31d4520ef969a49d6d5ea723e8a33418acc3


[ROCm/ROCR-Runtime commit: 006f3ee41b]
2016-02-26 09:19:21 -05:00
Ben Goz 18953cfa9a Mapping public VRAM BO to cpu
Change-Id: I2ff62ff0784f8ce556ad80739a177b90d866f1b4
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: 3f02a3cf0b]
2016-02-24 17:30:15 +02:00
Felix Kuehling 99325bf7c4 Add support for register/deregister memory for dGPU
Allocate SVM address space for the registered memory and use new
userptr support in KFD to create a system memory BO associated with
the given user pointer. Map this BO at the SVM address for CPU
access.

MapMemoryToGPU can be used with the registered user pointer and
will return the SVM address as alternate GPUVA.

Change-Id: I4886e193c51fb6870a567878870c36bf8b5c3748


[ROCm/ROCR-Runtime commit: 85f9efb1a0]
2016-02-16 18:12:05 -05:00
Ben Goz 89905c0cd7 Align gpu-id-array size to multiple of sizeof(uint32_t)
Change-Id: I9f46b6a331a8d928ef570b420fb60b99b2edfdd1
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: 00386734b1]
2016-02-16 11:27:06 -05:00
Ben Goz 0dc374e1a4 Fix double free issue and pointer alignment
Change-Id: Id5bab454d53d404883a92282168b3f6cbc468cbb
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: b37f99a01e]
2016-02-12 11:21:32 -05:00
Felix Kuehling 03720306b9 Make hsaKmtAllocMemory more compliant with the Thunk spec
Allocations from GPU nodes will return VRAM, not system memory.
Only non-paged allocation from GPU nodes is supported. System
memory can only be allocated from CPU nodes (usually node 0).

The HostAccess flag is no longer used to distinguish the memory
type. It only indicates, whether the memory is mapped for CPU
access.

Maintain compatibility with broken KfdTests by returning system
memory for paged-memory requested from GPU nodes.

Change-Id: I514defede735f55e6de436f41944125b6f2c4ccf


[ROCm/ROCR-Runtime commit: 887b32fe86]
2016-02-10 10:29:54 -05:00
Ben Goz 18aab410cc Adding support to hsaKmtMapMemoryToGPUNodes
Change-Id: Iab6222402a43c3cd31b0efc5a316a6482986258e
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: 7070f7ec5e]
2016-02-09 17:34:29 +02:00
Felix Kuehling c89d3124d9 Implement hsaKmtRegisterMemoryToNodes
Fix hsaKmtRegisterMemory to be a no-op for now and move the multi-GPU
implementation to hsaKmtRegisterMemoryToNodes. Make GPU memory mappings
of host memory visible to all GPUs by default. Device memory is still
visible to the allocating GPU only by default (but can be overridden
with hsaKmtRegisterMemoryToNodes for experimenting with P2P).

Change-Id: I73408afbe3b10c8dad2ab3a780f58413249692e6


[ROCm/ROCR-Runtime commit: 063ad3ad9e]
2016-01-08 16:00:23 -05:00
Ben Goz 2fa7eef572 Adding support for mGPU
Change-Id: I5ed184e6a58b38d9dde48867f14513d161cf41a9
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: ea0f9d2a0b]
2016-01-04 15:35:15 +02:00
Felix Kuehling 29561cc13e Implement flat scratch support for dGPU
hsaKmtAllocMemory only allocates aligned address space and sets up
the scratch_physical aperture to match the allocated address space.

Actual allocation of backing memory happens in hsaKmtMapMemoryToGPU.

Change-Id: Ie709815ab9bedb3d682e096b4005fdfb5e94d3a7


[ROCm/ROCR-Runtime commit: 5131ab4e64]
2015-10-22 20:40:22 -04:00
Felix Kuehling 55bd82cd89 Fix node 0 system memory allocation for dGPU
This is a hack to allow the Runtime to allocate system memory with
PreferredNode=0 on a dGPU system. We allocated it from Node 1
instead so that the node 1 GPU can map the memory. A proper fix
will be implemented together with multi-GPU support.

Change-Id: Ieb52599e5275781c04ee34405ea850bf782c523a


[ROCm/ROCR-Runtime commit: 590c8e522c]
2015-10-21 20:00:01 -04:00
Felix Kuehling f09c6b84af Setup APE1 on dGPU for coherent access
The default is non-coherent access for better performance on dGPU.
Disabled hsaKmtSetMemoryPolicy function on dGPU to prevent app from
overriding the APE1 settings at runtime.
Fixed dGPU VM aperture limit to be inclusive.

Change-Id: I378ff74a654f533572775c0c97c19779a56bc6d9


[ROCm/ROCR-Runtime commit: 8e836f8183]
2015-10-02 17:20:33 -04:00
Ben Goz 9db147f2d4 Support gfx802 dGPU
Signed-off-by: Ben Goz <ben.goz@amd.com>


[ROCm/ROCR-Runtime commit: fb8378a18b]
2015-08-30 14:13:53 +03:00
shaoyunl 779c76a4e7 Minor fix in libhsathunk for KFDMemory test
Signed-off-by: shaoyun liu(shaoyun.liu@amd.com)
Reviewed-by: Ben Goz(Ben.Goz@amd.com)


[ROCm/ROCR-Runtime commit: 2dff5cabfa]
2015-08-05 17:32:00 -04:00
Moses Reuben 9faf7b957c adding support for scratch memory
Signed-off-by: Moses Reuben <moses.reuben@amd.com>


[ROCm/ROCR-Runtime commit: 29c083f695]
2015-07-21 16:43:23 +03:00
Oded Gabbay b6c7551747 Revert "Add execution property in register memory for gfx801."
This reverts commit abf7770d46.


[ROCm/ROCR-Runtime commit: 4c4df38035]
2015-04-28 17:50:00 +03:00
Xihan Zhang abf7770d46 Add execution property in register memory for gfx801.
Signed-off-by: Xihan Zhang <xihan.zhang@amd.com>


[ROCm/ROCR-Runtime commit: 5ed05c99b3]
2015-04-10 22:26:44 +08:00
Oded Gabbay 686f0ceee4 reformat memory and fmm functions according to kernel coding style
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>


[ROCm/ROCR-Runtime commit: 027ca02f2e]
2015-02-25 22:49:08 +02:00