The control stack memory for CWSR is allocate in kernel together with MQD
allocation.
Change-Id: Ib1c0ab9402df3431e9555649394320380d6c6dd8
Signed-off-by: shaoyun.liu <shaoyun.liu@amd.com>
The control stack memory for CWSR is allocate in kernel together with MQD
allocation.
Change-Id: Ib1c0ab9402df3431e9555649394320380d6c6dd8
Signed-off-by: shaoyun.liu <shaoyun.liu@amd.com>
[ROCm/ROCR-Runtime commit: 116e5c5e8b]
On SOC15 chips, the ABI for the create_queue ioctl is changed to
allow doorbell allocation independent of the queue ID. This is
necessary to accommodate doorbell routing to specific engines in
the BIF.
Change-Id: Ie98d0a758758149dd5fc09ae088afccc29904124
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
On SOC15 chips, the ABI for the create_queue ioctl is changed to
allow doorbell allocation independent of the queue ID. This is
necessary to accommodate doorbell routing to specific engines in
the BIF.
Change-Id: Ie98d0a758758149dd5fc09ae088afccc29904124
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
[ROCm/ROCR-Runtime commit: 7de66d149b]
On gfx900 we need 64-bit for all doorbells and SDMA WPTRs.
Change-Id: I9b922e16442e967599ae3c928308451d5cc470b3
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
On gfx900 we need 64-bit for all doorbells and SDMA WPTRs.
Change-Id: I9b922e16442e967599ae3c928308451d5cc470b3
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
[ROCm/ROCR-Runtime commit: d7063dd102]
Use KFD_IOC_ALLOC_MEM_FLAGS_COHERENT when allocating fine-grained
memory and doorbell BOs so that they will be mapped with MTYPE_UC
on GFX9 hardware.
Change-Id: I51adf45b13105f479e6bcdaf54955b467920ee9a
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Use KFD_IOC_ALLOC_MEM_FLAGS_COHERENT when allocating fine-grained
memory and doorbell BOs so that they will be mapped with MTYPE_UC
on GFX9 hardware.
Change-Id: I51adf45b13105f479e6bcdaf54955b467920ee9a
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
[ROCm/ROCR-Runtime commit: 8cb89b6926]
Copied from kernel repository.
Change-Id: I9ed021cfb5b297d9a91dce93ed6355c95fb1127b
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
This is in preparation for gfx900, which uses 64-bit doorbells. We
maintain the same number of doorbells per process by making the
doorbell page size bigger.
KFD will need to implement the same rule.
Change-Id: I3c4110869b191b83943b5a390a48edfc94d941d8
This is in preparation for gfx900, which uses 64-bit doorbells. We
maintain the same number of doorbells per process by making the
doorbell page size bigger.
KFD will need to implement the same rule.
Change-Id: I3c4110869b191b83943b5a390a48edfc94d941d8
[ROCm/ROCR-Runtime commit: 48207af92a]
SWDEV-2 - Change OpenCL version number from 2371 to 2372.
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/utils/versions.hpp#2118 edit
[ROCm/clr commit: b8766b0467]
SWDEV-2 - Change OpenCL version number from 2371 to 2372.
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/utils/versions.hpp#2118 edit
Existing code uses lockf to ensure exclusive PMC access of one process and
one TraceId. However Thunk spec allows hsaKmtPmcAcquireTraceAccess to get
exclusive access to the defined set of counters, not exclusive to one
process or one TraceId. Multiple counter sets of multiple TraceIds is
allowed if they meet the concurrent access limit evaluated by the hardware
/driver.
Change-Id: I59cacb855a707fe326a4070452fcbbd3c95ac223
Existing code uses lockf to ensure exclusive PMC access of one process and
one TraceId. However Thunk spec allows hsaKmtPmcAcquireTraceAccess to get
exclusive access to the defined set of counters, not exclusive to one
process or one TraceId. Multiple counter sets of multiple TraceIds is
allowed if they meet the concurrent access limit evaluated by the hardware
/driver.
Change-Id: I59cacb855a707fe326a4070452fcbbd3c95ac223
[ROCm/ROCR-Runtime commit: 1025579c0b]
-
-Contexts across threads are listed under device
-Device reset cleans up all contexts and re-initializes _primaryCtx
Change-Id: Ie1cfbb26d43a8dc6869be3e6ebaf7344ce374643
[ROCm/clr commit: c837b8d713]
-
-Contexts across threads are listed under device
-Device reset cleans up all contexts and re-initializes _primaryCtx
Change-Id: Ie1cfbb26d43a8dc6869be3e6ebaf7344ce374643
-
-Contexts across threads are listed under device
-Device reset cleans up all contexts and re-initializes _primaryCtx
Change-Id: Ie1cfbb26d43a8dc6869be3e6ebaf7344ce374643
- target "make test" will no longer build and run tests. It will only run the tests.
- added new target "make check" which will build and run the tests.
- target "make check" will build tests serially. Use -j<N> to build tests in parallel.
Change-Id: I24c7932bf9798364a59f44631fbabcf9a5da5e17
[ROCm/clr commit: fe01dd74a2]
- target "make test" will no longer build and run tests. It will only run the tests.
- added new target "make check" which will build and run the tests.
- target "make check" will build tests serially. Use -j<N> to build tests in parallel.
Change-Id: I24c7932bf9798364a59f44631fbabcf9a5da5e17
- target "make test" will no longer build and run tests. It will only run the tests.
- added new target "make check" which will build and run the tests.
- target "make check" will build tests serially. Use -j<N> to build tests in parallel.
Change-Id: I24c7932bf9798364a59f44631fbabcf9a5da5e17
SWDEV-2 - Change OpenCL version number from 2370 to 2371.
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/utils/versions.hpp#2117 edit
[ROCm/clr commit: d4cb8dc9b0]
SWDEV-2 - Change OpenCL version number from 2370 to 2371.
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/utils/versions.hpp#2117 edit
SWDEV-107271 - For APU system, when allocating USWC with enough USWC reported and the allocation fails, we should return false instead of looping forever.
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palmemory.cpp#12 edit
[ROCm/clr commit: dff4d3c84a]
SWDEV-107271 - For APU system, when allocating USWC with enough USWC reported and the allocation fails, we should return false instead of looping forever.
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palmemory.cpp#12 edit
SWDEV-2 - Change OpenCL version number from 2369 to 2370.
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/utils/versions.hpp#2116 edit
[ROCm/clr commit: 7631321796]
SWDEV-2 - Change OpenCL version number from 2369 to 2370.
Affected files ...
... //depot/stg/opencl/drivers/opencl/runtime/utils/versions.hpp#2116 edit
pensun
shaoyun.liu
Felix Kuehling
Amber Lin
foreman
Rahul Garg
Maneesh Gupta