Граф коммитов

18 Коммитов

Автор SHA1 Сообщение Дата
Flora Cui a765dd7e94 rocr: add specific flag for blit kernel object
so that aql-to-pm4 conversion could verify the validity of the kernel
object.

Signed-off-by: Flora Cui <flora.cui@amd.com>
2025-07-17 21:55:02 +08:00
jordans d4b85b6bf5 hsakmt: Initial Commit for the HSA KMT Model
The over arching goal it so provide an API that pre-silicon models can latch into for software bring up.# Please enter the commit message for your changes. Lines starting
2025-03-18 16:22:17 -04:00
Jonathan Kim e3d09e30dc hsakmt: Expose per-SDMA queue reset capabilities
Expose new capabilities field that flags per-sdma queue reset
support.
2025-03-06 14:04:42 -05:00
Harish Kasiviswanathan 2a64fa5e06 libhsakmt: gfx950: Add option to enable HIGH_PRECISION
Environment variable HSA_HIGH_PRECISION_MODE can be used to control MFMA
precision

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: Ib78dd9dd8867025e090a3cca96ab6db4f65dea12
2025-02-10 16:05:25 -05:00
Tony Gutierrez 15107afb11 rocr: Generalize driver discovery
Generalize the driver discovery and move driver-specific
functionality to the concrete driver implementations.
Currently, this process is tightly coupled to the hsakmt
which is GPU and OS specific.

Change-Id: Ie1c53fef407a71b5ec4c6eaf3a3ed00871184409
2025-01-23 15:09:14 -05:00
James Zhu b07a80e505 libhsakmt: add spm buffer header
to send data back to user.

Change-Id: If11fb4147e32c0eed319ccf76bcde9d76815ff67
Signed-off-by: James Zhu <James.Zhu@amd.com>
2025-01-06 14:40:05 -05:00
Jonathan Kim 1a4adaf7bc hsakmt: Update HSA capabilites with per-queue reset
Per-queue reset is now supported and flagged in HSA capabilities.

Change-Id: I21e2421da73b9fafae19c903dc3eeeab1f84968d
2024-11-13 13:34:35 -05:00
Jonathan Kim 03463ed2c0 hsakmt: Enable graphics handle registration with a virtual address
Currently registering graphics memory without specifying a target
node will return a memory handle that's not a virtual address.

As a result, ROCr is forced to register with a target node for
IPC usage.

Mapping memory without specifying a target node afterwards will
result in mapping to the target node that was imported because the
previous import call flags this node targeting action to future mapping.

For ROCr IPC usage, ROCr wants to map to all GPU nodes if the target node
is not specified.

Allow the caller to register graphics handles that returns a virtual
address without having to specify the target node so that the caller
can make a subsequent map call to all GPUs.

Change-Id: I5a935092b885cc3568e4f3a5dd951c7ec6c84fca
2024-10-03 14:06:31 -04:00
Jonathan Kim 027af8dacd hsakmt: Update hsa capabilities with precise ALU ops
Update the HSA capabilities field with precise ALU ops bit support
for GPU debugging.

Change-Id: I796f2c2e0559577828aba510c401ed5187e10179
2024-09-24 13:45:04 -04:00
Jonathan Kim a926a070ee hsakmt: Update thunk doc comments for debug firmware support caps
Update commentary on HWS scheduler support bit for GPU debugging in
the HSA capabilities node properties field.

Change-Id: I59c519d74a528d5ecf5817ef94e75091314bd844
2024-09-23 16:34:31 -04:00
Shweta Khatri 303c02690d hsakmt: hsakmttypes.h: Fix Coverity reported warnings
Eliminated declared but not referenced variables to fix warnings

Change-Id: I80032a699fb59ce4635c5001f669d009ba60e588
2024-09-23 11:34:44 -04:00
Jonathan Kim 2f588a2406 libhsakmt: Extend thunk queue creation with recommended sdma engines
Extend the current Thunk implementation of queue creation to target
specific SDMA engine IDs.

Also expose the new recommend SDMA engines per IO link from the KFD
sysfs.

Change-Id: I51f9a0d83c0f1fc4d5dc837f879a7ae332e7d7e9
2024-08-20 11:13:57 -04:00
Yifan Zhang 3f1f68c8cb libhsakmt: add OverrideEngineId property
When HSA_OVERRIDE_GFX_VERSION is used, save the overrided GFX
version to OverrideEngineId instead of original EngineId. There
are places where real GFX properties still needed, e.g. CWSR size
calculation.

Change-Id: I9d9149bae465b7cfe55604fc19e7ca34e48b7b1c
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
2024-08-20 09:10:52 -04:00
Philip Yang 6e6f445f75 libhsakmt: Update contiguous memory support ioctl version
KFD ioctl version is 1.16 on upstream for contiguous memory support.

Remove pc_sampling version, should be added after pc_sample upstream.

Change-Id: I6e6c3340bc8e371d68dd7741b02578be2fdef801
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Chris Freehill <cfreehil@amd.com>
2024-06-24 14:26:21 -05:00
David Yat Sin a31e84eaef libhsakmt: Add alignment for memory allocations
New API to support optional alignment parameter for memory allocations.
The alignment should be larger than or equal to page size and a power
of 2.

Change-Id: Ic3fec43b3c4281f74dd33a57ab4143dcf76e1186
Signed-off-by: Chris Freehill <cfreehil@amd.com>
2024-06-24 14:26:21 -05:00
Lang Yu ae3ede062f libhsakmt: add Integrated property
To differentiate discrete and integrated GPU more flexibly in runtime,
this will aid in querying HSA_AMD_MEMORY_PROPERTY_AGENT_IS_APU
and hipDeviceAttributeIntegrated.

Change-Id: Ic8a6c9aea3b4bd19c4d5f6729af7e64c328fc61d
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Chris Freehill <cfreehil@amd.com>
2024-06-24 14:26:21 -05:00
James Zhu 5786dbbb76 libhsakmt: update KFD ioctl minor version
Since PC Sampling not upstream yet, so use 1.16 for
contiguous VRAM allocation, and 1,17 for pc sampling.

Change-Id: Ib5d22e8f386ce7fe3f7111485b9632b61227e539
Signed-off-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Chris Freehill <cfreehil@amd.com>
2024-06-24 14:26:21 -05:00
Chris Freehill 11fd5c2562 Prepare for integration into rocr
Change-Id: I6102b9910dbb9d09e09bb262a03c5c0ad4ce66f4
2024-04-30 09:01:09 -05:00