Generalize the driver discovery and move driver-specific
functionality to the concrete driver implementations.
Currently, this process is tightly coupled to the hsakmt
which is GPU and OS specific.
Change-Id: Ie1c53fef407a71b5ec4c6eaf3a3ed00871184409
This reverts commit 80da7d5ee4.
Reason for revert: This will put back the change ID - Id1154f08f6ba21c633905fd46b06053994d6f3cc to ROCR repo, which will prevent memory allocations from being automatically granted the 'executable' flag, addressing previously - incorrect and unsafe behavior in ROCm driver.
Change-Id: I3d45c45859929a80f7791681b411251e099a1901
local variable 'counter_id' exceeded the max single
use of stack, thus move to heap to prevent overflow
also, use of a contiguous memory block for 2D array
to reduce space complexity, add error messages for
NO_MEMORY exits and check MAX_COUNTER limit for IDs
Change-Id: Id0249ca767a336b31c759c693a82d3f5c950a2fa
Signed-off-by: Apurv Mishra <apurv.mishra@amd.com>
HW_REG_HW_ID1 is only available from gfx12 onwards
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: Ibf4bd62e01ada3dee6dd88762ccb853bab63ff87
Add gfx12 so that it gets tested when KFDASMTest.AssembleShaders is run.
GWS support has been removed for gfx12. Modify shaders to take that into
account.
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: I70e87febb6388852ea54d69cf9201339a7910581
1, Initialize the registers before using them is the best practice.
Though the use case here doesn't care whether the registers are
initialized or not, some emulators complain the "read_before_write"
behavior. Initialize the registers used to silence these complaints.
2, Update s_wait stuff for gfx12.
Change-Id: I462b2b0b5017dd2876a5954169d3b6b2f1c2a75b
Signed-off-by: Lang Yu <lang.yu@amd.com>
Do a memset, since we can't initialize variable-sized objects
Change-Id: I57faf4a0581a29f9d30391aa387812c2b7bb5011
Signed-off-by: Kent Russell <kent.russell@amd.com>
New implementation of CU mask testing that focuses on correctness of
masking. Unlike previous implementations, this new implementation does not
rely on performance measurements to decide on the results of the test.
Instead, this implementation checks if waves were executed on all the CUs
enabled and only the CUs enabled.
Test case initially supported on GFX12.
Signed-off-by: David Belanger <david.belanger@amd.com>
Change-Id: I5af8b890179bc9a415fc7f47e736f4971fc40c4a
We can inherit it from gtest, but not in ASAN builds. And we should be
including what we use, instead of hoping to inherit it through other
headers
Change-Id: Id47ab06a57e1c71c88f72da5f21a71f37db8a2f3
Signed-off-by: Kent Russell <kent.russell@amd.com>
The kfdtest multi-gpu extension only allows using the first gpu(in topology
order) as default gpu for KFDEvictTest test case. We should allow user
to select any gpu in system as default gpu to run KFDEvictTest test case.
Signed-off-by: Xiaogang Chen<Xiaogang.Chen@amd.com>
Change-Id: I8848771d92ae2812fbb96e917454ab3b4a71a2fa
Update KFDMultiProcessTest class to fork process on gpu wise.
Signed-off-by: Xiaogang Chen <Xiaogang.Chen@amd.com>
Change-Id: Ibb12d64b4cbc5f082d737fd8d8a74233b75be13e
Update class KFDBaseComponentTest to have kfdtest run on multi gpu under google test framework.
Signed-off-by: Xiaogang Chen <Xiaogang.Chen@amd.com>
Change-Id: If139c4fc6cf062fb800ff171c69cbf9604f98278
Add HSA_TEST_GPUS_NUM env variable that controls gpu number kfdtest uses.
This env variable will be used by following patches.
Signed-off-by: Xiaogang Chen <Xiaogang.Chen@amd.com>
Change-Id: I800042f93d4e0955040f450e9b5cf09927971323
Extend Google test log functions to extend kfdtest running on multiple gpu.
Signed-off-by: Xiaogang Chen <Xiaogang.Chen@amd.com>
Change-Id: I6d8de92fec606309756423b3a6fa2af3558c0517
Assembler function from LLVM is not multi-thread safe and is ASIC dependent.
To extend kfdtest to test on multiple GPU separate LLVM initialization and
assembler instantiation. Each test uses its own assembler.
Signed-off-by: Xiaogang Chen <Xiaogang.Chen@amd.com>
Change-Id: I94c996e807b81d8b19361b450be985b12042477c
When using total system memory to test on some motherboard,
the test take very long time, witch looks like system Hang.
Change-Id: Ic31fe60cfb1363fbc8a2d8f7e1cb2bae0e149ea8
Signed-off-by: gaba <gaba@amd.com>
1, Use s_wait_* instead of s_waitcnt
2, Remove a redundant s_waitcnt
Change-Id: Id0f31db0fc520adadd81eb574ad389f63859303a
Signed-off-by: Lang Yu <lang.yu@amd.com>
Add free() for 'all_gpu_id_array' in
hsakmt_fmm_destroy_process_apertures() and
removed it from 'hsakmt_fmm_clear_all_mem()'
Change-Id: I32d2d22e7152f62a3f2e7da4f601f0db7cebd534
Signed-off-by: Apurv Mishra <apurv.mishra@amd.com>
DisableCpQueueByUpdateWithZeroPercentage need to destroy event to avoid
event leak.
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Change-Id: I4fb51b670fbff1edcd7fd61517f5c8a6674003c0
The issue arises in the CatchSignal function, which attempts to write to
the standard error stream upon receiving a signal. However, the standard
error stream may already be locked at this point, as the parent process
also attempts to write to the standard error stream after mapping the GPU
memory. This leads to a deadlock, with the program waiting for the
release of the lock on the standard error stream.
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Change-Id: Ie69354f4342b96ffe1f2a87f655687da1cbee4b9
there are some timeout issues of evict tests on recent new boards,
it is to solve those issues and optimize evict timeout, as well
as to give user a chance to change timeout in command line.
Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Change-Id: I2f40c8ea809c55675b0d0b62296b663481e5fb16
KFDDBGTest and KFDNegative test can eat into memory and event resources
for subsequent test interations if unallocated.
Change-Id: Iea170c20df8d487703441181b6c152b61f02d3db
Queue 2's wave blocked the queue 1's wave save, which will cause unmap
queue preemption fail. Add nop per SQ suggested.
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Change-Id: Iea7f280e35487059c4499ea999b9e0cdf841d1e1
Current test has 4 processes, each process allocate and access 512
buffers, this requires 2048 waves to access 2048 buffers at same time to
finish the test. For CPX compute partition mode, each compute node has
less waves and cause random test failure. Change test to 2 processes to
use 1024 waves to access 1024 buffers with the increased buffer size.
Add waves_num check to avoid the test failure on new ASICs or simulator,
skip test if the available waves is less than 1024.
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Change-Id: I64b5f9172b62cf38f62fbb0b48a801b8a11401c0
This reverts commit 75143555fa.
Reason for revert:
This is currently breaking some tools. Will put it back as soon as tools update their code.
Change-Id: I05c82d443f3a274a618d05e6dc5a87943f5dc7a4
If you build thunk following the instructions in the thunk's README,
there is no /lib folder in the build folder. Adjust the include path,
and clean up the docs to reflect that. The header include is already
defined in the CMake file as ../../include, so we don't use
LIBHSAKMT_PATH for that linking, just the lib location
Change-Id: I73435d59adb9d01f527a28b1935086260e9d3d70
Signed-off-by: Kent Russell <kent.russell@amd.com>
Fixed multiple issues related to memory management, atomicity,
and error handling across various functions: handle null checks,
use-after-free, unchecked returns, and memory leaks.
Change-Id: Ia7c76320cc20e24001052fbba2dd0600bd412140
Currently registering graphics memory without specifying a target
node will return a memory handle that's not a virtual address.
As a result, ROCr is forced to register with a target node for
IPC usage.
Mapping memory without specifying a target node afterwards will
result in mapping to the target node that was imported because the
previous import call flags this node targeting action to future mapping.
For ROCr IPC usage, ROCr wants to map to all GPU nodes if the target node
is not specified.
Allow the caller to register graphics handles that returns a virtual
address without having to specify the target node so that the caller
can make a subsequent map call to all GPUs.
Change-Id: I5a935092b885cc3568e4f3a5dd951c7ec6c84fca