Граф коммитов

85 Коммитов

Автор SHA1 Сообщение Дата
Sunday Clement d00ca2e9b7 rocr: Fix Unintended Sign Extension
ehdr->e_shentshize and ehdr->e_shnum are both 16-bit unsigned integers
and so their types get implicitly promoted to signed int automatically
during the multiplication, they must be explicitly cast into a larger
unsigned type, otherwise if the signed product is large enough the
value is sign extended resulting in incorrect values.

Signed-off-by: Sunday Clement <Sunday.Clement@amd.com>
2025-06-09 15:16:10 -04:00
Alysa Liu 167602edfb rocr: Add proper file descriptor cleanup
Ensure file descriptor 'in' is properly closed in error cases
when calling _lseek() during readFrom() operations.
Fix potential resource leak when errors occur during file operations.

Signed-off-by: Alysa Liu <Alysa.Liu@amd.com>
2025-06-04 22:37:21 -04:00
Alysa Liu ae6851dbb4 rocr: Fixed inefficient copy operations
Changed variable assignments to use std::move() where appropriate.
Changed function headers to pass string arguments by reference where appropriate.

Signed-off-by: Alysa Liu <Alysa.Liu@amd.com>
2025-06-02 11:18:36 -04:00
Alysa Liu 369d89ade3 rocr: Fixed inefficient copy operations
Changed variable assignments to use std::move() where appropriate

Signed-off-by: Alysa Liu <Alysa.Liu@amd.com>
2025-06-02 11:18:36 -04:00
Alysa Liu 625425326d rocr: Add check for 'value' pointer
Replaces assertion check assert(value) with explicit null pointer check
Returns HSA_STATUS_ERROR_INVALID_ARGUMENT on null valuesrocr: Add check for 'value' pointer

Signed-off-by: Alysa Liu <Alysa.Liu@amd.com>
2025-05-27 12:18:04 -04:00
Alysa Liu f1f34da4f6 rocr: Unchecked return value as arg
v1: Add value pointer validation before
dereferencing in GetInfo method for MODULE_NAME case.

Signed-off-by: Alysa Liu <Alysa.Liu@amd.com>
2025-05-27 12:18:04 -04:00
Yifan Zhang ccd91bcd19 coredump: call KFD_IOC_DBG_TRAP_DISABLE in error path.
KFD assumes kfd_dbg_trap_enable/disable be called in pair, or there will
be kfd_process ref leak in KFD.
2025-05-27 13:54:00 +08:00
Aaron Liu 1b79caa214 rocr/dtif: replace hsakmt interfaces with HSAKMT_CALL(...)
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: David Yat Sin <David.YatSin@amd.com>
2025-05-13 16:44:31 -04:00
David Yat Sin d031af9eb5 rocr: Check RLIMIT_CORE before generating coredump
Check for RLIMIT_CORE before collecting data for coredump. If the
current limit is 0, then we can return early without spending time
collecting coredump data.
2025-03-04 10:29:34 -05:00
David Yat Sin 13c591d250 rocr: Remove gfx940 and gfx941 support 2025-02-19 12:16:24 -05:00
Min Zhou a82f2f3134 rocr: delete duplicated conditional expression
Change-Id: Idc8b1a8ca2975f33191a448f03cabf3fc4f8f8a6
2025-01-28 10:48:44 -05:00
David Yat Sin dab8f2fc65 rocr: Add support for gfx950
<squashed with patch for gfx950 generic targets>

Signed-off-by: Chris Freehill <Chris.Freehill@amd.com>

Change-Id: Ifec6d93cf46c7fbf736c6572882299e279260af6
2025-01-26 13:04:58 -05:00
Apurv Mishra 699d0140be rocr: multiple uninitialized and unused variables
Minor modifications to multiple source and header
files based on Coverity report

Change-Id: I4a73d0f56640983c4d5124e13c8c280245cca672
Signed-off-by: Apurv Mishra <apurv.mishra@amd.com>
2024-12-18 10:11:13 -05:00
Konstantin Zhuravlyov 4c7a9a0f67 loader: add gfx9-4-generic support
Change-Id: Icb148f7a78a4ce0fc661e35d0df605e05db2de3d
2024-11-14 12:47:46 -05:00
Konstantin Zhuravlyov ec3d4aa5e9 loader: add gfx12-generic support
Change-Id: I0bf5d48ec357278bdb7a9c4eae61a7b7995411f0
2024-11-11 16:27:47 -05:00
Konstantin Zhuravlyov cf9c2efbbd loader: add gfx1153 support
Change-Id: Ie3f0ecf1c6631d95cbff5e14ddc48e751f4c356d
2024-11-11 16:27:39 -05:00
Konstantin Zhuravlyov 7d9a51e22a loader/nfc: reorder cases when switching on targets, specific first, generic second
Change-Id: I47f38c1691b9b6ff589f7ff445143997b0801dc6
2024-11-11 16:27:34 -05:00
Konstantin Zhuravlyov 4344f012b6 loader: add missing support for gfx700
Change-Id: Ia08e93b0e2d300a183a7a5fb92604cd801b2d52a
2024-11-11 16:27:27 -05:00
Lancelot SIX 3475a45137 rocr/amd_core_dump: Fix "arithmetic on a pointer to void"
A recent patch introduced a build failure when building with Clang:

    [ 65%] Building CXX object runtime/hsa-runtime/CMakeFiles/hsa-runtime64.dir/libamdhsacode/amd_core_dump.cpp.o
    […]/runtime/hsa-runtime/libamdhsacode/amd_core_dump.cpp:271:29: error: arithmetic on a pointer to void
      271 |       read = pread(fd_, buf + done, buf_size - done,
          |                         ~~~ ^
    1 error generated.

This patch fixes this by making sure the "void *" pointer is converting
to "char *" before doing arithmetic on it.

Change-Id: Ib1663ed30abce76e05f06d042975eccd7d729823
2024-08-21 17:19:28 -04:00
Lancelot Six 3646064a0e coredump: Print diagnostic in stderr when errors are detected
This patch adds output (to stderr) to indicate step in the core dump
creation failed to improve debuggability.

Change-Id: I349692e278c2d744136d7fba7f7c2e5a7ada0c06
Signed-off-by: David Yat Sin <David.YatSin@amd.com>
2024-08-19 13:20:20 -04:00
Lancelot Six 3e0d3d6d61 coredump: Improve error handling when reading VRAM
It is possible for the runtime to receive an interrupt while trying to
access VRAM data using /proc/self/mem.  In such case, pread(2) would
return -1 and set errno to -EINTR.  This is not an error case, the
pread(2) call just need to be restarted, however current implementation
would tread it as an error.

This patch changes the the implementation to correctly retry on EINTR.
While at it, this patch also handles cases where pread(2) reads less
data than originally requested.

Change-Id: I6a72fc5eda4afd90319f0d24b35c9eac6d1ff41c
Signed-off-by: David Yat Sin <David.YatSin@amd.com>
2024-08-19 12:20:22 -04:00
Yifan Zhang 71494a920b Add support for GC 11.5.2
Change-Id: Iad8604881dc66108933ac2155fef3b74bca9ac3f
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: Chris Freehill <cfreehil@amd.com>
2024-06-25 12:50:03 -05:00
Sreekant Somasekharan 24463635f9 Initial GFX1201 changes.
Add target gfx1201 to several files.

Change-Id: I5cae7dba00ed58f8fbfa6e7147275bd7d5feaed0
Signed-off-by: Sreekant Somasekharan <sreekant.somasekharan@amd.com>
Signed-off-by: Chris Freehill <cfreehil@amd.com>
2024-06-25 12:27:09 -05:00
David Belanger 2f14acd9c1 Initial GFX12 changes.
Add target gfx1200 to several files.
Add cases for GFX12 in a few switch statements.

Signed-off-by: David Belanger <david.belanger@amd.com>
Change-Id: Ib90032f5b9d5a3306060f13a43d970108a1399df
Signed-off-by: Chris Freehill <cfreehil@amd.com>
2024-06-25 12:27:09 -05:00
Konstantin Zhuravlyov b2c32ad6cb Rename existing relocation types to legacy/v1 (NFC)
Change-Id: Ided7f656c34131b8067a19c0d3b2955fc8823628
2024-03-26 18:46:50 -04:00
pvanhout a93c18dc90 [libamdhsacode] Support COV6/Generic Targets
Change-Id: I4680577eb56dc436fbc134b169f172dd476bff37
2024-03-12 07:37:32 -04:00
David Yat Sin 5b28a1bc17 Fix compile error on certain gcc versions
Change-Id: I8a4fab76d1dcc576eb7706ab45fc786c0cab274a
2024-02-13 15:25:34 -05:00
Alex Sierra 91f2a70817 core dump: ulimit check mechanism added
Core dump generation considers ulimit to generate the proper size
file.

Signed-off-by: Alex Sierra <Alex.Sierra@amd.com>
Change-Id: I61d991fc003b173f9075b66bff6a931447720695
2023-12-05 23:19:14 -05:00
Alex Sierra 514b222368 core dump: Front end core dump API
This API consists in one function to be called from a fault event at the
hsa-runtime to generate a core dump.

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Change-Id: Ib1b90d5beb13f93c4e8ebd21fd61705ebb12ca5d
2023-12-05 23:19:14 -05:00
Alex Sierra 1083d5c35f core dump: SegmentBuilder classes added
SegmentBuilder classes are used to get core dump data from the GPUs.
So far, it uses thunk API calls and smaps to collect all data from
the Hardware.

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Change-Id: I2ad70ca5a951885181d3142653b186b0f6be739e
2023-12-05 23:19:14 -05:00
Lang Yu 991bbdcf24 Revert "Revert "Add support for GC 11.5.0 and 11.5.1""
This reverts commit ebc51dd0eb.

gfx1150/1151 is merged into mainline now.

Change-Id: Id179949318a37888c74abb5a8610d95bc2f22906
2023-12-04 15:03:31 +00:00
David Yat Sin ebc51dd0eb Revert "Add support for GC 11.5.0 and 11.5.1"
Reverting this as current mainline compiler branch does not support
gfx1150/gfx1151 yet. Will bring back later.

This reverts commit e877840197.

Change-Id: I31ff4fb2d5817538094a7ffaeba96dd6a7d660c7
2023-07-26 15:03:54 +00:00
Lang Yu e877840197 Add support for GC 11.5.0 and 11.5.1
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Change-Id: I3c4116e78a5c1ddac2389f5fece57485bdb17f68
2023-07-22 16:06:22 +08:00
Konstantin Zhuravlyov 8a6edb07d9 Cache referenced symbol table when pulling data in relocation section
Change-Id: I6ef21cedde1aca6fd1ec5e5d5634563f030eaab8
2023-06-21 16:35:45 -04:00
raghavmedicherla 4142a77375 [hsa-runtime] Add support to hsa-runtime to find symbols from ".dynsym" section.
Earlier, hsa-runtime was unable to find symbols from a stripped ELF-image becasue
no support to find symbols from ".dynsym" section.

Looking for symbols in .dynsym is enabled by LOADER_USE_DYNSYM=1
environment variable

Change-Id: I4f0e8dd0eb053a6066d4d49b670c52e51149531a
2023-06-16 14:40:50 -04:00
David Yat Sin 41f6d0426d Adding gfx941 and gfx942
Adding support for gfx941 and gfx942 ISAs.
gfx940 ISA will use sc0:1 sc1:1 on load/store operations
gfx942 ISA will use default load/store operations

Change-Id: If1efbef86f59e2cf2d48fe359cd4166405a0a579
2023-05-23 11:13:16 -04:00
David Yat Sin f0000da7b3 Removing invalid gfx entries
Change-Id: I1a9a9a064f5f65ecc3e124c5dd7d6baf6b5ccb5c
2023-05-12 11:59:27 -04:00
Mike Li de4d1ce424 Add gfx940 to AmdHsaCode
Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Change-Id: Ib4f7c801c3d3bac9a04c880c5bf86b72bfa3404f
2023-04-27 16:09:26 -04:00
Mike Li bd98a1e5bf Added gfx940 ISA
Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Change-Id: Icb1830fe186abc69fe7ee709b7f12b882cab9e87
2023-04-27 16:08:58 -04:00
Alex Sierra e82025bffa use mkstemp instead tempnam for temp file
tempnam has been marked as obsolete.

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Change-Id: Ie64d9a351bf386da00a96ceff059f685e11f2cca
2023-04-17 15:38:59 -04:00
Konstantin Zhuravlyov 8043fe9ee0 Loader/NFC: Factor out mach information into the struct
Change-Id: I9304c96336c434570bd5da92cd197ee764945907
2023-03-07 14:41:03 -05:00
raghavmedicherla 5727a10a1b [hsa-runtime] Modify elfsection checks in amd_elf_image class
Modified If condition checks in GElfImage::pullElf() of amd_elf_image.cpp to
 check using section types instead of a string check.

Change-Id: I1ab92f0a9118fb2382652a1cc900a3150cbee2da
2022-12-05 14:42:02 -05:00
David Belanger a0d3db6e8d Initial changes for gfx1101, based on gfx1100/gfx1102 implementation.
Change-Id: I949c1027ccabf38b4f924590e42e7327dc550f73
Signed-off-by: David Belanger <david.belanger@amd.com>
Reviewed-by: Jonathan Kim <jonathan.kim@amd.com>
2022-10-13 09:28:39 -04:00
Yifan Zhang daa01b8d57 Add gfx1103 support
This patch adds gfx1103 support

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Change-Id: I7f1d580059fcd501bce2c8fea894637960c29bc1
2022-08-04 11:23:28 -04:00
David Yat Sin cc3bd31591 Add gfx1102 support
Change-Id: I39cbda81a7a999aa2ecfad7a3e720000f7ca3408
Signed-off-by: David Yat Sin <David.YatSin@amd.com>
2022-08-03 10:56:54 -04:00
Graham Sider 446c5e9672 Add gfx1100 support
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Ic5d5559e43df5c73409ba900a42c6901aabae661
2022-08-03 10:56:49 -04:00
Yifan Zhang 54c8b7900d add gfx1036 support
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Change-Id: Ifc1b3cf2e46cf753f57470ebc6b034c1a349d3d2
2022-04-29 17:52:22 -04:00
Konstantin Zhuravlyov 9265409f08 Add code object v5 support
Change-Id: I03522765056e99ed49e6c5e213ee3753852de27b
2022-04-12 08:53:27 -04:00
Sean Keely 7e73760cd0 Revert "add gfx1036 support"
Compiler is not promoted to mainline yet.

This reverts commit 2f97f17df9.

Change-Id: I7256aeb3698ee3ae640a9f457a929abe24d5ef17
2022-03-18 02:35:01 -05:00
Yifan Zhang 2f97f17df9 add gfx1036 support
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Change-Id: I075779b1369fde759c29572fa2027a3748d6ed4c
2022-03-05 13:16:19 +08:00