Grafico dei commit

1262 Commit

Autore SHA1 Messaggio Data
German Andryeyev bb1295bcdf SWDEV-547108 - Fix compilation errors under Windows (#1085)
Also correct AQL print under Windows
2025-09-26 09:42:50 -04:00
Godavarthy Surya, Anusha fb72d7f851 SWDEV-524746 - Part-II Add multi device support for hip graph. Updated kernel arg manager for each device (#813)
- Updated kernel arg manager to support allocating kernel args on multiple devices for single graph.
- Updated AQL path to capture on the device where graph node is added.

Co-authored-by: Anusha GodavarthySurya <Anusha.GodavarthySurya@amd.com>
2025-09-25 20:38:18 +05:30
Ioannis Assiouras c53bdb9643 SWDEV-556866 - Added misssing include of rocrctx.hpp in rocurilocator (#1094) 2025-09-24 06:44:02 +01:00
SaleelK 34b9184686 clr: Fix memory corruption for memset nodes (#1068)
* Detect graph capture and use graph kernelarg memory for FillBuffer pattern
2025-09-23 17:17:33 -07:00
Ioannis Assiouras 97bc3af918 SWDEV-550882 - Add support for hipIpcMemLazyEnablePeerAccess (#817) 2025-09-23 00:05:51 +01:00
Ajay GunaShekar 0118184d22 SWDEV-554678 - Navi44 on windows (#936)
* SWDEV-554678 - Navi44 on windows

* SWDEV-554678 - Navi44 in palsettings
2025-09-22 08:52:41 -07:00
MachineTom 25922d08c3 SWDEV-539145 - Return error when ext_fine_grain_pool unavailable (#877)
Return error when ext_fine_grain_pool is unavailable for
hipHostMallocUncached, hipHostAllocUncached and
hipExtHostRegisterUncached.
Disable related tests on Navi4x where
ext_fine_grain_pool is unavailable
2025-09-21 19:25:28 -04:00
MachineTom c6c2fa212c SWDEV-1 Fix a bug of VGPRs (#1000)
Fix a bug of VGPRs due to a previous patch:
SWDEV-546223 - Get image support info from ISA meta
2025-09-21 19:23:12 -04:00
German Andryeyev ea89ddd589 SWDEV-547108 - Add dll loader for Windows build (#1004)
The build of ROCR backend will be enabled by default in Windows.
It requires the dll loader until ROCR dll will be always available in Windows for any configuration.
2025-09-19 11:25:30 -04:00
SaleelK 149dc17c90 clr: Optimize doorbell ring (#1030)
*Lay foundation to batch packets efficiently for graphs
*Dynamically copy packets with max threshold set with
DEBUG_HIP_GRAPH_BATCH_SIZE, if not stagger packet copy with pow2
*Default threshold for DEBUG_HIP_GRAPH_BATCH_SIZE is 256
*If TS are not collected for a signal for reuse, create a new signal.
This can potentially increase signal footprint if the handler doesn't run
fast enough.
2025-09-18 15:02:10 -07:00
Ioannis Assiouras 5ac163a811 SWDEV-548770 - Added system scope acquire for all packets in gfx12 (#966) 2025-09-18 14:33:17 +01:00
lancesix 45b48fb987 SWDEV-555043 - Do not wait on signal if gpu in error state (#1023)
During a process tear-down we wait on all signals before releasing them:

    VirtualGPU::HwQueueTracker::~HwQueueTracker() {
      for (auto& signal : signal_list_) {
        CpuWaitForSignal(signal);
        signal->release();
      }
      [...]
    }

In the case where we exit the process after a GPU error that did not
cause an abort (ulimit -c == 0), waiting for the signal can be skipped.
With the device on the error state, no progress is made, and the signal
is probably never going to be modified again:

    inline bool WaitForSignal(hsa_signal_t signal, bool active_wait = false, bool yield = false) {
          [...]
          if (HIP_SKIP_ABORT_ON_GPU_ERROR && amd::Device::IsGPUInError()) {
            ClPrint(amd::LOG_ERROR, amd::LOG_SIG,
                    "Device not Stable, while waiting for Signal ="
                    "(0x%lx) for %d ns",
                    signal.handle, kTimeout4Secs);
            return true;
          }
          [...]
    }

However, after calling CpuWaitForSignal, when calling "release", we can
end-up on a signal dtor which also tries to wait on the signal.  Because
the GPU is the error state, we never receive the signal, and hang the
process during tear down.  This happens with the ProfilingSignal dtor:

    ProfilingSignal::~ProfilingSignal() {
      if (signal_.handle != 0) {
        if (hsa_signal_load_relaxed(signal_) > 0) {
          LogError("Runtime shouldn't destroy a signal that is still busy!");
          if (hsa_signal_wait_scacquire(signal_, HSA_SIGNAL_CONDITION_LT, kInitSignalValueOne,
                                        kUnlimitedWait, HSA_WAIT_STATE_BLOCKED) != 0) {
          }
        }
        hsa_signal_destroy(signal_);
      }
    }

This dtor should check that the GPU is not in the error state before
trying to wait, which is what this patch implements.

Bug: SWDEV-555043
Bug: SWDEV-553435
Bug: SWDEV-553679
Bug: SWDEV-555119
2025-09-18 14:32:04 +01:00
Ioannis Assiouras 5c1eebab84 SWDEV-543723 - Change agentInfo parameter in hostAlloc to void* (#995) 2025-09-18 11:43:15 +01:00
SaleelK ec5e9673ad clr: Use current device copy engine for inter-dev copy (#945)
* For inter-device copies always use the SDMA engine of current device
* ROCr uses srcAgent SDMA engine, and it could be a remote device
2025-09-16 12:56:07 -07:00
Ioannis Assiouras 35629e433d SWDEV-546146 - Added support for hipMemLocationTypeHost in hipMemSetAccess (#682) 2025-09-10 23:06:20 +01:00
SaleelK c8e91b3f3e clr: Fix condition for taking shader path (#884)
* SWDEV-551080
* Fix condition for taking shader path, the size check was moved
  incorrectly
* Also account for a bitmask returned for preferred engines
2025-09-09 13:13:29 -07:00
Ioannis Assiouras 4c6fce8ba0 SWDEV-546223 - Remove comgr query for image support from windows path (#861) 2025-09-09 07:54:48 +05:30
SaleelK e197aa83ba SWDEV-543723 - Execute permission for kernArg buf (#728)
- Refactor deviceLocalAlloc arguments
- Refactor hostAlloc code, have cleaner interface
- Kern args buffer need to have execute flag set as CP enforces this on
  certain newer HW.
2025-09-08 12:21:30 -07:00
SaleelK c4537e8050 SWDEV-553126 - Improve logging (#835)
* Ability to mask COPY api usage in logs
* Show total graph nodes in logs
* Add another log level for detailed debug
2025-09-04 10:08:41 -07:00
German Andryeyev 7a1a6682e2 SWDEV-552846 - Unpin memory for hip before exit the copy (#851) 2025-09-04 20:04:01 +05:30
Ajay GunaShekar f2ad8d6d5e SWDEV-553099 - remove WITHOUT_HSA_BACKEND usage (#831) 2025-09-03 08:40:25 -07:00
Ajay GunaShekar d4435bb74a SWDEV-552573 - restore asm file before clang formatting (#802)
* Restore asm file before clang formatting
* Surround inline assembly in clang-format off
2025-09-03 14:26:49 +05:30
Ioannis Assiouras a1c30318fb SWDEV-546223 - Get image support info from ISA meta (#773) 2025-09-02 15:05:18 +01:00
Ioannis Assiouras 5f525ee934 SWDEV-550882 - Expect HSA_EXT_POINTER_TYPE_RESERVED_ADDR pointer type from hsa_amd_pointer_info for hmm (#733) 2025-08-27 19:42:13 +01:00
Karthik Jayaprakash 89070536c0 SWDEV-552141 - Fix handle/fd type passed from app to align with spec. (#759)
* SWDEV-552141 - Fix handle/fd type passed from app to align with spec.

* SWDEV-552141 - Fix handle/fd type passed from app to align with spec.
2025-08-27 14:28:53 -04:00
SaleelK ddba20579d SWDEV-551080 - Fix hipMemcpyDeviceToDeviceNoCU path (#683)
* hipMemcpyDeviceToDeviceNoCU should always take SDMA path as per the
  flag usage
2025-08-25 15:13:02 -07:00
Danylo Lytovchenko 2ff2316227 Adjust clang format to the new versions, revert broken macro layout (#714) 2025-08-22 17:23:22 +02:00
systems-assistant[bot] 621da5410a SWDEV-465041 - Avoid wait in device enqueue (#443)
If we have PCIE atomics then we can avoid workaround in the scheduler, which requires an explicit wait on CPU
2025-08-20 12:46:47 -04:00
Danylo Lytovchenko f7338717ae SWDEV-470698 - fix formatting, add format check workflow (#657) 2025-08-20 19:58:06 +05:30
Andryeyev, German 72b9408fed SWDEV-547108 - Fix compilation errors under Windows (#867)
Interop and numa are not enabled.

[ROCm/clr commit: 0ac913e64c]
2025-08-17 02:33:31 -04:00
Betigeri, Sourabh 35e48d1eaf SWDEV-546293 - hipMemPrefetchAsync_v2 and hipMemAdvise_v2 implementation (#869)
SWDEV-546293 - hipMemPrefetchAsync hipMemAdvise_v2

Please enter the commit message for your changes. Lines starting

[ROCm/clr commit: cbee74a80e]
2025-08-15 22:40:04 -07:00
Manocha, Rahul b3ccf487da SWDEV-545952 - API definitions for hipStreamSet/GetAttribute (#831)
Co-authored-by: Rahul Manocha <rmanocha@amd.com>

[ROCm/clr commit: 0f49c4a97f]
2025-08-15 12:51:35 -07:00
Arandjelovic, Marko c33359ec62 SWDEV-532479 - Add tracking of hostcall memory allocations (#416)
* SWDEV-532479 - Add tracking of hostcall memory allocations

* SWDEV-532479 - Remove hostcall allocations if request is received

* SWDEV-532479 - Cleanup

* SWDEV-532479 - Naming fix

* SWDEV-532479 - Add new separator after each new function

[ROCm/clr commit: b58faa2f37]
2025-08-15 00:17:24 +02:00
Xie, Pengda 0a7064606c SWDEV-520384 - Improve postLoad latency during program load (#758)
Change-Id: I3c5a9e148efbd845c8fa3e4b51d9653664e9c499

[ROCm/clr commit: 191f068193]
2025-08-13 19:36:06 -07:00
Xie, Pengda 446f5740d8 SWDEV-547880 - Remove incorrect constMemSize calculation (#813)
[ROCm/clr commit: a028359ead]
2025-08-13 13:13:27 -07:00
Andryeyev, German 6df9a49437 SWDEV-465041 - Add support for user events with DD (#321)
* SWDEV-465041 - Add support for user events with DD

User events can be replaced with HSA signals. Add the interface
to allocate HSA signal for user events and update the status on
CL_COMPLETE.
Force pinned path with DD to avoid blocking calls. Pinned memory
can be released only when the command is complete.
Simplify device enqueue path to use generic kernel arg buffer and
signals

* Fix notifyCmdQueue() logic for OCL

* Avoid blocking calls in OCL with DD

* Add event  destruciton in a case of the failure.

[ROCm/clr commit: 2305f8ae56]
2025-08-12 19:04:36 -04:00
Chaudhary, Jatin Jaikishan 8f5eb715dc SWDEV-508540 - adjust for compile time wavefront 64 (#747)
[ROCm/clr commit: 926eedc230]
2025-08-11 10:17:27 +05:30
GunaShekar, Ajay bfcf0ef4e8 SWDEV-543366 - Bump PAL_CLIENT_INTERFACE_MAJOR_VERSION 916 --> 932 (#725)
Co-authored-by: Lin, Qun <Quentin.Lin@amd.com>
Co-authored-by: Lin,Qun <qlin@amd.com>

[ROCm/clr commit: ed903e8889]
2025-08-08 08:45:42 -07:00
Kudchadker, Saleel 3a849c6962 SWDEV-538195 - Introduce threshold for handler submission (#723)
- When doing device/stream sync, we can submit a handler which may
  introduce some host side delays. Use DEBUG_CLR_BATCH_CPU_SYNC_SIZE to
  batch commands for host wait. Default for HIP is 8 commands.
- Investigation is underway in ROCr but need to address this for now in
  HIP runtime.

[ROCm/clr commit: 9b045922a8]
2025-08-06 20:34:42 -07:00
Xie, Pengda 9cbbee4d6e SWDEV-520384 - Improve Fat Binary loading latency (#390)
Init and fini kernel needs to be launched when we load and unload code object. Avoid looping through all kernels within a code object just to run the init and fini kernels. Compiler currently only generates 1 init and fini kernel.

[ROCm/clr commit: cd46294b31]
2025-08-05 14:02:05 -07:00
Xie, Pengda b7d8cb56d1 SWDEV-505833 - Remove DEBUG_CLR_SKIP_RELEASE_SCOPE flag (#735)
Cleanup debug flag DEBUG_CLR_SKIP_RELEASE_SCOPE

[ROCm/clr commit: 4121a860bf]
2025-08-05 08:31:55 -07:00
Kudchadker, Saleel a1d3da6bd3 SWDEV-547614 - Demangle graph kernel names (#809)
[ROCm/clr commit: 1492328894]
2025-08-01 14:35:30 -07:00
Manocha, Rahul 4a93a614e5 SWDEV-539710 - Defer allocation of managed variable (#652)
Co-authored-by: Rahul Manocha <rmanocha@amd.com>

[ROCm/clr commit: 3f6f9d6081]
2025-07-31 08:30:23 -07:00
Betigeri, Sourabh 680c7fbf64 SWDEV-483895 - Use ROCr to reserve memory for HMM (#590)
[ROCm/clr commit: a1f056bd11]
2025-07-15 21:40:13 +05:30
Xie, Jiabao(Jimbo) e5226f2b7e SWDEV-460151 - add gfx1201 to amd-staging clr (#183)
* SWDEV-460151 - add gfx1201 to amd-staging clr

* SWDEV-460151 - removed pal macro

---------

Co-authored-by: Jimbo Xie <jiabaxie@amd.com>

[ROCm/clr commit: a5d932f160]
2025-07-11 08:51:47 -07:00
Sang, Tao a777d6eca0 SWDEV-539145 - Simplify host memory pool management (#668)
* SWDEV-539145 - Simplify host memory pool management

Remove unnecessary variables and functions.
Make code simpler and clear.

* Change cpu_agent_info_ into pointer.

* Restore getPreferredNumaNode()

[ROCm/clr commit: 1351cd7fa8]
2025-07-11 10:38:40 -04:00
Sang, Tao 7fd322af90 SWDEV-508776 - support VGPRs validation (#274)
Clarify some VGPRs terms description.
Fix some wrong query logics of availableVGPRs_ and
availableRegistersPerCU_ in device info.
Add hipDeviceAttributeMaxAvailableVgprsPerThread
attribute query.
Remove hardcoding of following
 info_.vgprAllocGranularity_
 info_.vgprsPerSimd_

[ROCm/clr commit: 397f303d97]
2025-07-09 10:46:52 -04:00
Kudchadker, Saleel 433c25eab0 SWDEV-539378 - Use agent of IPC memory owner (#570)
- Currently runtime just uses the local agent as it did not check for
  IPCShared()
- With this fix we query hsa_amd_pointer_info and get the right agent
  for the memory to pass it to the HSA copy api

[ROCm/clr commit: 46d766e4e2]
2025-07-08 12:02:01 -07:00
Xie, Pengda 8e5921174f SWDEV-540576 - Abort if user request a core dump (#653)
* SWDEV-539414 - Return error status from runtime handler when HIP_SKIP_ABORT_ON_GPU_ERROR is false

* SWDEV-539414 - default handler when GPU core file is generated

* SWDEV-540576 - Abort if user request a core dump

Change-Id: I9e2c640acf559880bd13641de9103e660ef822a3

---------

Co-authored-by: Assiouras, Ioannis <Ioannis.Assiouras@amd.com>
Co-authored-by: agunashe <ajay.gunashekar@amd.com>

[ROCm/clr commit: 9c1bff0ae7]
2025-07-03 00:29:14 +05:30
Sang, Tao 287ec83f5c SWDEV-539145 - Support extended fine grained system memory pool (#603)
* Add hipHostMalloc() new flag hipHostMallocUncached which will force to allocate pinned
host memory on extended fine grained system memory pool.
* Add hipHostAlloc() new flag hipHostAllocUncached which will force to allocate pinned
host memory on extended fine grained system memory pool.
* Add hipHostRegister() new flag hipHostRegisterUncached which will force to map
host memory onto extended fine grained system momory pool.

[ROCm/clr commit: a7d7687b8f]
2025-07-01 10:10:10 +05:30