If Dev0 and Dev1 are not the same gfx, we should temporarily
set the target ASIC for compiling Shader code.
Signed-off-by: Shane Xiao <shane.xiao@amd.com>
Signed-off-by: Shikai Guo <shikai.guo@amd.com>
Change-Id: I5836beb16ade519f5a148d3d2b9c2875554f0c35
If Dev0 and Dev1 are not the same gfx, we should temporarily
set the target ASIC for compiling Shader code.
Signed-off-by: Shane Xiao <shane.xiao@amd.com>
Signed-off-by: Shikai Guo <shikai.guo@amd.com>
Change-Id: I5836beb16ade519f5a148d3d2b9c2875554f0c35
[ROCm/ROCR-Runtime commit: 5d6f900353]
Using wrapper header files will result in #warning message by default
Change-Id: If5847e1b03523251238018b2cf0725b302619963
[ROCm/rdc commit: bf49b88866]
Add dstMemory format updating.
Separate format updating for srcMemory and dstMemory.
Change-Id: I1692b92d417bbd742d562679f218ebf8ca532e92
[ROCm/clr commit: 7624a48de9]
Using wrapper header files will result in #warning message by default
Change-Id: I8941a96bdc1b921a7646ccb353130cb283957ff8
[ROCm/rocm_smi_lib commit: daffcdb930]
Using wrapper header files will result in #warning message by default
Change-Id: If782c70db5a02e0143eca750c6a72803d39ca837
[ROCm/rocprofiler commit: 9265322297]
Using wrapper header files will result in #warning message by default
Change-Id: Ib8a05d11f2391dfcdac8601da26e1096821cd555
[ROCm/roctracer commit: 245eafea4c]
The previous implementation using std::copy() resulted in
differences between the in-memory and on-disk representations.
With the updated implementation, we get the same contents.
Change-Id: Iadfae3cd7f7ba99538da2ac4f11f30f5a78260d8
[ROCm/clr commit: b17056cb93]
The previous implementation using std::copy() resulted in
differences between the in-memory and on-disk representations.
With the updated implementation, we get the same contents.
Change-Id: Iadfae3cd7f7ba99538da2ac4f11f30f5a78260d8
Overload Assembler::RunAssembleBuf to take in an extra Gfxv parameter.
Using this overload will temporarily set the target ASIC to Gfxv before
calling RunAssemble, and copy back the original MCPU literal upon
completion. The copy to reset the original MCPU in this case is safe as
the MCPU length is always known.
This will be useful in multi-device test cases whereby the devices are
not necessarily the same gfx version. The overload is explicitly for the
RunAssembleBuf wrapper rather than RunAssemble to ensure the default
MCPU is always reset independent of errors in RunAssemble.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I7fe5a962876314b6df32e4b7160174949d98f9e3
Overload Assembler::RunAssembleBuf to take in an extra Gfxv parameter.
Using this overload will temporarily set the target ASIC to Gfxv before
calling RunAssemble, and copy back the original MCPU literal upon
completion. The copy to reset the original MCPU in this case is safe as
the MCPU length is always known.
This will be useful in multi-device test cases whereby the devices are
not necessarily the same gfx version. The overload is explicitly for the
RunAssembleBuf wrapper rather than RunAssemble to ensure the default
MCPU is always reset independent of errors in RunAssemble.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I7fe5a962876314b6df32e4b7160174949d98f9e3
[ROCm/ROCR-Runtime commit: 54136f60a0]
The change enables VM support in graphs on Windows. That allows
to avoid caching of all allocations at the cost of map/unmap
overhead during memory create/destroy.
Change-Id: I792be00fba099e5e5d3cd44a963e1dfd6976a86d
[ROCm/clr commit: 04b696abee]
The change enables VM support in graphs on Windows. That allows
to avoid caching of all allocations at the cost of map/unmap
overhead during memory create/destroy.
Change-Id: I792be00fba099e5e5d3cd44a963e1dfd6976a86d
Cole Ramos
ROCm CI Service Account
Shane Xiao
agunashe
Ranjith Ramakrishnan
taosang2
Sam Wu
Jacob Lambert
Graham Sider
Jaydeep Patel
Giovanni LB
Kiumars Sabeti
German