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kjayapra-amd 9f68891f68 SWDEV-232903 - Change pattern64 to uint64_t from size_t to handle 32 bit machines.
Change-Id: I423cd14d145556544563027931562d7b8bf9442d


[ROCm/clr commit: 4c8b32b13c]
2021-10-18 14:31:09 -04:00
kjayapra-amd 4c8b32b13c SWDEV-232903 - Change pattern64 to uint64_t from size_t to handle 32 bit machines.
Change-Id: I423cd14d145556544563027931562d7b8bf9442d
2021-10-18 14:31:09 -04:00
Sean Keely 402eae11b6 Correct rocrtst cmake.
Generates symlinks exactly once.
Admits parallelism to code object compilation.
Adds proper dependency tracking.
Adds code object files to the packages.

Change-Id: If471961906f16a2ffdc6bf5f682a4e322fb38f3e
2021-10-18 11:10:50 -04:00
Sean Keely 3cfaebf4e8 Correct rocrtst cmake.
Generates symlinks exactly once.
Admits parallelism to code object compilation.
Adds proper dependency tracking.
Adds code object files to the packages.

Change-Id: If471961906f16a2ffdc6bf5f682a4e322fb38f3e


[ROCm/ROCR-Runtime commit: 402eae11b6]
2021-10-18 11:10:50 -04:00
cjatin fa0694e90f SWDEV-306643 - add align and launch bounds for hiprtc
Change-Id: Id178230eeeec94a8678e96474c35376d5427599a


[ROCm/clr commit: 9caaa6f492]
2021-10-17 17:07:04 -04:00
cjatin 9caaa6f492 SWDEV-306643 - add align and launch bounds for hiprtc
Change-Id: Id178230eeeec94a8678e96474c35376d5427599a
2021-10-17 17:07:04 -04:00
cjatin b990308648 SWDEV-303745 - Add new path of clangrt lib
Change-Id: I07fd48d3b72bad6f356976972fef0b20c487a53e


[ROCm/clr commit: 969f31da65]
2021-10-17 17:06:32 -04:00
cjatin 969f31da65 SWDEV-303745 - Add new path of clangrt lib
Change-Id: I07fd48d3b72bad6f356976972fef0b20c487a53e
2021-10-17 17:06:32 -04:00
Sean Keely 534dc3f60c Correct rocrtst pool iterator.
GetGlobalMemoryPool had improper return codes for an iterator callback
and did not properly order the APU pool selection path.

Change-Id: I01ab9d23e2352be98d9718bc25889ad4f779d3ca
2021-10-16 05:02:05 -04:00
Sean Keely eabb4ba4b4 Correct rocrtst pool iterator.
GetGlobalMemoryPool had improper return codes for an iterator callback
and did not properly order the APU pool selection path.

Change-Id: I01ab9d23e2352be98d9718bc25889ad4f779d3ca


[ROCm/ROCR-Runtime commit: 534dc3f60c]
2021-10-16 05:02:05 -04:00
Chauncey Hui d26d92bff4 SWDEV-2 - Change OpenCL version number from 3379 to 3380
[ROCm/clr commit: 61f176cee6]
2021-10-16 03:00:05 -04:00
Chauncey Hui 61f176cee6 SWDEV-2 - Change OpenCL version number from 3379 to 3380 2021-10-16 03:00:05 -04:00
Alex Xie e5816ea048 SWDEV-306854 - Observed conformance subtest SVM failure
Revert "SWDEV-292408 - Keep tracking of subbuffers for multiple devices"

Change-Id: I604e9b49368fa1f143302fddda674c18d7351108


[ROCm/clr commit: ea48fc029b]
2021-10-15 09:28:06 -04:00
Alex Xie ea48fc029b SWDEV-306854 - Observed conformance subtest SVM failure
Revert "SWDEV-292408 - Keep tracking of subbuffers for multiple devices"

Change-Id: I604e9b49368fa1f143302fddda674c18d7351108
2021-10-15 09:28:06 -04:00
Chauncey Hui b14a42302f SWDEV-2 - Change OpenCL version number from 3378 to 3379
[ROCm/clr commit: 3e75cd150e]
2021-10-15 03:00:05 -04:00
Chauncey Hui 3e75cd150e SWDEV-2 - Change OpenCL version number from 3378 to 3379 2021-10-15 03:00:05 -04:00
Sean Keely 4b0c94cfe8 Silence Clang warning.
Clang warns about bitwise operators on bools.  Cast to int silences
the warning without introducing short circut logic.

Change-Id: I6e25138e1acf4a5562d3925ea5b2fcef3addb783
2021-10-14 23:56:58 -05:00
Sean Keely f5fcc610b7 Silence Clang warning.
Clang warns about bitwise operators on bools.  Cast to int silences
the warning without introducing short circut logic.

Change-Id: I6e25138e1acf4a5562d3925ea5b2fcef3addb783


[ROCm/ROCR-Runtime commit: 4b0c94cfe8]
2021-10-14 23:56:58 -05:00
Sean Keely efeee734db Drop -Werror.
Would be nice to get warning count changes highlighted in CI though.

Clang's increasingly suspect diagnostics has caused multiple build
breaks without highlighting any actual issues.
Also: https://embeddedartistry.com/blog/2017/05/22/werror-is-not-your-friend/

Change-Id: I7dc82da58cd86f7b4f1a9fb511c4c039419271d4
2021-10-14 23:54:45 -05:00
Sean Keely 2a0cdb73f3 Drop -Werror.
Would be nice to get warning count changes highlighted in CI though.

Clang's increasingly suspect diagnostics has caused multiple build
breaks without highlighting any actual issues.
Also: https://embeddedartistry.com/blog/2017/05/22/werror-is-not-your-friend/

Change-Id: I7dc82da58cd86f7b4f1a9fb511c4c039419271d4


[ROCm/ROCR-Runtime commit: efeee734db]
2021-10-14 23:54:45 -05:00
kjayapra-amd f7053598c5 SWDEV-232903 - Adding string to guarantee message, which is required on windows.
Change-Id: I86d3d53126aa4baa1ffc27295e4f908ac7028551


[ROCm/clr commit: 5a33a15c42]
2021-10-14 15:17:25 -04:00
kjayapra-amd 5a33a15c42 SWDEV-232903 - Adding string to guarantee message, which is required on windows.
Change-Id: I86d3d53126aa4baa1ffc27295e4f908ac7028551
2021-10-14 15:17:25 -04:00
Kent Russell f7e90798a0 CMakeLists: Refer to libdrm-amdgpu1 for DEB
This is required for Marketing Name, but Marketing Name isn't a hard
requirement for ROCT, so make it a Suggested package for DEBs.

Adding a commented-out possible solution for RPM-based distros, as
unfortunately SLE <10 and CentOS/RHEL <8 don't know what "SUGGESTS"
means. Potentially we will add a check that the build environment
that determines if we require the REQUIRES field to be used.
Hopefully we can work out the RPM side quickly, but for now enable
SUGGESTS on DEB as a start

Signed-off-by: Kent Russell <kent.russell@amd.com>
Change-Id: Icea689a14c185964e7f47fb23ee432f9b35ccb03
2021-10-14 13:20:29 -04:00
Kent Russell b990a7671e CMakeLists: Refer to libdrm-amdgpu1 for DEB
This is required for Marketing Name, but Marketing Name isn't a hard
requirement for ROCT, so make it a Suggested package for DEBs.

Adding a commented-out possible solution for RPM-based distros, as
unfortunately SLE <10 and CentOS/RHEL <8 don't know what "SUGGESTS"
means. Potentially we will add a check that the build environment
that determines if we require the REQUIRES field to be used.
Hopefully we can work out the RPM side quickly, but for now enable
SUGGESTS on DEB as a start

Signed-off-by: Kent Russell <kent.russell@amd.com>
Change-Id: Icea689a14c185964e7f47fb23ee432f9b35ccb03


[ROCm/ROCR-Runtime commit: f7e90798a0]
2021-10-14 13:20:29 -04:00
Bing Ma 213b5dffd1 SWDEV-306602 - [SANITIZER_AMDGPU] Force copyBuffer to use ROCr functions when ASAN is ON
Change-Id: I04a4cdd5ab8c5543f2a0f08c139c45ac7aebe64a


[ROCm/clr commit: 02f939a40d]
2021-10-14 12:55:27 -04:00
Bing Ma 02f939a40d SWDEV-306602 - [SANITIZER_AMDGPU] Force copyBuffer to use ROCr functions when ASAN is ON
Change-Id: I04a4cdd5ab8c5543f2a0f08c139c45ac7aebe64a
2021-10-14 12:55:27 -04:00
Ori Messinger b1720b42cd ROCm SMI CLI: Add --showtopoaccess Functionality
The purpose of this patch is to implement --showtopoaccess
functionality in the CLI, which shows True or False if P2P is
possible between two given GPUs.

Signed-off-by: Ori Messinger <Ori.Messinger@amd.com>
Change-Id: I07d70d80ae7b484136b31d5d22780c4990029391


[ROCm/rocm_smi_lib commit: e2d9a37e5f]
2021-10-14 11:06:05 -04:00
Ori Messinger e2d9a37e5f ROCm SMI CLI: Add --showtopoaccess Functionality
The purpose of this patch is to implement --showtopoaccess
functionality in the CLI, which shows True or False if P2P is
possible between two given GPUs.

Signed-off-by: Ori Messinger <Ori.Messinger@amd.com>
Change-Id: I07d70d80ae7b484136b31d5d22780c4990029391
2021-10-14 11:06:05 -04:00
Jason Tang 2590bfd491 SWDEV-307023 - Fix cltrace build
Change-Id: I75fd953668dc576c3132ae463e34ecb4ae2fb0c7


[ROCm/clr commit: 5c13f33da2]
2021-10-14 09:26:27 -04:00
Jason Tang 5c13f33da2 SWDEV-307023 - Fix cltrace build
Change-Id: I75fd953668dc576c3132ae463e34ecb4ae2fb0c7
2021-10-14 09:26:27 -04:00
Chauncey Hui c22c59c4a4 SWDEV-2 - Change OpenCL version number from 3377 to 3378
[ROCm/clr commit: c9f73f8d31]
2021-10-14 03:00:16 -04:00
Chauncey Hui c9f73f8d31 SWDEV-2 - Change OpenCL version number from 3377 to 3378 2021-10-14 03:00:16 -04:00
Ori Messinger a9993fb509 ROCm SMI LIB: Add rsmi_is_P2P_accessible() API
Implements rsmi_is_p2p_accessible API.
The function returns True if P2P is possible between two nodes.

Signed-off-by: Ori Messinger <Ori.Messinger@amd.com>
Change-Id: Ic7316eebcec4480175c7ad04c21a42b2e1a4c454


[ROCm/rocm_smi_lib commit: ff02042c64]
2021-10-13 22:01:33 -04:00
Ori Messinger ff02042c64 ROCm SMI LIB: Add rsmi_is_P2P_accessible() API
Implements rsmi_is_p2p_accessible API.
The function returns True if P2P is possible between two nodes.

Signed-off-by: Ori Messinger <Ori.Messinger@amd.com>
Change-Id: Ic7316eebcec4480175c7ad04c21a42b2e1a4c454
2021-10-13 22:01:33 -04:00
kjayapra-amd 6f62f832cb SWDEV-232903 - Move hipmemset Dword optimization to ROCclr.
Change-Id: I3eae61720cbc6364f1aaac4865bfd8b6ded08097


[ROCm/clr commit: 88ed58735d]
2021-10-13 11:32:15 -04:00
kjayapra-amd 88ed58735d SWDEV-232903 - Move hipmemset Dword optimization to ROCclr.
Change-Id: I3eae61720cbc6364f1aaac4865bfd8b6ded08097
2021-10-13 11:32:15 -04:00
kjayapra-amd 7c4dfc27a7 SWDEV-232903 - Move hipmemset dword optimization into ROCclr.
Change-Id: I1af437de2771f6a48d06ce643ade6b79f551a55c


[ROCm/clr commit: 4d1195f0a7]
2021-10-13 11:32:00 -04:00
kjayapra-amd 4d1195f0a7 SWDEV-232903 - Move hipmemset dword optimization into ROCclr.
Change-Id: I1af437de2771f6a48d06ce643ade6b79f551a55c
2021-10-13 11:32:00 -04:00
pghafari 6cb3ef5d42 SWDEV-245531 - GLInterop: updating glEnv logic
Change-Id: I6103243c477547a6a2b714bbf836ce36abe84f8c


[ROCm/clr commit: 5b6b2e6d2c]
2021-10-13 09:26:52 -04:00
pghafari 5b6b2e6d2c SWDEV-245531 - GLInterop: updating glEnv logic
Change-Id: I6103243c477547a6a2b714bbf836ce36abe84f8c
2021-10-13 09:26:52 -04:00
Chauncey Hui 25b7f971e6 SWDEV-2 - Change OpenCL version number from 3376 to 3377
[ROCm/clr commit: 52e57b660b]
2021-10-13 03:00:07 -04:00
Chauncey Hui 52e57b660b SWDEV-2 - Change OpenCL version number from 3376 to 3377 2021-10-13 03:00:07 -04:00
Sean Keely 5e8d261352 Skip inital CU mask setup unless HSA_CU_MASK is defined for the GPU.
Limits CU masking application to cases where it is explicitly requested.

Change-Id: Ib65ad0ac98f86d840c0328fa15ce40c05cd4bfae
2021-10-12 20:31:56 -05:00
Sean Keely 0116378a99 Skip inital CU mask setup unless HSA_CU_MASK is defined for the GPU.
Limits CU masking application to cases where it is explicitly requested.

Change-Id: Ib65ad0ac98f86d840c0328fa15ce40c05cd4bfae


[ROCm/ROCR-Runtime commit: 5e8d261352]
2021-10-12 20:31:56 -05:00
Freddy Paul ca899ea429 Cleanup symlink to header files and folders
Due to a CPACK bug the package needs to remove header file
symlinks.  Cleanup is required for uninstall and upgrade
since each release installs to a different folder.

Change-Id: I5ec378b21e69235404781c7bce3c0203eb38eed1
2021-10-12 14:56:02 -05:00
Freddy Paul 8d550d9cbe Cleanup symlink to header files and folders
Due to a CPACK bug the package needs to remove header file
symlinks.  Cleanup is required for uninstall and upgrade
since each release installs to a different folder.

Change-Id: I5ec378b21e69235404781c7bce3c0203eb38eed1


[ROCm/ROCR-Runtime commit: ca899ea429]
2021-10-12 14:56:02 -05:00
Jason Tang e4db6ef66a SWDEV-306697 - Fix OCLGlobalOffset segfaults
If we don't create the __amd_rocclr_gwsInit kernel, we still want
to create the rest of the image related blit kernels.

Change-Id: I8bc4645f9f9116eeecbb8b22e981ac4d520f3121


[ROCm/clr commit: 55a0cf0b0c]
2021-10-12 15:13:28 -04:00
Jason Tang 55a0cf0b0c SWDEV-306697 - Fix OCLGlobalOffset segfaults
If we don't create the __amd_rocclr_gwsInit kernel, we still want
to create the rest of the image related blit kernels.

Change-Id: I8bc4645f9f9116eeecbb8b22e981ac4d520f3121
2021-10-12 15:13:28 -04:00
Sean Keely 19c1e92b4c Remove io_link workarounds.
KFD topology has been corrected and the defaults used by this
workaround are no longer true for all chips.

Change-Id: I0242d8077e9666ed1cf0dc3985244258ae5c0924
2021-10-11 19:15:07 -05:00
Sean Keely f19e8c43d2 Remove io_link workarounds.
KFD topology has been corrected and the defaults used by this
workaround are no longer true for all chips.

Change-Id: I0242d8077e9666ed1cf0dc3985244258ae5c0924


[ROCm/ROCR-Runtime commit: 19c1e92b4c]
2021-10-11 19:15:07 -05:00