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357 Commits

Autor SHA1 Nachricht Datum
German Andryeyev bb636d4fca SWDEV-278896 - Increase thresholds to match MT behavior
MT doesn't use GPU waits, but CPU for sync between engines.
Change the threshold values for CPU waits for direct dispatch.
That will bring behavior closer to MT.

Change-Id: Ia41c3cb812614962aff2746b6cf858f1bf77dda2


[ROCm/clr commit: ca2ea70a6c]
2021-04-16 17:47:57 -04:00
German Andryeyev c8c1ed4c13 SWDEV-86035 - use the new field for SE mask
Change-Id: I51ed37f1194264876a3099189f35216d01988771


[ROCm/clr commit: 57d668ab8f]
2021-04-16 11:10:34 -04:00
Sourabh Betigeri a936034ca4 SWDEV-279447 - Change to report 64kB of LDS for Windows as well to match the runtime behavior of HIP
Change-Id: I80b66346e17ba23766b7c9fe4e40ca94cb07f54b


[ROCm/clr commit: 70af4db3a6]
2021-04-15 13:26:35 -04:00
Vladislav Sytchenko 1ec25599c7 SWDEV-280473 - Fix warnings in combined LC/HSAIL build
Enabling both LC and HSAIL will cause the DYN macro to be redefined.
Rename it for each compiler to avoid name clashing.

Change-Id: I607f022f37c4d05bef4e3a8070d19bd3659d7bc2


[ROCm/clr commit: b771377665]
2021-04-14 15:46:21 -04:00
Vladislav Sytchenko c585ae92a7 SWDEV-280473 - Support HSAIL shared library build
This change makes HSAIL usage similar to that of Comgr. By default, the
runtime will statically link against it, however if HSAIL_DYN_DLL is
defined, then the runtime will try to dynamically load HSAIL.

Currently stick to statically linking to HSAIL. In a feature patch the
dynamic loading behaviour will be enabled.

Change-Id: I6a78a4375975cf847f236b200404c8cf941d012b


[ROCm/clr commit: c7b50bb890]
2021-04-14 12:25:54 -04:00
Julia Jiang 7bb189c4c5 SWDEV-268186 - OCL ReBar optimization
Change-Id: I69d8bce8d48a5b6f94a05272c83ee91fbec1688c


[ROCm/clr commit: aef4ab1fc8]
2021-04-13 15:08:32 -04:00
Vladislav Sytchenko 8edf4d9cd3 SWDEV-280473 - Fix Windows build
Change-Id: Id1acb5ad07a6717c5866065776f9f2b3bf85be8e


[ROCm/clr commit: 2ae1b17b7c]
2021-04-13 11:38:17 -04:00
Vladislav Sytchenko 7b3014ec69 SWDEV-280473 - Remove HSAIL support from the ROCm backend
In adition to removing the HSAIL logic from the ROCm backend, guard all
of the HSAIL includes in the common layer behind the WITH_COMPILER_LIB
define. This is to avoid including HSAIL headers when building with
no support for it.

In common logic replace the use of the aclType enum with the new
Program::file_type_t enum. This is essentially a local copy of the HSAIL
enum to avoid including any HSAIL headers.

Change-Id: Ica0651d1b29dfccc255cc584eb82a5cb35e1b520


[ROCm/clr commit: cbeb372e46]
2021-04-12 14:55:06 -04:00
Jason Tang 636bdbd0fa SWDEV-277559 - Remove AMDIL
The rest of AMDIL support will be removed along with orca backend.

Change-Id: I0462501e7147dc4b99870fd02034d0a4a0496e55


[ROCm/clr commit: 1a38be8972]
2021-04-09 14:15:15 -04:00
Konstantin Zhuravlyov 48a2ce0404 SWDEV-76911 - Target ID workarounds in vdi runtime:
- Add HSAIL ID for Hawaii as gfx702
  - Add HSAIL ID for Renoir without xnack as gfx90c

Fixes: SWDEV-271289, SWDEV-272761
Change-Id: I92cf4619cdfd550462ff8ec3740443ef1e5a5f96


[ROCm/clr commit: 3010cf0a58]
2021-04-08 12:14:25 -04:00
Saleel Kudchadker 6c304e4027 SWDEV-276120 - Remove support for barrier sync
ROC_BARRIER_SYNC will not work with direct dispatch.
Remove and cleanup.

Change-Id: I81368b2e65039477bd0343bb92708dab48867db6


[ROCm/clr commit: aa38af8c96]
2021-04-07 17:08:39 -04:00
Sourabh Betigeri d2842bfc54 SWDEV-273265 - Reverting wrong scope resolution operator VirtualGpu in the declaration releaseGpuMemoryFence()
Change-Id: Ia67ee1e4a3e86235caf8b7c585c65372f7d55426


[ROCm/clr commit: 48e470a14c]
2021-04-07 09:24:10 -07:00
Sarbojit Sarkar a8a8200e0b SWDEV-280089 - nullptr was getting added into MemObj
Change-Id: Ica56126156198140a143182de3d93d86730cadf1


[ROCm/clr commit: d8d6c4e55d]
2021-04-06 23:41:50 -04:00
Sourabh Betigeri 6ec57b845c SWDEV-273265 - Fix to wait on a pending dispatch in PAL.
Change-Id: I431cedfef5d5cb727c35ba8e294528017bfe2088


[ROCm/clr commit: 21ea81d5b9]
2021-04-06 13:13:07 -04:00
Julia Jiang 2f8170b85d SWDEV-272268, SWDEV-268186 - OCL change for Rebar optimization:fix regressions in OCLMemInfo and Conformance basic test
Change-Id: I3e709942b5f43ba52a4cb0824a2e6b3202d4b405


[ROCm/clr commit: f22ceb0fd8]
2021-04-06 10:53:12 -04:00
German Andryeyev 77c260410a SWDEV-279288 - Move the batch condition
The check has to be performed inside the signal loop, because
active signals need to be processed to avoid a stale timestamp
class.

Change-Id: I26af8287aae18eb19c096d9358cd0b86cfd1c561


[ROCm/clr commit: 2d41031aec]
2021-04-06 10:22:31 -04:00
German Andryeyev 472a43432d SWDEV-279288 - Avoid profiling info for the sync barrier
- With direct disaptch profiling state is enabled to trigger the
callback on HSA signal. However ROCr has very low peformance on
the first call to get the profiling info. That impacts some tiny
performance tests.

Change-Id: Idacd1b10a473fcfb5feef3074b7191d35743f769


[ROCm/clr commit: a71f7f931e]
2021-04-05 12:54:23 -04:00
Todd tiantuo Li 142a5d196c SWDEV-1 - enable gfx90c for ROC and PAL paths
Change-Id: If5c4f1ca1b136e14b9e11cd27b1beff386adc377


[ROCm/clr commit: 0d7ded0bfb]
2021-04-01 12:02:08 -07:00
Alex Xie e0c4654f3e SWDEV-268914 - Linux, AMF, tests fail to scale images down
This is part 2 of the change. This is for PAL backend.
The parent buffer sometimes has newer data than the sub buffer or image.
We always need to copy the data into copybuffer in pitch workaround.

Tests:
clinfo
Conformance tests: all images test, info, API, basic.
Internal runtime tests

Change-Id: I97d876ac75b240e69b48244be4c9e522db24f8ac


[ROCm/clr commit: 0de4b2962c]
2021-03-31 11:17:56 -04:00
Alex Xie 06349fd486 SWDEV-276304 - [Navi][OpenCL][Linux]AMF Converter generate corrupted Frames
This is part 2 of the code change for PAL.
The copy image workaround could be recursively used by ROCclr blit kernel.
Avoid such situation by using stack variable.

Tests:
clinfo.
Conformance tests - basic, API, info, and all images tests.
Internal runtime tests - all passed.

Change-Id: I3c822e55398cdf35c2c4a46ed9fc20fbee7cc908


[ROCm/clr commit: 090cf6c6d3]
2021-03-30 15:56:01 -04:00
Alex Xie 859d0bd497 SWDEV-276304 - [Navi][OpenCL][Linux]AMF Converter generate corrupted Frames
The copy image workaround could be recursively used by ROCclr blit kernel.
Avoid such situation by using stack variable.

Change-Id: Iadaa8cad9216220194760dd461a9533bb236aea0


[ROCm/clr commit: 2bd1836049]
2021-03-30 12:07:00 -04:00
pghafari 9344b16621 SWDEV-245532 - HIP - Vulkan interop
Change-Id: I741f48e095c203bb1304f5b5e44f8c87b14b5497


[ROCm/clr commit: f1d58ae0d6]
2021-03-29 12:06:35 -04:00
pghafari 457ca7c990 SWDEV-245532 - HIP - Vulkan interop
Change-Id: I0be4279bb1037640d138dd07e125b78a719743ca


[ROCm/clr commit: e64ce02ea2]
2021-03-26 13:59:13 -04:00
German Andryeyev 59ee442a9c SWDEV-278346 - Replace assert with LogWarning()
ROCr returns some unexpected values and for now just return
invalid device back to the app

Change-Id: Ia6fb709ed2dc77d77bd5d64de80b41b3720bed76


[ROCm/clr commit: 8c513407af]
2021-03-25 10:19:33 -04:00
pghafari 01db6a04b3 SWDEV-245532 - HIP - Vulkan interop
Change-Id: I0e5bc4862925f344b3fcadf1fa0c0acaeaae6c4d


[ROCm/clr commit: 6e888b15ff]
2021-03-23 23:40:17 -04:00
Saleel Kudchadker f2a7ea3927 SWDEV-271010 - Increase active wait time
Increase wait time for active wait to 50us

Change-Id: I8f269ab25ecc6775e655b9eb36fafc5f41a59c95


[ROCm/clr commit: d034c48405]
2021-03-11 13:16:59 -08:00
Jason Tang 64f4e4c01c SWDEV-3 - Backport M0 changes
Change-Id: I36f676713442479ede142b7e887656f0b658bc7b


[ROCm/clr commit: 8d01cbddbe]
2021-03-10 10:25:42 -05:00
Vladislav Sytchenko 16aedba832 SWDEV-232428 - Fix CI regressions caused by 9eb113d
Change-Id: I6523a8abc19dc5b01f7eacb3a949da01afae60d5


[ROCm/clr commit: 07702bb28f]
2021-03-09 13:50:13 -05:00
Vladislav Sytchenko b1b12e51d1 SWDEV-232428 - Fix CI regressions caused by 9eb113d
Change-Id: I36e9ce964f4d7733450eee356d425d23e1d7ff2c


[ROCm/clr commit: 27e3b875f7]
2021-03-09 11:09:55 -05:00
Vladislav Sytchenko 9eb113d991 SWDEV-232428 - PAL Hostcall support
Since the majority of the Hostcall implementation now sits in the
commmon layer, the PAL backend simply just needs to invoke it. One thing
that is missing though is HSA signal support.

The newly added pal::Signal class is a light emulaion of what HSA
signals provide. The current implementation is just enough to get
Hostcall working, but it can be expanded in the future if needed to
fully emulate HSA signals.

The major difference for now between PAL and ROCm hostcall
implemenations is that PAL doesn't support blocking signals. This will
be enabled in the near future. For now use active wait for PAL.

Change-Id: I746557354ab9d71a7d4a31f9320fcc2fee5aee7f


[ROCm/clr commit: 99e8ac55cd]
2021-03-09 10:44:34 -05:00
German Andryeyev e51ecdaff3 SWDEV-274145 - process ACCESS_QUERY for all devices
HIP requires to return AccessedBy query for all device, but ROCr
can process one per query. Hence send the queries for all
available devices and then accumulate the results in runtime.

Change-Id: I082f9adb8e31c775a8ad1bf7a5af37440ef4bd16


[ROCm/clr commit: e9c484d1ce]
2021-03-08 14:19:13 -05:00
German Andryeyev 7c1443eb05 SWDEV-272449 - Create RGP manager before CommitSettingsAndInit()
Enabling DebugVMID requires a certain sequence in
PAL initialization. StartLateDeviceInit() must be called before
CommitSettingsAndInit().

Change-Id: I7385a8cc89e7a8ad97a6b56ad6acbd2cf2f29728


[ROCm/clr commit: dee99ca807]
2021-03-05 11:36:12 -05:00
German Andryeyev 3a4d69def2 SWDEV-272496 - Detect callbacks and force AQL barrier
HIP tests require HIP callbacks to be processed in another thread.
This change will use a thread from HSA signal callbacks to make
sure a HIP callback was done asynchronously.
Also process the callback before changing the status of command

Change-Id: Icef85d0e0f808663882cf6881ff1be3e5eca29ac


[ROCm/clr commit: 7f32d0b425]
2021-03-05 11:33:51 -05:00
Jason Tang 44eb6b02dc SWDEV-1 - Change file mode back to 644
Change-Id: I433740d65c8f648e346107f6d8fa57d69463b713


[ROCm/clr commit: c13f9df42a]
2021-03-05 10:17:58 -05:00
Vladislav Sytchenko 437a38aa6a SWDEV-274766 - Fix temporary file name on Windows
Change-Id: Ie06e0d14ab27f40b230ed6051cf95f4902f07c7a


[ROCm/clr commit: 8bb7399323]
2021-03-04 14:38:46 -05:00
kjayapra-amd d4707ff166 SWDEV-259566 - Adding support to retrieve handle for offsetted pointer.
Change-Id: I4a700c31a9ab481c4ea43923af57e83247555ab0


[ROCm/clr commit: 95e3a6d985]
2021-03-04 12:28:59 -05:00
Vladislav Sytchenko 9f2bb57232 SWDEV-1 - Remove unannounced asic
Change-Id: I0ec360e7f924dcfbc26bc70981a714abb57804c9


[ROCm/clr commit: b4064ad557]
2021-03-03 23:21:41 -05:00
German Andryeyev e8b1e484f5 SWDEV-274199 - Enable SVM tracking
ROCr/KFD doesn't validate memory pointers. Enable validation inside
ROCclr, using SVM tracking mechanism.

Change-Id: I581e32ff37187f9ed8d9a302e8fd9f6ca935bdd7


[ROCm/clr commit: fbde61de7f]
2021-03-03 13:18:56 -05:00
Vladislav Sytchenko fe244055b7 SWDEV-1 - [PAL] Force luxmark to use HSAIL on gfx10+
Change-Id: I929d6d15365d3a6e9fd7eaed0b8b4910694f9504


[ROCm/clr commit: d8c1da5669]
2021-03-02 16:16:56 -05:00
Ravi C Akkenapally 1d842c07ec SWDEV-179105 - Stream Operations: Add feature querying support
Change-Id: I01cb85223b83f3655e5e21ad16639da406e5cd3e


[ROCm/clr commit: e94d482c8f]
2021-03-02 11:02:15 -08:00
Vladislav Sytchenko f22b6ede06 SWDEV-232428 - Fix typo from ac53942
Change-Id: Iec1f07e04ca3ae8ad72d38034bc136b59eb89dfe


[ROCm/clr commit: 8c4cf8c1b0]
2021-03-02 12:34:38 -05:00
Tao Sang e6bde7467e SWDEV-270973 - Add missing copyright headers
Change-Id: I6bb17650f74371dae6e29c59fd6bb2022cc062fe


[ROCm/clr commit: c1c5c89cd0]
2021-03-02 12:01:54 -05:00
kjayapra-amd 5ee300da46 SWDEV-270013 - Assign Kern_args segment only for gfx90a.
Change-Id: Icc890041eb27800cb78ef9e3d7bbe02658f53821


[ROCm/clr commit: a7abe44436]
2021-03-02 11:07:37 -05:00
German Andryeyev f6cc68deac SWDEV-272496 - Fix multiple timing issues
- Don't notify if the batch is empty, because that means
the current command was processed already.
- Disable pinning optimization to avoid a race condition on stall.
- TS marker submition requires extra AQL barrier
to track the status.

Change-Id: I17eff4ad12ac66cfe1bb44048bebb1891805279d


[ROCm/clr commit: 24299e25bd]
2021-03-01 12:46:57 -05:00
Alex Xie d82e14bf2c SWDEV-272382 - [OCL][LNX] OCLMemoryInfo[1] subtest of oclruntime is failing
1. Fix the size of the memory when releasing.
2. Make sure we only count the device memory

Change-Id: Ib4dcda79f313c4ee9cc1c7bab53f8076bce5f583


[ROCm/clr commit: 639d67866c]
2021-02-28 16:00:51 -05:00
Vladislav Sytchenko 3cd2c487d3 SWDEV-193973 - Enable HSAIL for all Navi Asics
Change-Id: I0a48442f9a970de3d449e512293bc4600c62db13


[ROCm/clr commit: 4e1232a110]
2021-02-26 11:56:09 -05:00
Vladislav Sytchenko cae2f29c10 SWDEV-86035 - [PAL] Correct allocation logging
Since the allocation can be a suballocation, we should print both the
VA range for the allocation and the underlying memory object.

Change-Id: Ic9c707bbb78113b366d1b2c688e6fd33bdc8fd94


[ROCm/clr commit: 9e8a2f3266]
2021-02-24 11:35:49 -05:00
kjayapra-amd d26aceba19 SWDEV-274058 - Porting HIP, ROCclr gfx90a changes to mainline.
Change-Id: I4f4220df77e57f749a00c1dbb66743ac5af4959a


[ROCm/clr commit: 46a50965c4]
2021-02-24 09:55:54 -05:00
Jason Tang 09259cd49f SWDEV-198364 - Only enable clgl sharing in ROCm path when building LinuxPro
Change-Id: Ie4d87e252519d090a62b930f7ebb315d3477b690


[ROCm/clr commit: 54a7170e40]
2021-02-23 14:15:04 -05:00
Vladislav Sytchenko dfdb975c7d SWDEV-270013 - Fix uninitialized variable warning
Change-Id: Ic4c8090e94e82798c294ac4532ca20efbc5a3a54


[ROCm/clr commit: c93f66a5ec]
2021-02-23 11:49:28 -05:00