Add an extension to memory advise to disable cache coherency for
better performance
Change-Id: I283703d81d9c36ddfa2c8fffa15eef60e2195056
[ROCm/clr commit: a9a1e21445]
With HIP API callback runtime has to stall the queue until the
callback is done. Rocclr will introduce SW blocking HSA signal,
which will be released after the callback is done.
Change-Id: I6411f3efab31b468e3b87ebb5c8d155e116b613d
[ROCm/clr commit: d93df7037c]
This change refactors the current ROCclr cmake build to accomodate a
more modular approach. This allows easier support for multiple compiler
and/or multiple runtime backends.
Currently supported compilers:
HSAIL - enabled by ROCCLR_ENABLE_HSAIL (defaults to OFF)
LC - enabled by ROCCLR_ENABLE_LC (defaults to ON)
Currently supported runtimes:
HSA - enabled by ROCCLR_ENABLE_HSA (defaults to ON)
PAL - enabled by ROCCLR_ENABLE_PAL (defaults to OFF)
Any configuration is supported as long as at least one compiler and one
runtime is enabled.
Since ROCclr clients can configure it differently, one cannot reuse the
same ROCclr build artifacts between different clients. To assure this,
this patch assumes that ROCclr will be built as part of the clients
project.
Change-Id: Id4a5c43634296802b8ae87d1ad5984968391ccaf
[ROCm/clr commit: 7f0c18457d]
- Make sure barrier with dependent signals issues before queue
index reservation
- Don't issue extra barrier if it's already a barrier command
with dependent signals
Change-Id: I179a8b7adac79eed698f4a4d9eca2606d8e913aa
[ROCm/clr commit: 148a5cac39]
In HSAIL path, kernel akc info is obtained after code object
loading, and kernel signature creation requires the akc info
when one of the kernel argument is a reference object.
Change-Id: I9cdb1dbf2c72f4620b0b6e46a88402a2473c3e97
[ROCm/clr commit: 8cac880779]
Use HSA_AMD_SVM_ATTRIB_AGENT_ACCESSIBLE flag for the initial
allocation instead of HSA_AMD_SVM_ATTRIB_AGENT_ACCESSIBLE_IN_PLACE.
Change-Id: Ia52fe205563df1ea916dc2dc81e749e11c16f83d
[ROCm/clr commit: 9b3072ae12]
This fixes an issue in hostcall when processing printf of a C string.
The calculation to round-up the string size to the next data chunk
didn't include the extra byte for the null terminating character.
Change-Id: I4cf0c250fa4fda253b0db15be461819ffce76d32
[ROCm/clr commit: 8341fd31d1]
This addresses the rocprof hang seen with direct dispatch. The
workaround queues the handler back if any of the signal value in the batch
is not decremented. To rememmber the last position in the list, we save
the parsed command in the current timestamp struct.
Change-Id: I02959e463cfe3cee83c54808ffd6e6f48f43b4e8
[ROCm/clr commit: e5e635f9bf]
HIP should be built with HSAIL support disabled.
Currently HSAILProgram::info() and VirtualGPU::buildKernelInfo() expose
ACL interfaces directly. This should not be allowed.
Change-Id: Iae15d4f19be16806826f2f6cb600752c11f97fc1
[ROCm/clr commit: bbe6246f19]
hipIpcOpenMemHandle should return the device pointer which is
similar to the base ptr of the original allocation even if the offset
to the original pointer is passed to hipIpcGetMemHandle
Change-Id: I99c0553e8c67c15b5fed880b6a4c74bce39c3aee
[ROCm/clr commit: 88fca7bf9e]
Device enqueue has an option to execute scheduler on the current
queue and it's enabled by default. Make sure scratch is allocated
on the current queue for that case. Add max vgpr tracking per
program to adjust scratch size accordingly.
Change-Id: I2a6d796913a4551a1e7f343a2465d589eec60d8a
[ROCm/clr commit: e553b2763a]
MT doesn't use GPU waits, but CPU for sync between engines.
Change the threshold values for CPU waits for direct dispatch.
That will bring behavior closer to MT.
Change-Id: Ia41c3cb812614962aff2746b6cf858f1bf77dda2
[ROCm/clr commit: ca2ea70a6c]
Enabling both LC and HSAIL will cause the DYN macro to be redefined.
Rename it for each compiler to avoid name clashing.
Change-Id: I607f022f37c4d05bef4e3a8070d19bd3659d7bc2
[ROCm/clr commit: b771377665]
This change makes HSAIL usage similar to that of Comgr. By default, the
runtime will statically link against it, however if HSAIL_DYN_DLL is
defined, then the runtime will try to dynamically load HSAIL.
Currently stick to statically linking to HSAIL. In a feature patch the
dynamic loading behaviour will be enabled.
Change-Id: I6a78a4375975cf847f236b200404c8cf941d012b
[ROCm/clr commit: c7b50bb890]
In adition to removing the HSAIL logic from the ROCm backend, guard all
of the HSAIL includes in the common layer behind the WITH_COMPILER_LIB
define. This is to avoid including HSAIL headers when building with
no support for it.
In common logic replace the use of the aclType enum with the new
Program::file_type_t enum. This is essentially a local copy of the HSAIL
enum to avoid including any HSAIL headers.
Change-Id: Ica0651d1b29dfccc255cc584eb82a5cb35e1b520
[ROCm/clr commit: cbeb372e46]
- Add HSAIL ID for Hawaii as gfx702
- Add HSAIL ID for Renoir without xnack as gfx90c
Fixes: SWDEV-271289, SWDEV-272761
Change-Id: I92cf4619cdfd550462ff8ec3740443ef1e5a5f96
[ROCm/clr commit: 3010cf0a58]
ROC_BARRIER_SYNC will not work with direct dispatch.
Remove and cleanup.
Change-Id: I81368b2e65039477bd0343bb92708dab48867db6
[ROCm/clr commit: aa38af8c96]
cjatin
German Andryeyev
Vladislav Sytchenko
Jason Tang
Ravi C Akkenapally
kjayapra-amd
Siu Chi Chan
Saleel Kudchadker
Brian Sumner
pghafari
Satyanvesh Dittakavi
Sourabh Betigeri
Julia Jiang
Konstantin Zhuravlyov
Sarbojit Sarkar